1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes='loop-mssa(indvars,loop-rotate)' -verify-scev -S %s | FileCheck %s
3
4define void @pr59534(i16 %c.0, ptr %A) {
5; CHECK-LABEL: @pr59534(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
8; CHECK:       loop.header:
9; CHECK-NEXT:    [[C_1:%.*]] = icmp ne i16 [[C_0:%.*]], 0
10; CHECK-NEXT:    br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
11; CHECK:       if.then:
12; CHECK-NEXT:    [[L:%.*]] = load i32, ptr [[A:%.*]], align 1
13; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[L]], 0
14; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i16
15; CHECK-NEXT:    store i16 [[CONV]], ptr [[A]], align 2
16; CHECK-NEXT:    br label [[IF_END]]
17; CHECK:       if.end:
18; CHECK-NEXT:    br i1 false, label [[LOOP_HEADER]], label [[EXIT:%.*]]
19; CHECK:       exit:
20; CHECK-NEXT:    ret void
21;
22entry:
23  br label %loop.header
24
25loop.header:
26  %e.0 = phi i32 [ 0, %entry ], [ 1, %loop.latch ]
27  %c.1 = icmp ne i16 %c.0, 0
28  br i1 %c.1, label %if.then, label %if.end
29
30if.then:
31  %l = load i32, ptr %A, align 1
32  %cmp = icmp sgt i32 %l, %e.0
33  %conv = zext i1 %cmp to i16
34  store i16 %conv, ptr %A
35  br label %if.end
36
37if.end:
38  br i1 false, label %loop.latch, label %exit
39
40loop.latch:
41  br label %loop.header
42
43exit:
44  ret void
45}
46