1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=loop-fusion < %s 2>&1 | FileCheck %s 3 4; Tests when the second loop preheader has a phi coming from the first loop 5; exit. If the phi is not used in the second loop, the loops can be fused and 6; the phi is sunk to the fused loop exit. If the phi is used in the second loop, 7; the loops cannot be fused. 8 9define void @test1() { 10; CHECK-LABEL: @test1( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: br label [[VECTOR_PH:%.*]] 13; CHECK: vector.ph: 14; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] 15; CHECK: middle.block: 16; CHECK-NEXT: br i1 true, label [[FOR_END41:%.*]], label [[VECTOR_PH]] 17; CHECK: for.end41: 18; CHECK-NEXT: [[DOTLCSSA92:%.*]] = phi i16 [ 1, [[MIDDLE_BLOCK]] ] 19; CHECK-NEXT: ret void 20; 21entry: 22 br label %vector.ph 23 24vector.ph: ; preds = %middle.block, %entry 25 br label %middle.block 26 27middle.block: ; preds = %vector.ph 28 br i1 true, label %for.cond17.preheader, label %vector.ph 29 30for.cond17.preheader: ; preds = %middle.block 31 %.lcssa92 = phi i16 [ 1, %middle.block ] 32 br label %vector.ph61 33 34vector.ph61: ; preds = %middle.block59, %for.cond17.preheader 35 br i1 true, label %for.end41, label %vector.ph61 36 37for.end41: ; preds = %middle.block59 38 ret void 39} 40 41define void @test2() { 42; CHECK-LABEL: @test2( 43; CHECK-NEXT: entry: 44; CHECK-NEXT: br label [[VECTOR_PH:%.*]] 45; CHECK: vector.ph: 46; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]] 47; CHECK: middle.block: 48; CHECK-NEXT: br i1 true, label [[FOR_COND17_PREHEADER:%.*]], label [[VECTOR_PH]] 49; CHECK: for.cond17.preheader: 50; CHECK-NEXT: [[DOTLCSSA92:%.*]] = phi i16 [ 1, [[MIDDLE_BLOCK]] ] 51; CHECK-NEXT: br label [[VECTOR_PH61:%.*]] 52; CHECK: vector.ph61: 53; CHECK-NEXT: call void @a(i16 [[DOTLCSSA92]]) 54; CHECK-NEXT: br i1 true, label [[FOR_END41:%.*]], label [[VECTOR_PH61]] 55; CHECK: for.end41: 56; CHECK-NEXT: ret void 57; 58entry: 59 br label %vector.ph 60 61vector.ph: ; preds = %middle.block, %entry 62 br label %middle.block 63 64middle.block: ; preds = %vector.ph 65 br i1 true, label %for.cond17.preheader, label %vector.ph 66 67for.cond17.preheader: ; preds = %middle.block 68 %.lcssa92 = phi i16 [ 1, %middle.block ] 69 br label %vector.ph61 70 71vector.ph61: ; preds = %middle.block59, %for.cond17.preheader 72 call void @a(i16 %.lcssa92) 73 br i1 true, label %for.end41, label %vector.ph61 74 75for.end41: ; preds = %middle.block59 76 ret void 77} 78 79declare void @a(i16); 80