xref: /llvm-project/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/no-implicit-float.ll (revision f0415f2a456d54daaa231c228d2c9f4ef2ce9b89)
1; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s
2
3target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
4
5; CHECK-LABEL: @no_implicit_float(
6; CHECK: store i32
7; CHECK: store i32
8; CHECK: store i32
9; CHECK: store i32
10define amdgpu_kernel void @no_implicit_float(ptr addrspace(1) %out) #0 {
11  %out.gep.1 = getelementptr i32, ptr addrspace(1) %out, i32 1
12  %out.gep.2 = getelementptr i32, ptr addrspace(1) %out, i32 2
13  %out.gep.3 = getelementptr i32, ptr addrspace(1) %out, i32 3
14
15  store i32 123, ptr addrspace(1) %out.gep.1
16  store i32 456, ptr addrspace(1) %out.gep.2
17  store i32 333, ptr addrspace(1) %out.gep.3
18  store i32 1234, ptr addrspace(1) %out
19  ret void
20}
21
22attributes #0 = { nounwind noimplicitfloat }
23