1; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -passes=load-store-vectorizer -S -o - %s | FileCheck -check-prefixes=GCN %s 2; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=load-store-vectorizer -S -o - %s | FileCheck -check-prefixes=GCN %s 3 4target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5" 5 6; Checks that there is no crash when there are multiple tails 7; for a the same head starting a chain. 8@0 = internal addrspace(3) global [16384 x i32] undef 9 10; GCN-LABEL: @no_crash( 11; GCN: store <2 x i32> zeroinitializer 12; GCN: store i32 0 13; GCN: store i32 0 14 15define amdgpu_kernel void @no_crash(i32 %arg) { 16 %tmp2 = add i32 %arg, 14 17 %tmp3 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %tmp2 18 %tmp4 = add i32 %arg, 15 19 %tmp5 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %tmp4 20 21 store i32 0, ptr addrspace(3) %tmp3, align 4 22 store i32 0, ptr addrspace(3) %tmp5, align 4 23 store i32 0, ptr addrspace(3) %tmp5, align 4 24 store i32 0, ptr addrspace(3) %tmp5, align 4 25 26 ret void 27} 28 29; Check adjacent memory locations are properly matched and the 30; longest chain vectorized 31 32; GCN-LABEL: @interleave_get_longest 33 34; GCN: load <2 x i32>{{.*}} %tmp1 35; GCN: store <2 x i32> zeroinitializer{{.*}} %tmp1 36; GCN: load <2 x i32>{{.*}} %tmp2 37; GCN: load <2 x i32>{{.*}} %tmp4 38; GCN: load i32{{.*}} %tmp5 39; GCN: load i32{{.*}} %tmp5 40 41define amdgpu_kernel void @interleave_get_longest(i32 %arg) { 42 %a1 = add i32 %arg, 1 43 %a2 = add i32 %arg, 2 44 %a3 = add i32 %arg, 3 45 %a4 = add i32 %arg, 4 46 %tmp1 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %arg 47 %tmp2 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %a1 48 %tmp3 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %a2 49 %tmp4 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %a3 50 %tmp5 = getelementptr [16384 x i32], ptr addrspace(3) @0, i32 0, i32 %a4 51 52 %l1 = load i32, ptr addrspace(3) %tmp2, align 4 53 %l2 = load i32, ptr addrspace(3) %tmp1, align 4 54 store i32 0, ptr addrspace(3) %tmp2, align 4 55 store i32 0, ptr addrspace(3) %tmp1, align 4 56 %l3 = load i32, ptr addrspace(3) %tmp2, align 4 57 %l4 = load i32, ptr addrspace(3) %tmp3, align 4 58 %l5 = load i32, ptr addrspace(3) %tmp4, align 4 59 %l6 = load i32, ptr addrspace(3) %tmp5, align 4 60 %l7 = load i32, ptr addrspace(3) %tmp5, align 4 61 %l8 = load i32, ptr addrspace(3) %tmp5, align 4 62 63 ret void 64} 65 66