xref: /llvm-project/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/gep-bitcast.ll (revision f225471c68881d31835a06c6b2f2b40bdaa287d5)
1; RUN: opt -S -mtriple=amdgcn--amdhsa -passes=load-store-vectorizer < %s | FileCheck %s
2; RUN: opt -S -mtriple=amdgcn--amdhsa -passes='function(load-store-vectorizer)' < %s | FileCheck %s
3
4target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
5
6; Check that vectorizer can find a GEP through bitcast
7; CHECK-LABEL: @vect_zext_bitcast_f32_to_i32_idx
8; CHECK: load <4 x i32>
9define void @vect_zext_bitcast_f32_to_i32_idx(ptr addrspace(1) %arg1, i32 %base) {
10  %add1 = add nuw i32 %base, 0
11  %zext1 = zext i32 %add1 to i64
12  %gep1 = getelementptr inbounds float, ptr addrspace(1) %arg1, i64 %zext1
13  %load1 = load i32, ptr addrspace(1) %gep1, align 4
14  %add2 = add nuw i32 %base, 1
15  %zext2 = zext i32 %add2 to i64
16  %gep2 = getelementptr inbounds float, ptr addrspace(1) %arg1, i64 %zext2
17  %load2 = load i32, ptr addrspace(1) %gep2, align 4
18  %add3 = add nuw i32 %base, 2
19  %zext3 = zext i32 %add3 to i64
20  %gep3 = getelementptr inbounds float, ptr addrspace(1) %arg1, i64 %zext3
21  %load3 = load i32, ptr addrspace(1) %gep3, align 4
22  %add4 = add nuw i32 %base, 3
23  %zext4 = zext i32 %add4 to i64
24  %gep4 = getelementptr inbounds float, ptr addrspace(1) %arg1, i64 %zext4
25  %load4 = load i32, ptr addrspace(1) %gep4, align 4
26  ret void
27}
28
29; CHECK-LABEL: @vect_zext_bitcast_i8_st1_to_i32_idx
30; CHECK: load i32
31; CHECK: load i32
32; CHECK: load i32
33; CHECK: load i32
34define void @vect_zext_bitcast_i8_st1_to_i32_idx(ptr addrspace(1) %arg1, i32 %base) {
35  %add1 = add nuw i32 %base, 0
36  %zext1 = zext i32 %add1 to i64
37  %gep1 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext1
38  %load1 = load i32, ptr addrspace(1) %gep1, align 4
39  %add2 = add nuw i32 %base, 1
40  %zext2 = zext i32 %add2 to i64
41  %gep2 = getelementptr inbounds i8,ptr addrspace(1) %arg1, i64 %zext2
42  %load2 = load i32, ptr addrspace(1) %gep2, align 4
43  %add3 = add nuw i32 %base, 2
44  %zext3 = zext i32 %add3 to i64
45  %gep3 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext3
46  %load3 = load i32, ptr addrspace(1) %gep3, align 4
47  %add4 = add nuw i32 %base, 3
48  %zext4 = zext i32 %add4 to i64
49  %gep4 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext4
50  %load4 = load i32, ptr addrspace(1) %gep4, align 4
51  ret void
52}
53
54; CHECK-LABEL: @vect_zext_bitcast_i8_st4_to_i32_idx
55; CHECK: load <4 x i32>
56define void @vect_zext_bitcast_i8_st4_to_i32_idx(ptr addrspace(1) %arg1, i32 %base) {
57  %add1 = add nuw i32 %base, 0
58  %zext1 = zext i32 %add1 to i64
59  %gep1 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext1
60  %load1 = load i32, ptr addrspace(1) %gep1, align 4
61  %add2 = add nuw i32 %base, 4
62  %zext2 = zext i32 %add2 to i64
63  %gep2 = getelementptr inbounds i8,ptr addrspace(1) %arg1, i64 %zext2
64  %load2 = load i32, ptr addrspace(1) %gep2, align 4
65  %add3 = add nuw i32 %base, 8
66  %zext3 = zext i32 %add3 to i64
67  %gep3 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext3
68  %load3 = load i32, ptr addrspace(1) %gep3, align 4
69  %add4 = add nuw i32 %base, 12
70  %zext4 = zext i32 %add4 to i64
71  %gep4 = getelementptr inbounds i8, ptr addrspace(1) %arg1, i64 %zext4
72  %load4 = load i32, ptr addrspace(1) %gep4, align 4
73  ret void
74}
75
76; CHECK-LABEL: @vect_zext_bitcast_negative_ptr_delta
77; CHECK: load <2 x i32>
78define void @vect_zext_bitcast_negative_ptr_delta(ptr addrspace(1) %p, i32 %base) {
79  %a.offset = add nuw i32 %base, 4
80  %t.offset.zexted = zext i32 %base to i64
81  %a.offset.zexted = zext i32 %a.offset to i64
82  %t.ptr = getelementptr inbounds i16, ptr addrspace(1) %p, i64 %t.offset.zexted
83  %a.ptr = getelementptr inbounds i16, ptr addrspace(1) %p, i64 %a.offset.zexted
84  %b.ptr = getelementptr inbounds i16, ptr addrspace(1) %t.ptr, i64 6
85  %a.val = load i32, ptr addrspace(1) %a.ptr
86  %b.val = load i32, ptr addrspace(1) %b.ptr
87  ret void
88}
89
90; Check i1 corner case
91; CHECK-LABEL: @zexted_i1_gep_index
92; CHECK: load i32
93; CHECK: load i32
94define void @zexted_i1_gep_index(ptr addrspace(1) %p, i32 %val) {
95  %selector = icmp eq i32 %val, 0
96  %flipped = xor i1 %selector, 1
97  %index.0 = zext i1 %selector to i64
98  %index.1 = zext i1 %flipped to i64
99  %gep.0 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.0
100  %gep.1 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.1
101  %val0 = load i32, ptr addrspace(1) %gep.0
102  %val1 = load i32, ptr addrspace(1) %gep.1
103  ret void
104}
105
106; Check i1 corner case
107; CHECK-LABEL: @sexted_i1_gep_index
108; CHECK: load i32
109; CHECK: load i32
110define void @sexted_i1_gep_index(ptr addrspace(1) %p, i32 %val) {
111  %selector = icmp eq i32 %val, 0
112  %flipped = xor i1 %selector, 1
113  %index.0 = sext i1 %selector to i64
114  %index.1 = sext i1 %flipped to i64
115  %gep.0 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.0
116  %gep.1 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.1
117  %val0 = load i32, ptr addrspace(1) %gep.0
118  %val1 = load i32, ptr addrspace(1) %gep.1
119  ret void
120}
121
122; CHECK-LABEL: @zexted_i1_gep_index_different_bbs
123; CHECK: load i32
124; CHECK: load i32
125define void @zexted_i1_gep_index_different_bbs(ptr addrspace(1) %p, i32 %val) {
126entry:
127  %selector = icmp eq i32 %val, 0
128  %flipped = xor i1 %selector, 1
129  %index.0 = zext i1 %selector to i64
130  %index.1 = zext i1 %flipped to i64
131  %gep.0 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.0
132  br label %next
133
134next:
135  %gep.1 = getelementptr inbounds i32, ptr addrspace(1) %p, i64 %index.1
136  %val0 = load i32, ptr addrspace(1) %gep.0
137  %val1 = load i32, ptr addrspace(1) %gep.1
138  ret void
139}
140