xref: /llvm-project/llvm/test/Transforms/InstSimplify/fptoi-range.ll (revision 38fffa630ee80163dc65e759392ad29798905679) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes=instsimplify < %s | FileCheck %s
3
4define i1 @f16_si_max1(half %f) {
5; CHECK-LABEL: @f16_si_max1(
6; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i32
7; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[I]], 65504
8; CHECK-NEXT:    ret i1 [[C]]
9;
10  %i = fptosi half %f to i32
11  %c = icmp sge i32 %i, 65504
12  ret i1 %c
13}
14
15define i1 @f16_si_max2(half %f) {
16; CHECK-LABEL: @f16_si_max2(
17; CHECK-NEXT:    ret i1 false
18;
19  %i = fptosi half %f to i32
20  %c = icmp sgt i32 %i, 65504
21  ret i1 %c
22}
23
24define i1 @f16_si16_max2(half %f) {
25; CHECK-LABEL: @f16_si16_max2(
26; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i16
27; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[I]], -32
28; CHECK-NEXT:    ret i1 [[C]]
29;
30  %i = fptosi half %f to i16
31  %c = icmp sgt i16 %i, 65504
32  ret i1 %c
33}
34
35define i1 @f16_si128_max2(half %f) {
36; CHECK-LABEL: @f16_si128_max2(
37; CHECK-NEXT:    ret i1 false
38;
39  %i = fptosi half %f to i128
40  %c = icmp sgt i128 %i, 65504
41  ret i1 %c
42}
43
44define i1 @f16_si_min1(half %f) {
45; CHECK-LABEL: @f16_si_min1(
46; CHECK-NEXT:    ret i1 true
47;
48  %i = fptosi half %f to i32
49  %c = icmp sge i32 %i, -65504
50  ret i1 %c
51}
52
53define i1 @f16_si128_min1(half %f) {
54; CHECK-LABEL: @f16_si128_min1(
55; CHECK-NEXT:    ret i1 true
56;
57  %i = fptosi half %f to i128
58  %c = icmp sge i128 %i, -65504
59  ret i1 %c
60}
61
62define i1 @f16_si16_min1(half %f) {
63; CHECK-LABEL: @f16_si16_min1(
64; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i16
65; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[I]], 32
66; CHECK-NEXT:    ret i1 [[C]]
67;
68  %i = fptosi half %f to i16
69  %c = icmp sge i16 %i, -65504
70  ret i1 %c
71}
72
73define i1 @f16_si_min2(half %f) {
74; CHECK-LABEL: @f16_si_min2(
75; CHECK-NEXT:    [[I:%.*]] = fptosi half [[F:%.*]] to i32
76; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[I]], -65504
77; CHECK-NEXT:    ret i1 [[C]]
78;
79  %i = fptosi half %f to i32
80  %c = icmp sgt i32 %i, -65504
81  ret i1 %c
82}
83
84define i1 @f16_ui_max1(half %f) {
85; CHECK-LABEL: @f16_ui_max1(
86; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i32
87; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[I]], 65504
88; CHECK-NEXT:    ret i1 [[C]]
89;
90  %i = fptoui half %f to i32
91  %c = icmp sge i32 %i, 65504
92  ret i1 %c
93}
94
95define i1 @f16_ui_max2(half %f) {
96; CHECK-LABEL: @f16_ui_max2(
97; CHECK-NEXT:    ret i1 false
98;
99  %i = fptoui half %f to i32
100  %c = icmp sgt i32 %i, 65504
101  ret i1 %c
102}
103
104define i1 @f16_ui16_max2(half %f) {
105; CHECK-LABEL: @f16_ui16_max2(
106; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i16
107; CHECK-NEXT:    [[C:%.*]] = icmp sgt i16 [[I]], -32
108; CHECK-NEXT:    ret i1 [[C]]
109;
110  %i = fptoui half %f to i16
111  %c = icmp sgt i16 %i, 65504
112  ret i1 %c
113}
114
115define i1 @f16_ui16_max3(half %f) {
116; CHECK-LABEL: @f16_ui16_max3(
117; CHECK-NEXT:    ret i1 true
118;
119  %i = fptoui half %f to i16
120  %c = icmp ule i16 %i, 65504
121  ret i1 %c
122}
123
124define i1 @f16_ui_min1(half %f) {
125; CHECK-LABEL: @f16_ui_min1(
126; CHECK-NEXT:    ret i1 true
127;
128  %i = fptoui half %f to i32
129  %c = icmp sge i32 %i, 0
130  ret i1 %c
131}
132
133define i1 @f16_ui16_min1(half %f) {
134; CHECK-LABEL: @f16_ui16_min1(
135; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i16
136; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[I]], 0
137; CHECK-NEXT:    ret i1 [[C]]
138;
139  %i = fptoui half %f to i16
140  %c = icmp sge i16 %i, 0
141  ret i1 %c
142}
143
144define i1 @f16_ui_min2(half %f) {
145; CHECK-LABEL: @f16_ui_min2(
146; CHECK-NEXT:    [[I:%.*]] = fptoui half [[F:%.*]] to i32
147; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[I]], 0
148; CHECK-NEXT:    ret i1 [[C]]
149;
150  %i = fptoui half %f to i32
151  %c = icmp sgt i32 %i, 0
152  ret i1 %c
153}
154
155
156
157define <2 x i1> @v2f16_si_max(<2 x half> %f) {
158; CHECK-LABEL: @v2f16_si_max(
159; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32>
160; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i32> [[I]], splat (i32 65504)
161; CHECK-NEXT:    ret <2 x i1> [[C]]
162;
163  %i = fptosi <2 x half> %f to <2 x i32>
164  %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504>
165  ret <2 x i1> %c
166}
167
168define <2 x i1> @v2f16_si_max2(<2 x half> %f) {
169; CHECK-LABEL: @v2f16_si_max2(
170; CHECK-NEXT:    ret <2 x i1> zeroinitializer
171;
172  %i = fptosi <2 x half> %f to <2 x i32>
173  %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504>
174  ret <2 x i1> %c
175}
176
177define <2 x i1> @v2f16_si16_max2(<2 x half> %f) {
178; CHECK-LABEL: @v2f16_si16_max2(
179; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16>
180; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i16> [[I]], splat (i16 -32)
181; CHECK-NEXT:    ret <2 x i1> [[C]]
182;
183  %i = fptosi <2 x half> %f to <2 x i16>
184  %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504>
185  ret <2 x i1> %c
186}
187
188define <2 x i1> @v2f16_si_min1(<2 x half> %f) {
189; CHECK-LABEL: @v2f16_si_min1(
190; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
191;
192  %i = fptosi <2 x half> %f to <2 x i32>
193  %c = icmp sge <2 x i32> %i, <i32 -65504, i32 -65504>
194  ret <2 x i1> %c
195}
196
197define <2 x i1> @v2f16_si16_min1(<2 x half> %f) {
198; CHECK-LABEL: @v2f16_si16_min1(
199; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16>
200; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i16> [[I]], splat (i16 32)
201; CHECK-NEXT:    ret <2 x i1> [[C]]
202;
203  %i = fptosi <2 x half> %f to <2 x i16>
204  %c = icmp sge <2 x i16> %i, <i16 -65504, i16 -65504>
205  ret <2 x i1> %c
206}
207
208define <2 x i1> @v2f16_si_min2(<2 x half> %f) {
209; CHECK-LABEL: @v2f16_si_min2(
210; CHECK-NEXT:    [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32>
211; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i32> [[I]], splat (i32 -65504)
212; CHECK-NEXT:    ret <2 x i1> [[C]]
213;
214  %i = fptosi <2 x half> %f to <2 x i32>
215  %c = icmp sgt <2 x i32> %i, <i32 -65504, i32 -65504>
216  ret <2 x i1> %c
217}
218
219define <2 x i1> @v2f16_ui_max1(<2 x half> %f) {
220; CHECK-LABEL: @v2f16_ui_max1(
221; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32>
222; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i32> [[I]], splat (i32 65504)
223; CHECK-NEXT:    ret <2 x i1> [[C]]
224;
225  %i = fptoui <2 x half> %f to <2 x i32>
226  %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504>
227  ret <2 x i1> %c
228}
229
230define <2 x i1> @v2f16_ui_max2(<2 x half> %f) {
231; CHECK-LABEL: @v2f16_ui_max2(
232; CHECK-NEXT:    ret <2 x i1> zeroinitializer
233;
234  %i = fptoui <2 x half> %f to <2 x i32>
235  %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504>
236  ret <2 x i1> %c
237}
238
239define <2 x i1> @v2f16_ui16_max2(<2 x half> %f) {
240; CHECK-LABEL: @v2f16_ui16_max2(
241; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16>
242; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i16> [[I]], splat (i16 -32)
243; CHECK-NEXT:    ret <2 x i1> [[C]]
244;
245  %i = fptoui <2 x half> %f to <2 x i16>
246  %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504>
247  ret <2 x i1> %c
248}
249
250define <2 x i1> @v2f16_ui16_max3(<2 x half> %f) {
251; CHECK-LABEL: @v2f16_ui16_max3(
252; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
253;
254  %i = fptoui <2 x half> %f to <2 x i16>
255  %c = icmp ule <2 x i16> %i, <i16 65504, i16 65504>
256  ret <2 x i1> %c
257}
258
259define <2 x i1> @v2f16_ui_min1(<2 x half> %f) {
260; CHECK-LABEL: @v2f16_ui_min1(
261; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
262;
263  %i = fptoui <2 x half> %f to <2 x i32>
264  %c = icmp sge <2 x i32> %i, <i32 0, i32 0>
265  ret <2 x i1> %c
266}
267
268define <2 x i1> @v2f16_ui16_min1(<2 x half> %f) {
269; CHECK-LABEL: @v2f16_ui16_min1(
270; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16>
271; CHECK-NEXT:    [[C:%.*]] = icmp sge <2 x i16> [[I]], zeroinitializer
272; CHECK-NEXT:    ret <2 x i1> [[C]]
273;
274  %i = fptoui <2 x half> %f to <2 x i16>
275  %c = icmp sge <2 x i16> %i, <i16 0, i16 0>
276  ret <2 x i1> %c
277}
278
279define <2 x i1> @v2f16_ui_min2(<2 x half> %f) {
280; CHECK-LABEL: @v2f16_ui_min2(
281; CHECK-NEXT:    [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32>
282; CHECK-NEXT:    [[C:%.*]] = icmp sgt <2 x i32> [[I]], zeroinitializer
283; CHECK-NEXT:    ret <2 x i1> [[C]]
284;
285  %i = fptoui <2 x half> %f to <2 x i32>
286  %c = icmp sgt <2 x i32> %i, <i32 0, i32 0>
287  ret <2 x i1> %c
288}
289
290declare i32 @llvm.fptosi.sat.i32.f16(half)
291declare i32 @llvm.fptoui.sat.i32.f16(half)
292declare <2 x i32> @llvm.fptosi.sat.v2i32.v2f16(<2 x half>)
293declare <2 x i32> @llvm.fptoui.sat.v2i32.v2f16(<2 x half>)
294