1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instsimplify -S | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 5target triple = "wasm32-unknown-unknown" 6 7declare i32 @llvm.wasm.trunc.signed.i32.f32(float) 8declare i32 @llvm.wasm.trunc.unsigned.i32.f32(float) 9declare i32 @llvm.wasm.trunc.signed.i32.f64(double) 10declare i32 @llvm.wasm.trunc.unsigned.i32.f64(double) 11declare i64 @llvm.wasm.trunc.signed.i64.f32(float) 12declare i64 @llvm.wasm.trunc.unsigned.i64.f32(float) 13declare i64 @llvm.wasm.trunc.signed.i64.f64(double) 14declare i64 @llvm.wasm.trunc.unsigned.i64.f64(double) 15 16define void @test_i32_trunc_f32_s(ptr %p) { 17; CHECK-LABEL: @test_i32_trunc_f32_s( 18; CHECK-NEXT: store volatile i32 0, ptr [[P:%.*]], align 4 19; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 20; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 21; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 22; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 23; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 24; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 25; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 26; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 27; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 28; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 29; CHECK-NEXT: store volatile i32 -2, ptr [[P]], align 4 30; CHECK-NEXT: store volatile i32 2147483520, ptr [[P]], align 4 31; CHECK-NEXT: store volatile i32 -2147483648, ptr [[P]], align 4 32; CHECK-NEXT: [[T14:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x41E0000000000000) 33; CHECK-NEXT: store volatile i32 [[T14]], ptr [[P]], align 4 34; CHECK-NEXT: [[T15:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xC1E0000020000000) 35; CHECK-NEXT: store volatile i32 [[T15]], ptr [[P]], align 4 36; CHECK-NEXT: [[T16:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7FF0000000000000) 37; CHECK-NEXT: store volatile i32 [[T16]], ptr [[P]], align 4 38; CHECK-NEXT: [[T17:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xFFF0000000000000) 39; CHECK-NEXT: store volatile i32 [[T17]], ptr [[P]], align 4 40; CHECK-NEXT: [[T18:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7FF8000000000000) 41; CHECK-NEXT: store volatile i32 [[T18]], ptr [[P]], align 4 42; CHECK-NEXT: [[T19:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7FFA000000000000) 43; CHECK-NEXT: store volatile i32 [[T19]], ptr [[P]], align 4 44; CHECK-NEXT: [[T20:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xFFF8000000000000) 45; CHECK-NEXT: store volatile i32 [[T20]], ptr [[P]], align 4 46; CHECK-NEXT: [[T21:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xFFFA000000000000) 47; CHECK-NEXT: store volatile i32 [[T21]], ptr [[P]], align 4 48; CHECK-NEXT: ret void 49; 50 %t0 = call i32 @llvm.wasm.trunc.signed.i32.f32(float +0.0) 51 store volatile i32 %t0, ptr %p 52 %t1 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -0.0) 53 store volatile i32 %t1, ptr %p 54 %t2 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x36a0000000000000); 0x1p-149 55 store volatile i32 %t2, ptr %p 56 %t3 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xb6a0000000000000); -0x1p-149 57 store volatile i32 %t3, ptr %p 58 %t4 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 1.0) 59 store volatile i32 %t4, ptr %p 60 %t5 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x3ff19999a0000000); 0x1.19999ap+0 61 store volatile i32 %t5, ptr %p 62 %t6 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 1.5) 63 store volatile i32 %t6, ptr %p 64 %t7 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -1.0) 65 store volatile i32 %t7, ptr %p 66 %t8 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xbff19999a0000000); -0x1.19999ap+0 67 store volatile i32 %t8, ptr %p 68 %t9 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -1.5) 69 store volatile i32 %t9, ptr %p 70 %t10 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xbffe666660000000); -1.9 71 store volatile i32 %t10, ptr %p 72 %t11 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -2.0) 73 store volatile i32 %t11, ptr %p 74 %t12 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 2147483520.0) 75 store volatile i32 %t12, ptr %p 76 %t13 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -2147483648.0) 77 store volatile i32 %t13, ptr %p 78 %t14 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 2147483648.0) 79 store volatile i32 %t14, ptr %p 80 %t15 = call i32 @llvm.wasm.trunc.signed.i32.f32(float -2147483904.0) 81 store volatile i32 %t15, ptr %p 82 %t16 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7ff0000000000000); inf 83 store volatile i32 %t16, ptr %p 84 %t17 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xfff0000000000000); -inf 85 store volatile i32 %t17, ptr %p 86 %t18 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7ff8000000000000); nan 87 store volatile i32 %t18, ptr %p 88 %t19 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0x7ffa000000000000); nan:0x200000 89 store volatile i32 %t19, ptr %p 90 %t20 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xfff8000000000000); -nan 91 store volatile i32 %t20, ptr %p 92 %t21 = call i32 @llvm.wasm.trunc.signed.i32.f32(float 0xfffa000000000000); -nan:0x200000 93 store volatile i32 %t21, ptr %p 94 ret void 95} 96 97define void @test_i32_trunc_f32_u(ptr %p) { 98; CHECK-LABEL: @test_i32_trunc_f32_u( 99; CHECK-NEXT: store volatile i32 0, ptr [[P:%.*]], align 4 100; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 101; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 102; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 103; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 104; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 105; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 106; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 107; CHECK-NEXT: store volatile i32 2, ptr [[P]], align 4 108; CHECK-NEXT: store volatile i32 -2147483648, ptr [[P]], align 4 109; CHECK-NEXT: store volatile i32 -256, ptr [[P]], align 4 110; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 111; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 112; CHECK-NEXT: [[T13:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x41F0000000000000) 113; CHECK-NEXT: store volatile i32 [[T13]], ptr [[P]], align 4 114; CHECK-NEXT: [[T14:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float -1.000000e+00) 115; CHECK-NEXT: store volatile i32 [[T14]], ptr [[P]], align 4 116; CHECK-NEXT: [[T15:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7FF0000000000000) 117; CHECK-NEXT: store volatile i32 [[T15]], ptr [[P]], align 4 118; CHECK-NEXT: [[T16:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xFFF0000000000000) 119; CHECK-NEXT: store volatile i32 [[T16]], ptr [[P]], align 4 120; CHECK-NEXT: [[T17:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7FF8000000000000) 121; CHECK-NEXT: store volatile i32 [[T17]], ptr [[P]], align 4 122; CHECK-NEXT: [[T18:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7FFA000000000000) 123; CHECK-NEXT: store volatile i32 [[T18]], ptr [[P]], align 4 124; CHECK-NEXT: [[T19:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xFFF8000000000000) 125; CHECK-NEXT: store volatile i32 [[T19]], ptr [[P]], align 4 126; CHECK-NEXT: [[T20:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xFFFA000000000000) 127; CHECK-NEXT: store volatile i32 [[T20]], ptr [[P]], align 4 128; CHECK-NEXT: ret void 129; 130 %t0 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float +0.0) 131 store volatile i32 %t0, ptr %p 132 %t1 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float -0.0) 133 store volatile i32 %t1, ptr %p 134 %t2 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x36a0000000000000); 0x1p-149 135 store volatile i32 %t2, ptr %p 136 %t3 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xb6a0000000000000); -0x1p-149 137 store volatile i32 %t3, ptr %p 138 %t4 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 1.0) 139 store volatile i32 %t4, ptr %p 140 %t5 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x3ff19999a0000000); 0x1.19999ap+0 141 store volatile i32 %t5, ptr %p 142 %t6 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 1.5) 143 store volatile i32 %t6, ptr %p 144 %t7 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x3ffe666660000000); 1.9 145 store volatile i32 %t7, ptr %p 146 %t8 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 2.0) 147 store volatile i32 %t8, ptr %p 148 %t9 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 2147483648.0) 149 store volatile i32 %t9, ptr %p 150 %t10 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 4294967040.0) 151 store volatile i32 %t10, ptr %p 152 %t11 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xbfecccccc0000000); -0x1.ccccccp-1 153 store volatile i32 %t11, ptr %p 154 %t12 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xbfefffffe0000000); -0x1.fffffep-1 155 store volatile i32 %t12, ptr %p 156 %t13 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 4294967296.0) 157 store volatile i32 %t13, ptr %p 158 %t14 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float -1.0) 159 store volatile i32 %t14, ptr %p 160 %t15 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7ff0000000000000); inf 161 store volatile i32 %t15, ptr %p 162 %t16 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xfff0000000000000); -inf 163 store volatile i32 %t16, ptr %p 164 %t17 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7ff8000000000000); nan 165 store volatile i32 %t17, ptr %p 166 %t18 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0x7ffa000000000000); nan:0x200000 167 store volatile i32 %t18, ptr %p 168 %t19 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xfff8000000000000); -nan 169 store volatile i32 %t19, ptr %p 170 %t20 = call i32 @llvm.wasm.trunc.unsigned.i32.f32(float 0xfffa000000000000); -nan:0x200000 171 store volatile i32 %t20, ptr %p 172 ret void 173} 174 175define void @test_i32_trunc_f64_s(ptr %p) { 176; CHECK-LABEL: @test_i32_trunc_f64_s( 177; CHECK-NEXT: store volatile i32 0, ptr [[P:%.*]], align 4 178; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 179; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 180; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 181; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 182; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 183; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 184; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 185; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 186; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 187; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 188; CHECK-NEXT: store volatile i32 -2, ptr [[P]], align 4 189; CHECK-NEXT: store volatile i32 2147483647, ptr [[P]], align 4 190; CHECK-NEXT: store volatile i32 -2147483648, ptr [[P]], align 4 191; CHECK-NEXT: store volatile i32 -2147483648, ptr [[P]], align 4 192; CHECK-NEXT: store volatile i32 2147483647, ptr [[P]], align 4 193; CHECK-NEXT: [[T16:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x41E0000000000000) 194; CHECK-NEXT: store volatile i32 [[T16]], ptr [[P]], align 4 195; CHECK-NEXT: [[T17:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xC1E0000000200000) 196; CHECK-NEXT: store volatile i32 [[T17]], ptr [[P]], align 4 197; CHECK-NEXT: [[T18:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7FF0000000000000) 198; CHECK-NEXT: store volatile i32 [[T18]], ptr [[P]], align 4 199; CHECK-NEXT: [[T19:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xFFF0000000000000) 200; CHECK-NEXT: store volatile i32 [[T19]], ptr [[P]], align 4 201; CHECK-NEXT: [[T20:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7FF8000000000000) 202; CHECK-NEXT: store volatile i32 [[T20]], ptr [[P]], align 4 203; CHECK-NEXT: [[T21:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7FF4000000000000) 204; CHECK-NEXT: store volatile i32 [[T21]], ptr [[P]], align 4 205; CHECK-NEXT: [[T22:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xFFF8000000000000) 206; CHECK-NEXT: store volatile i32 [[T22]], ptr [[P]], align 4 207; CHECK-NEXT: [[T23:%.*]] = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7FF4000000000000) 208; CHECK-NEXT: store volatile i32 [[T23]], ptr [[P]], align 4 209; CHECK-NEXT: ret void 210; 211 %t0 = call i32 @llvm.wasm.trunc.signed.i32.f64(double +0.0) 212 store volatile i32 %t0, ptr %p 213 %t1 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -0.0) 214 store volatile i32 %t1, ptr %p 215 %t2 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x0010000000000001); 0x0.0000000000001p-1022 216 store volatile i32 %t2, ptr %p 217 %t3 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x8010000000000001); -0x1.0000000000001p-1022 218 store volatile i32 %t3, ptr %p 219 %t4 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 1.0) 220 store volatile i32 %t4, ptr %p 221 %t5 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x3ff199999999999a); 0x1.199999999999ap+0 222 store volatile i32 %t5, ptr %p 223 %t6 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 1.5) 224 store volatile i32 %t6, ptr %p 225 %t7 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -1.0) 226 store volatile i32 %t7, ptr %p 227 %t8 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xbff199999999999a); -0x1.199999999999ap+0 228 store volatile i32 %t8, ptr %p 229 %t9 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -1.5) 230 store volatile i32 %t9, ptr %p 231 %t10 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xbffe666666666666); -1.9 232 store volatile i32 %t10, ptr %p 233 %t11 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -2.0) 234 store volatile i32 %t11, ptr %p 235 %t12 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 2147483647.0) 236 store volatile i32 %t12, ptr %p 237 %t13 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -2147483648.0) 238 store volatile i32 %t13, ptr %p 239 %t14 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -2147483648.9) 240 store volatile i32 %t14, ptr %p 241 %t15 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 2147483647.9) 242 store volatile i32 %t15, ptr %p 243 %t16 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 2147483648.0) 244 store volatile i32 %t16, ptr %p 245 %t17 = call i32 @llvm.wasm.trunc.signed.i32.f64(double -2147483649.0) 246 store volatile i32 %t17, ptr %p 247 %t18 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7ff0000000000000); inf 248 store volatile i32 %t18, ptr %p 249 %t19 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xfff0000000000000); -inf 250 store volatile i32 %t19, ptr %p 251 %t20 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7ff8000000000000); nan 252 store volatile i32 %t20, ptr %p 253 %t21 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7ff4000000000000); nan:0x4000000000000 254 store volatile i32 %t21, ptr %p 255 %t22 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0xfff8000000000000); -nan 256 store volatile i32 %t22, ptr %p 257 %t23 = call i32 @llvm.wasm.trunc.signed.i32.f64(double 0x7ff4000000000000); -nan:0x4000000000000 258 store volatile i32 %t23, ptr %p 259 ret void 260} 261 262define void @test_i32_trunc_f64_u(ptr %p) { 263; CHECK-LABEL: @test_i32_trunc_f64_u( 264; CHECK-NEXT: store volatile i32 0, ptr [[P:%.*]], align 4 265; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 266; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 267; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 268; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 269; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 270; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 271; CHECK-NEXT: store volatile i32 1, ptr [[P]], align 4 272; CHECK-NEXT: store volatile i32 2, ptr [[P]], align 4 273; CHECK-NEXT: store volatile i32 -2147483648, ptr [[P]], align 4 274; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 275; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 276; CHECK-NEXT: store volatile i32 0, ptr [[P]], align 4 277; CHECK-NEXT: store volatile i32 100000000, ptr [[P]], align 4 278; CHECK-NEXT: store volatile i32 -1, ptr [[P]], align 4 279; CHECK-NEXT: [[T15:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x41F0000000000000) 280; CHECK-NEXT: store volatile i32 [[T15]], ptr [[P]], align 4 281; CHECK-NEXT: [[T16:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double -1.000000e+00) 282; CHECK-NEXT: store volatile i32 [[T16]], ptr [[P]], align 4 283; CHECK-NEXT: [[T17:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 1.000000e+16) 284; CHECK-NEXT: store volatile i32 [[T17]], ptr [[P]], align 4 285; CHECK-NEXT: [[T18:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 1.000000e+30) 286; CHECK-NEXT: store volatile i32 [[T18]], ptr [[P]], align 4 287; CHECK-NEXT: [[T19:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x43E0000000000000) 288; CHECK-NEXT: store volatile i32 [[T19]], ptr [[P]], align 4 289; CHECK-NEXT: [[T20:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7FF0000000000000) 290; CHECK-NEXT: store volatile i32 [[T20]], ptr [[P]], align 4 291; CHECK-NEXT: [[T21:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xFFF0000000000000) 292; CHECK-NEXT: store volatile i32 [[T21]], ptr [[P]], align 4 293; CHECK-NEXT: [[T22:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7FF8000000000000) 294; CHECK-NEXT: store volatile i32 [[T22]], ptr [[P]], align 4 295; CHECK-NEXT: [[T23:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7FF4000000000000) 296; CHECK-NEXT: store volatile i32 [[T23]], ptr [[P]], align 4 297; CHECK-NEXT: [[T24:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xFFF8000000000000) 298; CHECK-NEXT: store volatile i32 [[T24]], ptr [[P]], align 4 299; CHECK-NEXT: [[T25:%.*]] = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xFFF4000000000000) 300; CHECK-NEXT: store volatile i32 [[T25]], ptr [[P]], align 4 301; CHECK-NEXT: ret void 302; 303 %t0 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double +0.0) 304 store volatile i32 %t0, ptr %p 305 %t1 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double -0.0) 306 store volatile i32 %t1, ptr %p 307 %t2 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x0010000000000001); 0x0.0000000000001p-1022 308 store volatile i32 %t2, ptr %p 309 %t3 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x8010000000000001); -0x0.0000000000001p-1022 310 store volatile i32 %t3, ptr %p 311 %t4 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 1.0) 312 store volatile i32 %t4, ptr %p 313 %t5 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x3ff199999999999a); 0x1.199999999999ap+0 314 store volatile i32 %t5, ptr %p 315 %t6 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 1.5) 316 store volatile i32 %t6, ptr %p 317 %t7 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x3ffe666666666666); 1.9 318 store volatile i32 %t7, ptr %p 319 %t8 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 2.0) 320 store volatile i32 %t8, ptr %p 321 %t9 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 2147483648.0) 322 store volatile i32 %t9, ptr %p 323 %t10 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 4294967295.0) 324 store volatile i32 %t10, ptr %p 325 %t11 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xbfeccccccccccccd); -0x1.ccccccccccccdp-1 326 store volatile i32 %t11, ptr %p 327 %t12 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xbfefffffffffffff); -0x1.fffffffffffffp-1 328 store volatile i32 %t12, ptr %p 329 %t13 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 100000000.0) 330 store volatile i32 %t13, ptr %p 331 %t14 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 4294967295.9) 332 store volatile i32 %t14, ptr %p 333 %t15 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 4294967296.0) 334 store volatile i32 %t15, ptr %p 335 %t16 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double -1.0) 336 store volatile i32 %t16, ptr %p 337 %t17 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 10000000000000000.0); 1e16 338 store volatile i32 %t17, ptr %p 339 %t18 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 1000000000000000000000000000000.0); 1e30 340 store volatile i32 %t18, ptr %p 341 %t19 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 9223372036854775808.0) 342 store volatile i32 %t19, ptr %p 343 %t20 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7ff0000000000000); inf 344 store volatile i32 %t20, ptr %p 345 %t21 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xfff0000000000000); -inf 346 store volatile i32 %t21, ptr %p 347 %t22 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7ff8000000000000); nan 348 store volatile i32 %t22, ptr %p 349 %t23 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0x7ff4000000000000); nan:0x4000000000000 350 store volatile i32 %t23, ptr %p 351 %t24 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xfff8000000000000); -nan 352 store volatile i32 %t24, ptr %p 353 %t25 = call i32 @llvm.wasm.trunc.unsigned.i32.f64(double 0xfff4000000000000); -nan:0x4000000000000 354 store volatile i32 %t25, ptr %p 355 ret void 356} 357 358define void @test_i64_trunc_f32_s(ptr %p) { 359; CHECK-LABEL: @test_i64_trunc_f32_s( 360; CHECK-NEXT: store volatile i64 0, ptr [[P:%.*]], align 8 361; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 362; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 363; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 364; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 365; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 366; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 367; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 368; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 369; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 370; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 371; CHECK-NEXT: store volatile i64 -2, ptr [[P]], align 8 372; CHECK-NEXT: store volatile i64 4294967296, ptr [[P]], align 8 373; CHECK-NEXT: store volatile i64 -4294967296, ptr [[P]], align 8 374; CHECK-NEXT: store volatile i64 9223371487098961920, ptr [[P]], align 8 375; CHECK-NEXT: store volatile i64 -9223372036854775808, ptr [[P]], align 8 376; CHECK-NEXT: [[T16:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x43E0000000000000) 377; CHECK-NEXT: store volatile i64 [[T16]], ptr [[P]], align 8 378; CHECK-NEXT: [[T17:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xC3E0000020000000) 379; CHECK-NEXT: store volatile i64 [[T17]], ptr [[P]], align 8 380; CHECK-NEXT: [[T18:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7FF0000000000000) 381; CHECK-NEXT: store volatile i64 [[T18]], ptr [[P]], align 8 382; CHECK-NEXT: [[T19:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xFFF0000000000000) 383; CHECK-NEXT: store volatile i64 [[T19]], ptr [[P]], align 8 384; CHECK-NEXT: [[T20:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7FF8000000000000) 385; CHECK-NEXT: store volatile i64 [[T20]], ptr [[P]], align 8 386; CHECK-NEXT: [[T21:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7FFA000000000000) 387; CHECK-NEXT: store volatile i64 [[T21]], ptr [[P]], align 8 388; CHECK-NEXT: [[T22:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xFFF8000000000000) 389; CHECK-NEXT: store volatile i64 [[T22]], ptr [[P]], align 8 390; CHECK-NEXT: [[T23:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xFFFA000000000000) 391; CHECK-NEXT: store volatile i64 [[T23]], ptr [[P]], align 8 392; CHECK-NEXT: ret void 393; 394 %t0 = call i64 @llvm.wasm.trunc.signed.i64.f32(float +0.0) 395 store volatile i64 %t0, ptr %p 396 %t1 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -0.0) 397 store volatile i64 %t1, ptr %p 398 %t2 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x36a0000000000000); 0x1p-149 399 store volatile i64 %t2, ptr %p 400 %t3 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xb6a0000000000000); -0x1p-149 401 store volatile i64 %t3, ptr %p 402 %t4 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 1.0) 403 store volatile i64 %t4, ptr %p 404 %t5 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x3ff19999a0000000); 0x1.19999ap+0 405 store volatile i64 %t5, ptr %p 406 %t6 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 1.5) 407 store volatile i64 %t6, ptr %p 408 %t7 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -1.0) 409 store volatile i64 %t7, ptr %p 410 %t8 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xbff19999a0000000); -0x1.19999ap+0 411 store volatile i64 %t8, ptr %p 412 %t9 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -1.5) 413 store volatile i64 %t9, ptr %p 414 %t10 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xbffe666660000000); -1.9 415 store volatile i64 %t10, ptr %p 416 %t11 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -2.0) 417 store volatile i64 %t11, ptr %p 418 %t12 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 4294967296.0) 419 store volatile i64 %t12, ptr %p 420 %t13 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -4294967296.0) 421 store volatile i64 %t13, ptr %p 422 %t14 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 9223371487098961920.0) 423 store volatile i64 %t14, ptr %p 424 %t15 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -9223372036854775808.0) 425 store volatile i64 %t15, ptr %p 426 %t16 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 9223372036854775808.0) 427 store volatile i64 %t16, ptr %p 428 %t17 = call i64 @llvm.wasm.trunc.signed.i64.f32(float -9223373136366403584.0) 429 store volatile i64 %t17, ptr %p 430 %t18 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7ff0000000000000); inf 431 store volatile i64 %t18, ptr %p 432 %t19 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xfff0000000000000); -inf 433 store volatile i64 %t19, ptr %p 434 %t20 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7ff8000000000000); nan 435 store volatile i64 %t20, ptr %p 436 %t21 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0x7ffa000000000000); nan:0x200000 437 store volatile i64 %t21, ptr %p 438 %t22 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xfff8000000000000); -nan 439 store volatile i64 %t22, ptr %p 440 %t23 = call i64 @llvm.wasm.trunc.signed.i64.f32(float 0xfffa000000000000); -nan:0x200000 441 store volatile i64 %t23, ptr %p 442 ret void 443} 444 445define void @test_i64_trunc_f32_u(ptr %p) { 446; CHECK-LABEL: @test_i64_trunc_f32_u( 447; CHECK-NEXT: store volatile i64 0, ptr [[P:%.*]], align 8 448; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 449; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 450; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 451; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 452; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 453; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 454; CHECK-NEXT: store volatile i64 4294967296, ptr [[P]], align 8 455; CHECK-NEXT: store volatile i64 -1099511627776, ptr [[P]], align 8 456; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 457; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 458; CHECK-NEXT: [[T11:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x43F0000000000000) 459; CHECK-NEXT: store volatile i64 [[T11]], ptr [[P]], align 8 460; CHECK-NEXT: [[T12:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float -1.000000e+00) 461; CHECK-NEXT: store volatile i64 [[T12]], ptr [[P]], align 8 462; CHECK-NEXT: [[T13:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7FF0000000000000) 463; CHECK-NEXT: store volatile i64 [[T13]], ptr [[P]], align 8 464; CHECK-NEXT: [[T14:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xFFF0000000000000) 465; CHECK-NEXT: store volatile i64 [[T14]], ptr [[P]], align 8 466; CHECK-NEXT: [[T15:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7FF8000000000000) 467; CHECK-NEXT: store volatile i64 [[T15]], ptr [[P]], align 8 468; CHECK-NEXT: [[T16:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7FFA000000000000) 469; CHECK-NEXT: store volatile i64 [[T16]], ptr [[P]], align 8 470; CHECK-NEXT: [[T17:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xFFF8000000000000) 471; CHECK-NEXT: store volatile i64 [[T17]], ptr [[P]], align 8 472; CHECK-NEXT: [[T18:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xFFFA000000000000) 473; CHECK-NEXT: store volatile i64 [[T18]], ptr [[P]], align 8 474; CHECK-NEXT: ret void 475; 476 %t0 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float +0.0) 477 store volatile i64 %t0, ptr %p 478 %t1 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float -0.0) 479 store volatile i64 %t1, ptr %p 480 %t2 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x36a0000000000000); 0x1p-149 481 store volatile i64 %t2, ptr %p 482 %t3 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xb6a0000000000000); -0x1p-149 483 store volatile i64 %t3, ptr %p 484 %t4 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 1.0) 485 store volatile i64 %t4, ptr %p 486 %t5 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x3ff19999a0000000); 0x1.19999ap+0 487 store volatile i64 %t5, ptr %p 488 %t6 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 1.5) 489 store volatile i64 %t6, ptr %p 490 %t7 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 4294967296.0) 491 store volatile i64 %t7, ptr %p 492 %t8 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 18446742974197923840.0) 493 store volatile i64 %t8, ptr %p 494 %t9 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xbfecccccc0000000); -0x1.ccccccp-1 495 store volatile i64 %t9, ptr %p 496 %t10 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xbfefffffe0000000); -0x1.fffffep-1 497 store volatile i64 %t10, ptr %p 498 %t11 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 18446744073709551616.0) 499 store volatile i64 %t11, ptr %p 500 %t12 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float -1.0) 501 store volatile i64 %t12, ptr %p 502 %t13 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7ff0000000000000); inf 503 store volatile i64 %t13, ptr %p 504 %t14 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xfff0000000000000); -inf 505 store volatile i64 %t14, ptr %p 506 %t15 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7ff8000000000000); nan 507 store volatile i64 %t15, ptr %p 508 %t16 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0x7ffa000000000000); nan:0x200000 509 store volatile i64 %t16, ptr %p 510 %t17 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xfff8000000000000); -nan 511 store volatile i64 %t17, ptr %p 512 %t18 = call i64 @llvm.wasm.trunc.unsigned.i64.f32(float 0xfffa000000000000); -nan:0x200000 513 store volatile i64 %t18, ptr %p 514 ret void 515} 516 517define void @test_i64_trunc_f64_s(ptr %p) { 518; CHECK-LABEL: @test_i64_trunc_f64_s( 519; CHECK-NEXT: store volatile i64 0, ptr [[P:%.*]], align 8 520; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 521; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 522; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 523; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 524; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 525; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 526; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 527; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 528; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 529; CHECK-NEXT: store volatile i64 -1, ptr [[P]], align 8 530; CHECK-NEXT: store volatile i64 -2, ptr [[P]], align 8 531; CHECK-NEXT: store volatile i64 4294967296, ptr [[P]], align 8 532; CHECK-NEXT: store volatile i64 -4294967296, ptr [[P]], align 8 533; CHECK-NEXT: store volatile i64 9223372036854774784, ptr [[P]], align 8 534; CHECK-NEXT: store volatile i64 -9223372036854775808, ptr [[P]], align 8 535; CHECK-NEXT: [[T16:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x43E0000000000000) 536; CHECK-NEXT: store volatile i64 [[T16]], ptr [[P]], align 8 537; CHECK-NEXT: [[T17:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xC3E0000000000001) 538; CHECK-NEXT: store volatile i64 [[T17]], ptr [[P]], align 8 539; CHECK-NEXT: [[T18:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7FF0000000000000) 540; CHECK-NEXT: store volatile i64 [[T18]], ptr [[P]], align 8 541; CHECK-NEXT: [[T19:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xFFF0000000000000) 542; CHECK-NEXT: store volatile i64 [[T19]], ptr [[P]], align 8 543; CHECK-NEXT: [[T20:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7FF8000000000000) 544; CHECK-NEXT: store volatile i64 [[T20]], ptr [[P]], align 8 545; CHECK-NEXT: [[T21:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7FF4000000000000) 546; CHECK-NEXT: store volatile i64 [[T21]], ptr [[P]], align 8 547; CHECK-NEXT: [[T22:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xFFF8000000000000) 548; CHECK-NEXT: store volatile i64 [[T22]], ptr [[P]], align 8 549; CHECK-NEXT: [[T23:%.*]] = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7FF4000000000000) 550; CHECK-NEXT: store volatile i64 [[T23]], ptr [[P]], align 8 551; CHECK-NEXT: ret void 552; 553 %t0 = call i64 @llvm.wasm.trunc.signed.i64.f64(double +0.0) 554 store volatile i64 %t0, ptr %p 555 %t1 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -0.0) 556 store volatile i64 %t1, ptr %p 557 %t2 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x0010000000000001); 0x0.0000000000001p-1022 558 store volatile i64 %t2, ptr %p 559 %t3 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x8010000000000001); -0x1.0000000000001p-1022 560 store volatile i64 %t3, ptr %p 561 %t4 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 1.0) 562 store volatile i64 %t4, ptr %p 563 %t5 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x3ff199999999999a); 0x1.199999999999ap+0 564 store volatile i64 %t5, ptr %p 565 %t6 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 1.5) 566 store volatile i64 %t6, ptr %p 567 %t7 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -1.0) 568 store volatile i64 %t7, ptr %p 569 %t8 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xbff199999999999a); -0x1.199999999999ap+0 570 store volatile i64 %t8, ptr %p 571 %t9 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -1.5) 572 store volatile i64 %t9, ptr %p 573 %t10 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xbffe666666666666); -1.9 574 store volatile i64 %t10, ptr %p 575 %t11 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -2.0) 576 store volatile i64 %t11, ptr %p 577 %t12 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 4294967296.0) 578 store volatile i64 %t12, ptr %p 579 %t13 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -4294967296.0) 580 store volatile i64 %t13, ptr %p 581 %t14 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 9223372036854774784.0) 582 store volatile i64 %t14, ptr %p 583 %t15 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -9223372036854775808.0) 584 store volatile i64 %t15, ptr %p 585 %t16 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 9223372036854775808.0) 586 store volatile i64 %t16, ptr %p 587 %t17 = call i64 @llvm.wasm.trunc.signed.i64.f64(double -9223372036854777856.0) 588 store volatile i64 %t17, ptr %p 589 %t18 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7ff0000000000000); inf 590 store volatile i64 %t18, ptr %p 591 %t19 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xfff0000000000000); -inf 592 store volatile i64 %t19, ptr %p 593 %t20 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7ff8000000000000); nan 594 store volatile i64 %t20, ptr %p 595 %t21 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7ff4000000000000); nan:0x4000000000000 596 store volatile i64 %t21, ptr %p 597 %t22 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0xfff8000000000000); -nan 598 store volatile i64 %t22, ptr %p 599 %t23 = call i64 @llvm.wasm.trunc.signed.i64.f64(double 0x7ff4000000000000); -nan:0x4000000000000 600 store volatile i64 %t23, ptr %p 601 ret void 602} 603 604define void @test_i64_trunc_f64_u(ptr %p) { 605; CHECK-LABEL: @test_i64_trunc_f64_u( 606; CHECK-NEXT: store volatile i64 0, ptr [[P:%.*]], align 8 607; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 608; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 609; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 610; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 611; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 612; CHECK-NEXT: store volatile i64 1, ptr [[P]], align 8 613; CHECK-NEXT: store volatile i64 4294967295, ptr [[P]], align 8 614; CHECK-NEXT: store volatile i64 4294967296, ptr [[P]], align 8 615; CHECK-NEXT: store volatile i64 -2048, ptr [[P]], align 8 616; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 617; CHECK-NEXT: store volatile i64 0, ptr [[P]], align 8 618; CHECK-NEXT: store volatile i64 100000000, ptr [[P]], align 8 619; CHECK-NEXT: store volatile i64 10000000000000000, ptr [[P]], align 8 620; CHECK-NEXT: store volatile i64 -9223372036854775808, ptr [[P]], align 8 621; CHECK-NEXT: [[T15:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x43F0000000000000) 622; CHECK-NEXT: store volatile i64 [[T15]], ptr [[P]], align 8 623; CHECK-NEXT: [[T16:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double -1.000000e+00) 624; CHECK-NEXT: store volatile i64 [[T16]], ptr [[P]], align 8 625; CHECK-NEXT: [[T17:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7FF0000000000000) 626; CHECK-NEXT: store volatile i64 [[T17]], ptr [[P]], align 8 627; CHECK-NEXT: [[T18:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xFFF0000000000000) 628; CHECK-NEXT: store volatile i64 [[T18]], ptr [[P]], align 8 629; CHECK-NEXT: [[T19:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7FF8000000000000) 630; CHECK-NEXT: store volatile i64 [[T19]], ptr [[P]], align 8 631; CHECK-NEXT: [[T20:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7FF4000000000000) 632; CHECK-NEXT: store volatile i64 [[T20]], ptr [[P]], align 8 633; CHECK-NEXT: [[T21:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xFFF8000000000000) 634; CHECK-NEXT: store volatile i64 [[T21]], ptr [[P]], align 8 635; CHECK-NEXT: [[T22:%.*]] = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xFFF4000000000000) 636; CHECK-NEXT: store volatile i64 [[T22]], ptr [[P]], align 8 637; CHECK-NEXT: ret void 638; 639 %t0 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double +0.0) 640 store volatile i64 %t0, ptr %p 641 %t1 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double -0.0) 642 store volatile i64 %t1, ptr %p 643 %t2 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x0010000000000001); 0x0.0000000000001p-1022 644 store volatile i64 %t2, ptr %p 645 %t3 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x8010000000000001); -0x0.0000000000001p-1022 646 store volatile i64 %t3, ptr %p 647 %t4 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 1.0) 648 store volatile i64 %t4, ptr %p 649 %t5 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x3ff199999999999a); 0x1.199999999999ap+0 650 store volatile i64 %t5, ptr %p 651 %t6 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 1.5) 652 store volatile i64 %t6, ptr %p 653 %t7 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 4294967295.0) 654 store volatile i64 %t7, ptr %p 655 %t8 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 4294967296.0) 656 store volatile i64 %t8, ptr %p 657 %t9 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 18446744073709549568.0) 658 store volatile i64 %t9, ptr %p 659 %t10 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xbfeccccccccccccd); -0x1.ccccccccccccdp-1 660 store volatile i64 %t10, ptr %p 661 %t11 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xbfefffffffffffff); -0x1.fffffffffffffp-1 662 store volatile i64 %t11, ptr %p 663 %t12 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 100000000.0); 1e8 664 store volatile i64 %t12, ptr %p 665 %t13 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 10000000000000000.0); 1e16 666 store volatile i64 %t13, ptr %p 667 %t14 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 9223372036854775808.0); 668 store volatile i64 %t14, ptr %p 669 %t15 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 18446744073709551616.0) 670 store volatile i64 %t15, ptr %p 671 %t16 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double -1.0) 672 store volatile i64 %t16, ptr %p 673 %t17 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7ff0000000000000); inf 674 store volatile i64 %t17, ptr %p 675 %t18 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xfff0000000000000); -inf 676 store volatile i64 %t18, ptr %p 677 %t19 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7ff8000000000000); nan 678 store volatile i64 %t19, ptr %p 679 %t20 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0x7ff4000000000000); nan:0x4000000000000 680 store volatile i64 %t20, ptr %p 681 %t21 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xfff8000000000000); -nan 682 store volatile i64 %t21, ptr %p 683 %t22 = call i64 @llvm.wasm.trunc.unsigned.i64.f64(double 0xfff4000000000000); -nan:0x4000000000000 684 store volatile i64 %t22, ptr %p 685 ret void 686} 687