1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4define <4 x i32> @vec_select(<4 x i32> %a, <4 x i32> %b) { 5; CHECK-LABEL: @vec_select( 6; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]] 7; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt <4 x i32> [[B:%.*]], zeroinitializer 8; CHECK-NEXT: [[T2:%.*]] = select <4 x i1> [[ISNEG]], <4 x i32> zeroinitializer, <4 x i32> [[A]] 9; CHECK-NEXT: [[ISNEG1:%.*]] = icmp slt <4 x i32> [[B]], zeroinitializer 10; CHECK-NEXT: [[T3:%.*]] = select <4 x i1> [[ISNEG1]], <4 x i32> [[SUB]], <4 x i32> zeroinitializer 11; CHECK-NEXT: [[COND:%.*]] = or <4 x i32> [[T2]], [[T3]] 12; CHECK-NEXT: ret <4 x i32> [[COND]] 13; 14 %cmp = icmp slt <4 x i32> %b, zeroinitializer 15 %sext = sext <4 x i1> %cmp to <4 x i32> 16 %sub = sub nsw <4 x i32> zeroinitializer, %a 17 %t0 = icmp slt <4 x i32> %sext, zeroinitializer 18 %sext3 = sext <4 x i1> %t0 to <4 x i32> 19 %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1> 20 %t2 = and <4 x i32> %a, %t1 21 %t3 = and <4 x i32> %sext3, %sub 22 %cond = or <4 x i32> %t2, %t3 23 ret <4 x i32> %cond 24} 25 26define <4 x i32> @vec_select_alternate_sign_bit_test(<4 x i32> %a, <4 x i32> %b) { 27; CHECK-LABEL: @vec_select_alternate_sign_bit_test( 28; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]] 29; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <4 x i32> [[B:%.*]], zeroinitializer 30; CHECK-NEXT: [[COND:%.*]] = select <4 x i1> [[CMP1]], <4 x i32> [[A]], <4 x i32> [[SUB]] 31; CHECK-NEXT: ret <4 x i32> [[COND]] 32; 33 %cmp = icmp sgt <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1> 34 %sext = sext <4 x i1> %cmp to <4 x i32> 35 %sub = sub nsw <4 x i32> zeroinitializer, %a 36 %t0 = icmp slt <4 x i32> %sext, zeroinitializer 37 %sext3 = sext <4 x i1> %t0 to <4 x i32> 38 %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1> 39 %t2 = and <4 x i32> %a, %t1 40 %t3 = and <4 x i32> %sext3, %sub 41 %cond = or <4 x i32> %t2, %t3 42 ret <4 x i32> %cond 43} 44 45define <2 x i32> @is_negative_poison_elt(<2 x i32> %a) { 46; CHECK-LABEL: @is_negative_poison_elt( 47; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr <2 x i32> [[A:%.*]], splat (i32 31) 48; CHECK-NEXT: ret <2 x i32> [[A_LOBIT]] 49; 50 %cmp = icmp slt <2 x i32> %a, <i32 0, i32 poison> 51 %sext = sext <2 x i1> %cmp to <2 x i32> 52 ret <2 x i32> %sext 53 54} 55 56define <2 x i32> @is_positive_poison_elt(<2 x i32> %a) { 57; CHECK-LABEL: @is_positive_poison_elt( 58; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[A:%.*]], <i32 poison, i32 -1> 59; CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i32> 60; CHECK-NEXT: ret <2 x i32> [[SEXT]] 61; 62 %cmp = icmp sgt <2 x i32> %a, <i32 poison, i32 -1> 63 %sext = sext <2 x i1> %cmp to <2 x i32> 64 ret <2 x i32> %sext 65} 66 67