xref: /llvm-project/llvm/test/Transforms/InstCombine/select_meta.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
2
3; RUN: opt < %s -passes=instcombine -S | FileCheck %s
4
5define i32 @foo(i32) local_unnamed_addr #0  {
6; CHECK-LABEL: @foo(
7; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2
8; CHECK-NEXT:    [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof [[PROF0:![0-9]+]]
9; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[TMP0]], [[DOTV]]
10; CHECK-NEXT:    ret i32 [[TMP3]]
11;
12  %2 = icmp sgt i32 %0, 2
13  %3 = add nsw i32 %0, 20
14  %4 = add i32 %0, -20
15  select i1 %2, i32 %3, i32 %4, !prof !1
16  ret i32 %5
17}
18
19define i8 @shrink_select(i1 %cond, i32 %x) {
20; CHECK-LABEL: @shrink_select(
21; CHECK-NEXT:    [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
22; CHECK-NEXT:    [[TRUNC:%.*]] = select i1 [[COND:%.*]], i8 [[TMP1]], i8 42, !prof [[PROF0]]
23; CHECK-NEXT:    ret i8 [[TRUNC]]
24;
25  %sel = select i1 %cond, i32 %x, i32 42, !prof !1
26  %trunc = trunc i32 %sel to i8
27  ret i8 %trunc
28}
29
30define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, ptr %ptr1, ptr %ptr2) {
31; CHECK-LABEL: @min_max_bitcast(
32; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
33; CHECK-NEXT:    [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]], !prof [[PROF0]]
34; CHECK-NEXT:    [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]], !prof [[PROF0]]
35; CHECK-NEXT:    store <4 x float> [[SEL1_V]], ptr [[PTR1:%.*]], align 16
36; CHECK-NEXT:    store <4 x float> [[SEL2_V]], ptr [[PTR2:%.*]], align 16
37; CHECK-NEXT:    ret void
38;
39  %cmp = fcmp olt <4 x float> %a, %b
40  %bc1 = bitcast <4 x float> %a to <4 x i32>
41  %bc2 = bitcast <4 x float> %b to <4 x i32>
42  %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2, !prof !1
43  %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1, !prof !1
44  store <4 x i32> %sel1, ptr %ptr1
45  store <4 x i32> %sel2, ptr %ptr2
46  ret void
47}
48
49define i32 @foo2(i32, i32) local_unnamed_addr #0  {
50; CHECK-LABEL: @foo2(
51; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2
52; CHECK-NEXT:    [[TMP4:%.*]] = sub i32 0, [[TMP1:%.*]]
53; CHECK-NEXT:    [[DOTP:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP4]], !prof [[PROF0]]
54; CHECK-NEXT:    [[TMP5:%.*]] = add i32 [[TMP0]], [[DOTP]]
55; CHECK-NEXT:    ret i32 [[TMP5]]
56;
57  %3 = icmp sgt i32 %0, 2
58  %4 = add nsw i32 %0, %1
59  %5 = sub nsw i32 %0, %1
60  select i1 %3, i32 %4, i32 %5, !prof !1
61  ret i32 %6
62}
63
64define i64 @test43(i32 %a) nounwind {
65; CHECK-LABEL: @test43(
66; CHECK-NEXT:    [[NARROW:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 0)
67; CHECK-NEXT:    [[MAX:%.*]] = zext nneg i32 [[NARROW]] to i64
68; CHECK-NEXT:    ret i64 [[MAX]]
69;
70  %a_ext = sext i32 %a to i64
71  %is_a_nonnegative = icmp sgt i32 %a, -1
72  %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0, !prof !1
73  ret i64 %max
74}
75
76define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
77; CHECK-LABEL: @scalar_select_of_vectors_sext(
78; CHECK-NEXT:    [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer, !prof [[PROF0]]
79; CHECK-NEXT:    [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
80; CHECK-NEXT:    ret <2 x i32> [[R]]
81;
82  %ccax = sext <2 x i1> %cca to <2 x i32>
83  %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>, !prof !1
84  ret <2 x i32> %r
85}
86
87
88define i16 @t7(i32 %a) {
89; CHECK-LABEL: @t7(
90; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 -32768)
91; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
92; CHECK-NEXT:    ret i16 [[TMP2]]
93;
94  %1 = icmp slt i32 %a, -32768
95  %2 = trunc i32 %a to i16
96  %3 = select i1 %1, i16 %2, i16 -32768, !prof !1
97  ret i16 %3
98}
99
100define i32 @abs_nabs_x01(i32 %x) {
101; CHECK-LABEL: @abs_nabs_x01(
102; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
103; CHECK-NEXT:    ret i32 [[TMP1]]
104;
105  %cmp = icmp sgt i32 %x, -1
106  %sub = sub nsw i32 0, %x
107  %cond = select i1 %cmp, i32 %sub, i32 %x, !prof !1
108  %cmp1 = icmp sgt i32 %cond, -1
109  %sub16 = sub nsw i32 0, %cond
110  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16, !prof !2
111  ret i32 %cond18
112}
113
114; Swap predicate / metadata order
115
116define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
117; CHECK-LABEL: @abs_nabs_x01_vec(
118; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 false)
119; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
120;
121  %cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
122  %sub = sub nsw <2 x i32> zeroinitializer, %x
123  %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x, !prof !1
124  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
125  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
126  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16, !prof !2
127  ret <2 x i32> %cond18
128}
129
130; SMAX(SMAX(x, y), x) -> SMAX(x, y)
131define i32 @test30(i32 %x, i32 %y) {
132; CHECK-LABEL: @test30(
133; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
134; CHECK-NEXT:    ret i32 [[COND]]
135;
136  %cmp = icmp sgt i32 %x, %y
137  %cond = select i1 %cmp, i32 %x, i32 %y, !prof !1
138  %cmp5 = icmp sgt i32 %cond, %x
139  %retval = select i1 %cmp5, i32 %cond, i32 %x, !prof !2
140  ret i32 %retval
141}
142
143; SMAX(SMAX(75, X), 36) -> SMAX(X, 75)
144define i32 @test70(i32 %x) {
145; CHECK-LABEL: @test70(
146; CHECK-NEXT:    [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
147; CHECK-NEXT:    ret i32 [[COND]]
148;
149  %cmp = icmp slt i32 %x, 75
150  %cond = select i1 %cmp, i32 75, i32 %x, !prof !1
151  %cmp3 = icmp slt i32 %cond, 36
152  %retval = select i1 %cmp3, i32 36, i32 %cond, !prof !2
153  ret i32 %retval
154}
155
156; Swap predicate / metadata order
157; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
158define i32 @test72(i32 %x) {
159; CHECK-LABEL: @test72(
160; CHECK-NEXT:    [[RETVAL:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
161; CHECK-NEXT:    ret i32 [[RETVAL]]
162;
163  %cmp = icmp sgt i32 %x, 92
164  %cond = select i1 %cmp, i32 92, i32 %x, !prof !1
165  %cmp3 = icmp sgt i32 %cond, 11
166  %retval = select i1 %cmp3, i32 11, i32 %cond, !prof !2
167  ret i32 %retval
168}
169
170; Swap predicate / metadata order
171; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
172define i32 @test74(i32 %x) {
173; CHECK-LABEL: @test74(
174; CHECK-NEXT:    [[RETVAL:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
175; CHECK-NEXT:    ret i32 [[RETVAL]]
176;
177  %cmp = icmp slt i32 %x, 36
178  %cond = select i1 %cmp, i32 36, i32 %x, !prof !1
179  %cmp3 = icmp slt i32 %cond, 75
180  %retval = select i1 %cmp3, i32 75, i32 %cond, !prof !2
181  ret i32 %retval
182}
183
184; The xor is moved after the select. The metadata remains the same because the select operands are not swapped only inverted.
185define i32 @smin1(i32 %x) {
186; CHECK-LABEL: @smin1(
187; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 0)
188; CHECK-NEXT:    [[SEL:%.*]] = xor i32 [[TMP1]], -1
189; CHECK-NEXT:    ret i32 [[SEL]]
190;
191  %not_x = xor i32 %x, -1
192  %cmp = icmp sgt i32 %x, 0
193  %sel = select i1 %cmp, i32 %not_x, i32 -1, !prof !1
194  ret i32 %sel
195}
196
197; The compare should change, and the metadata is swapped because the select operands are swapped and inverted.
198define i32 @smin2(i32 %x) {
199; CHECK-LABEL: @smin2(
200; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 0)
201; CHECK-NEXT:    [[SEL:%.*]] = xor i32 [[TMP1]], -1
202; CHECK-NEXT:    ret i32 [[SEL]]
203;
204  %not_x = xor i32 %x, -1
205  %cmp = icmp slt i32 %x, 0
206  %sel = select i1 %cmp, i32 -1, i32 %not_x, !prof !1
207  ret i32 %sel
208}
209
210; The xor is moved after the select. The metadata remains the same because the select operands are not swapped only inverted.
211define i32 @smax1(i32 %x) {
212; CHECK-LABEL: @smax1(
213; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 0)
214; CHECK-NEXT:    [[SEL:%.*]] = xor i32 [[TMP1]], -1
215; CHECK-NEXT:    ret i32 [[SEL]]
216;
217  %not_x = xor i32 %x, -1
218  %cmp = icmp slt i32 %x, 0
219  %sel = select i1 %cmp, i32 %not_x, i32 -1, !prof !1
220  ret i32 %sel
221}
222
223; The compare should change, and the metadata is swapped because the select operands are swapped and inverted.
224define i32 @smax2(i32 %x) {
225; CHECK-LABEL: @smax2(
226; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 0)
227; CHECK-NEXT:    [[SEL:%.*]] = xor i32 [[TMP1]], -1
228; CHECK-NEXT:    ret i32 [[SEL]]
229;
230  %not_x = xor i32 %x, -1
231  %cmp = icmp sgt i32 %x, 0
232  %sel = select i1 %cmp, i32 -1, i32 %not_x, !prof !1
233  ret i32 %sel
234}
235
236; The compare should change, but the metadata remains the same because the select operands are not swapped.
237define i32 @umin1(i32 %x) {
238; CHECK-LABEL: @umin1(
239; CHECK-NEXT:    [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 -2147483648)
240; CHECK-NEXT:    ret i32 [[SEL]]
241;
242  %cmp = icmp sgt i32 %x, -1
243  %sel = select i1 %cmp, i32 %x, i32 -2147483648, !prof !1
244  ret i32 %sel
245}
246
247; The compare should change, and the metadata is swapped because the select operands are swapped.
248define i32 @umin2(i32 %x) {
249; CHECK-LABEL: @umin2(
250; CHECK-NEXT:    [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
251; CHECK-NEXT:    ret i32 [[SEL]]
252;
253  %cmp = icmp slt i32 %x, 0
254  %sel = select i1 %cmp, i32 2147483647, i32 %x, !prof !1
255  ret i32 %sel
256}
257
258; The compare should change, but the metadata remains the same because the select operands are not swapped.
259define i32 @umax1(i32 %x) {
260; CHECK-LABEL: @umax1(
261; CHECK-NEXT:    [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 2147483647)
262; CHECK-NEXT:    ret i32 [[SEL]]
263;
264  %cmp = icmp slt i32 %x, 0
265  %sel = select i1 %cmp, i32 %x, i32 2147483647, !prof !1
266  ret i32 %sel
267}
268
269; The compare should change, and the metadata is swapped because the select operands are swapped.
270define i32 @umax2(i32 %x) {
271; CHECK-LABEL: @umax2(
272; CHECK-NEXT:    [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
273; CHECK-NEXT:    ret i32 [[SEL]]
274;
275  %cmp = icmp sgt i32 %x, -1
276  %sel = select i1 %cmp, i32 -2147483648, i32 %x, !prof !1
277  ret i32 %sel
278}
279
280; The condition is inverted, and the select ops are swapped. The metadata should be swapped.
281
282define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) {
283; CHECK-LABEL: @not_cond(
284; CHECK-NEXT:    [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof [[PROF1:![0-9]+]]
285; CHECK-NEXT:    ret i32 [[R]]
286;
287  %notc = xor i1 %c, true
288  %r = select i1 %notc, i32 %tv, i32 %fv, !prof !1
289  ret i32 %r
290}
291
292; The condition is inverted, and the select ops are swapped. The metadata should be swapped.
293
294define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
295; CHECK-LABEL: @not_cond_vec(
296; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof [[PROF1]]
297; CHECK-NEXT:    ret <2 x i32> [[R]]
298;
299  %notc = xor <2 x i1> %c, <i1 true, i1 true>
300  %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1
301  ret <2 x i32> %r
302}
303
304; Should match vector 'not' with poison element.
305; The condition is inverted, and the select ops are swapped. The metadata should be swapped.
306
307define <2 x i32> @not_cond_vec_poison(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
308; CHECK-LABEL: @not_cond_vec_poison(
309; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof [[PROF1]]
310; CHECK-NEXT:    ret <2 x i32> [[R]]
311;
312  %notc = xor <2 x i1> %c, <i1 poison, i1 true>
313  %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1
314  ret <2 x i32> %r
315}
316
317define i64 @select_add(i1 %cond, i64 %x, i64 %y) {
318; CHECK-LABEL: @select_add(
319; CHECK-NEXT:    [[OP:%.*]] = select i1 [[COND:%.*]], i64 [[Y:%.*]], i64 0, !prof [[PROF0]], !unpredictable [[META2:![0-9]+]]
320; CHECK-NEXT:    [[RET:%.*]] = add i64 [[X:%.*]], [[OP]]
321; CHECK-NEXT:    ret i64 [[RET]]
322;
323  %op = add i64 %x, %y
324  %ret = select i1 %cond, i64 %op, i64 %x, !prof !1, !unpredictable !3
325  ret i64 %ret
326}
327
328define <2 x i32> @select_or(<2 x i1> %cond, <2 x i32> %x, <2 x i32> %y) {
329; CHECK-LABEL: @select_or(
330; CHECK-NEXT:    [[OP:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> zeroinitializer, !prof [[PROF0]], !unpredictable [[META2]]
331; CHECK-NEXT:    [[RET:%.*]] = or <2 x i32> [[X:%.*]], [[OP]]
332; CHECK-NEXT:    ret <2 x i32> [[RET]]
333;
334  %op = or <2 x i32> %x, %y
335  %ret = select <2 x i1> %cond, <2 x i32> %op, <2 x i32> %x, !prof !1, !unpredictable !3
336  ret <2 x i32> %ret
337}
338
339define i17 @select_sub(i1 %cond, i17 %x, i17 %y) {
340; CHECK-LABEL: @select_sub(
341; CHECK-NEXT:    [[OP:%.*]] = select i1 [[COND:%.*]], i17 [[Y:%.*]], i17 0, !prof [[PROF0]], !unpredictable [[META2]]
342; CHECK-NEXT:    [[RET:%.*]] = sub i17 [[X:%.*]], [[OP]]
343; CHECK-NEXT:    ret i17 [[RET]]
344;
345  %op = sub i17 %x, %y
346  %ret = select i1 %cond, i17 %op, i17 %x, !prof !1, !unpredictable !3
347  ret i17 %ret
348}
349
350define i128 @select_ashr(i1 %cond, i128 %x, i128 %y) {
351; CHECK-LABEL: @select_ashr(
352; CHECK-NEXT:    [[OP:%.*]] = select i1 [[COND:%.*]], i128 [[Y:%.*]], i128 0, !prof [[PROF0]], !unpredictable [[META2]]
353; CHECK-NEXT:    [[RET:%.*]] = ashr i128 [[X:%.*]], [[OP]]
354; CHECK-NEXT:    ret i128 [[RET]]
355;
356  %op = ashr i128 %x, %y
357  %ret = select i1 %cond, i128 %op, i128 %x, !prof !1, !unpredictable !3
358  ret i128 %ret
359}
360
361define double @select_fmul(i1 %cond, double %x, double %y) {
362; CHECK-LABEL: @select_fmul(
363; CHECK-NEXT:    [[OP:%.*]] = select nnan i1 [[COND:%.*]], double [[Y:%.*]], double 1.000000e+00, !prof [[PROF0]], !unpredictable [[META2]]
364; CHECK-NEXT:    [[RET:%.*]] = fmul double [[X:%.*]], [[OP]]
365; CHECK-NEXT:    ret double [[RET]]
366;
367  %op = fmul double %x, %y
368  %ret = select nnan i1 %cond, double %op, double %x, !prof !1, !unpredictable !3
369  ret double %ret
370}
371
372define <2 x float> @select_fdiv(i1 %cond, <2 x float> %x, <2 x float> %y) {
373; CHECK-LABEL: @select_fdiv(
374; CHECK-NEXT:    [[OP:%.*]] = select nnan i1 [[COND:%.*]], <2 x float> [[Y:%.*]], <2 x float> splat (float 1.000000e+00), !prof [[PROF0]], !unpredictable [[META2]]
375; CHECK-NEXT:    [[RET:%.*]] = fdiv <2 x float> [[X:%.*]], [[OP]]
376; CHECK-NEXT:    ret <2 x float> [[RET]]
377;
378  %op = fdiv <2 x float> %x, %y
379  %ret = select nnan i1 %cond, <2 x float> %op, <2 x float> %x, !prof !1, !unpredictable !3
380  ret <2 x float> %ret
381}
382
383!1 = !{!"branch_weights", i32 2, i32 10}
384!2 = !{!"branch_weights", i32 3, i32 10}
385!3 = !{}
386
387;.
388; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind }
389; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
390;.
391; CHECK: [[PROF0]] = !{!"branch_weights", i32 2, i32 10}
392; CHECK: [[PROF1]] = !{!"branch_weights", i32 10, i32 2}
393; CHECK: [[META2]] = !{}
394;.
395