1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4target datalayout = "n8:16:32:64" 5 6declare void @use(i8) 7declare void @use_vec(<2 x i8>) 8 9define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { 10; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2( 11; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 12; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 13; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 14; CHECK-NEXT: ret i32 [[SELECT]] 15; 16 %and = and i32 %x, 1 17 %cmp = icmp eq i32 %and, 0 18 %or = or i32 %y, 2 19 %select = select i1 %cmp, i32 %y, i32 %or 20 ret i32 %select 21} 22 23define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec(<2 x i32> %x, <2 x i32> %y) { 24; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec( 25; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 1) 26; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 2) 27; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 28; CHECK-NEXT: ret <2 x i32> [[SELECT]] 29; 30 %and = and <2 x i32> %x, <i32 1, i32 1> 31 %cmp = icmp eq <2 x i32> %and, zeroinitializer 32 %or = or <2 x i32> %y, <i32 2, i32 2> 33 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 34 ret <2 x i32> %select 35} 36 37define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec_poison1(<2 x i32> %x, <2 x i32> %y) { 38; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec_poison1( 39; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 1, i32 poison> 40; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw <2 x i32> [[AND]], splat (i32 1) 41; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 42; CHECK-NEXT: ret <2 x i32> [[SELECT]] 43; 44 %and = and <2 x i32> %x, <i32 1, i32 poison> 45 %cmp = icmp eq <2 x i32> %and, zeroinitializer 46 %or = or <2 x i32> %y, <i32 2, i32 2> 47 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 48 ret <2 x i32> %select 49} 50 51define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec_poison2(<2 x i32> %x, <2 x i32> %y) { 52; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec_poison2( 53; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 1) 54; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 2) 55; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 56; CHECK-NEXT: ret <2 x i32> [[SELECT]] 57; 58 %and = and <2 x i32> %x, <i32 1, i32 1> 59 %cmp = icmp eq <2 x i32> %and, <i32 0, i32 poison> 60 %or = or <2 x i32> %y, <i32 2, i32 2> 61 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 62 ret <2 x i32> %select 63} 64 65define <2 x i32> @select_icmp_eq_and_1_0_or_2_vec_poison3(<2 x i32> %x, <2 x i32> %y) { 66; CHECK-LABEL: @select_icmp_eq_and_1_0_or_2_vec_poison3( 67; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 1) 68; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 2) 69; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 70; CHECK-NEXT: ret <2 x i32> [[SELECT]] 71; 72 %and = and <2 x i32> %x, <i32 1, i32 1> 73 %cmp = icmp eq <2 x i32> %and, zeroinitializer 74 %or = or <2 x i32> %y, <i32 2, i32 poison> 75 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 76 ret <2 x i32> %select 77} 78 79define i32 @select_icmp_eq_and_1_0_xor_2(i32 %x, i32 %y) { 80; CHECK-LABEL: @select_icmp_eq_and_1_0_xor_2( 81; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 82; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 83; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[TMP1]] 84; CHECK-NEXT: ret i32 [[SELECT]] 85; 86 %and = and i32 %x, 1 87 %cmp = icmp eq i32 %and, 0 88 %xor = xor i32 %y, 2 89 %select = select i1 %cmp, i32 %y, i32 %xor 90 ret i32 %select 91} 92 93define i32 @select_icmp_eq_and_1_0_and_not_2(i32 %x, i32 %y) { 94; CHECK-LABEL: @select_icmp_eq_and_1_0_and_not_2( 95; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 96; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 97; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 98; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 99; CHECK-NEXT: ret i32 [[SELECT]] 100; 101 %and = and i32 %x, 1 102 %cmp = icmp eq i32 %and, 0 103 %and2 = and i32 %y, -3 104 %select = select i1 %cmp, i32 %y, i32 %and2 105 ret i32 %select 106} 107 108define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { 109; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8( 110; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 2 111; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 8 112; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 113; CHECK-NEXT: ret i32 [[SELECT]] 114; 115 %and = and i32 %x, 32 116 %cmp = icmp eq i32 %and, 0 117 %or = or i32 %y, 8 118 %select = select i1 %cmp, i32 %y, i32 %or 119 ret i32 %select 120} 121 122define <2 x i32> @select_icmp_eq_and_32_0_or_8_vec(<2 x i32> %x, <2 x i32> %y) { 123; CHECK-LABEL: @select_icmp_eq_and_32_0_or_8_vec( 124; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i32> [[X:%.*]], splat (i32 2) 125; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 8) 126; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 127; CHECK-NEXT: ret <2 x i32> [[SELECT]] 128; 129 %and = and <2 x i32> %x, <i32 32, i32 32> 130 %cmp = icmp eq <2 x i32> %and, zeroinitializer 131 %or = or <2 x i32> %y, <i32 8, i32 8> 132 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 133 ret <2 x i32> %select 134} 135 136define i32 @select_icmp_eq_and_32_0_xor_8(i32 %x, i32 %y) { 137; CHECK-LABEL: @select_icmp_eq_and_32_0_xor_8( 138; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 2 139; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 8 140; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[TMP1]] 141; CHECK-NEXT: ret i32 [[SELECT]] 142; 143 %and = and i32 %x, 32 144 %cmp = icmp eq i32 %and, 0 145 %xor = xor i32 %y, 8 146 %select = select i1 %cmp, i32 %y, i32 %xor 147 ret i32 %select 148} 149 150define i32 @select_icmp_eq_and_32_0_and_not_8(i32 %x, i32 %y) { 151; CHECK-LABEL: @select_icmp_eq_and_32_0_and_not_8( 152; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 153; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 154; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -9 155; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 156; CHECK-NEXT: ret i32 [[SELECT]] 157; 158 %and = and i32 %x, 32 159 %cmp = icmp eq i32 %and, 0 160 %and2 = and i32 %y, -9 161 %select = select i1 %cmp, i32 %y, i32 %and2 162 ret i32 %select 163} 164 165define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { 166; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096( 167; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 168; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 169; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 170; CHECK-NEXT: ret i32 [[SELECT]] 171; 172 %and = and i32 %x, 4096 173 %cmp = icmp ne i32 0, %and 174 %or = or i32 %y, 4096 175 %select = select i1 %cmp, i32 %y, i32 %or 176 ret i32 %select 177} 178 179define <2 x i32> @select_icmp_ne_0_and_4096_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 180; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_4096_vec( 181; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 4096) 182; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], splat (i32 4096) 183; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 184; CHECK-NEXT: ret <2 x i32> [[SELECT]] 185; 186 %and = and <2 x i32> %x, <i32 4096, i32 4096> 187 %cmp = icmp ne <2 x i32> zeroinitializer, %and 188 %or = or <2 x i32> %y, <i32 4096, i32 4096> 189 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 190 ret <2 x i32> %select 191} 192 193define i32 @select_icmp_ne_0_and_4096_xor_4096(i32 %x, i32 %y) { 194; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_4096( 195; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 196; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], [[Y:%.*]] 197; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP1]], 4096 198; CHECK-NEXT: ret i32 [[SELECT]] 199; 200 %and = and i32 %x, 4096 201 %cmp = icmp ne i32 0, %and 202 %xor = xor i32 %y, 4096 203 %select = select i1 %cmp, i32 %y, i32 %xor 204 ret i32 %select 205} 206 207define i32 @select_icmp_ne_0_and_4096_and_not_4096(i32 %x, i32 %y) { 208; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_4096( 209; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 210; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 211; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 212; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 213; CHECK-NEXT: ret i32 [[SELECT]] 214; 215 %and = and i32 %x, 4096 216 %cmp = icmp ne i32 0, %and 217 %and2 = and i32 %y, -4097 218 %select = select i1 %cmp, i32 %y, i32 %and2 219 ret i32 %select 220} 221 222define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { 223; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096( 224; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 225; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[AND]] 226; CHECK-NEXT: ret i32 [[SELECT]] 227; 228 %and = and i32 %x, 4096 229 %cmp = icmp eq i32 %and, 0 230 %or = or i32 %y, 4096 231 %select = select i1 %cmp, i32 %y, i32 %or 232 ret i32 %select 233} 234 235define <2 x i32> @select_icmp_eq_and_4096_0_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 236; CHECK-LABEL: @select_icmp_eq_and_4096_0_or_4096_vec( 237; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 4096) 238; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[AND]] 239; CHECK-NEXT: ret <2 x i32> [[SELECT]] 240; 241 %and = and <2 x i32> %x, <i32 4096, i32 4096> 242 %cmp = icmp eq <2 x i32> %and, zeroinitializer 243 %or = or <2 x i32> %y, <i32 4096, i32 4096> 244 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 245 ret <2 x i32> %select 246} 247 248define i32 @select_icmp_eq_and_4096_0_xor_4096(i32 %x, i32 %y) { 249; CHECK-LABEL: @select_icmp_eq_and_4096_0_xor_4096( 250; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 251; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[AND]] 252; CHECK-NEXT: ret i32 [[SELECT]] 253; 254 %and = and i32 %x, 4096 255 %cmp = icmp eq i32 %and, 0 256 %xor = xor i32 %y, 4096 257 %select = select i1 %cmp, i32 %y, i32 %xor 258 ret i32 %select 259} 260 261define i32 @select_icmp_eq_and_4096_0_and_not_4096(i32 %x, i32 %y) { 262; CHECK-LABEL: @select_icmp_eq_and_4096_0_and_not_4096( 263; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 264; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 265; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 266; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 267; CHECK-NEXT: ret i32 [[SELECT]] 268; 269 %and = and i32 %x, 4096 270 %cmp = icmp eq i32 %and, 0 271 %and2 = and i32 %y, -4097 272 %select = select i1 %cmp, i32 %y, i32 %and2 273 ret i32 %select 274} 275 276define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { 277; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1( 278; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 279; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 280; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP2]] 281; CHECK-NEXT: ret i32 [[SELECT]] 282; 283 %and = and i64 %x, 1 284 %cmp = icmp eq i64 %and, 0 285 %or = or i32 %y, 1 286 %select = select i1 %cmp, i32 %y, i32 %or 287 ret i32 %select 288} 289 290define <2 x i32> @select_icmp_eq_0_and_1_or_1_vec(<2 x i64> %x, <2 x i32> %y) { 291; CHECK-LABEL: @select_icmp_eq_0_and_1_or_1_vec( 292; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> [[X:%.*]] to <2 x i32> 293; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], splat (i32 1) 294; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP2]] 295; CHECK-NEXT: ret <2 x i32> [[SELECT]] 296; 297 %and = and <2 x i64> %x, <i64 1, i64 1> 298 %cmp = icmp eq <2 x i64> %and, zeroinitializer 299 %or = or <2 x i32> %y, <i32 1, i32 1> 300 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 301 ret <2 x i32> %select 302} 303 304define i32 @select_icmp_eq_0_and_1_xor_1(i64 %x, i32 %y) { 305; CHECK-LABEL: @select_icmp_eq_0_and_1_xor_1( 306; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i32 307; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 308; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[TMP2]] 309; CHECK-NEXT: ret i32 [[SELECT]] 310; 311 %and = and i64 %x, 1 312 %cmp = icmp eq i64 %and, 0 313 %xor = xor i32 %y, 1 314 %select = select i1 %cmp, i32 %y, i32 %xor 315 ret i32 %select 316} 317 318define i32 @select_icmp_eq_0_and_1_and_not_1(i64 %x, i32 %y) { 319; CHECK-LABEL: @select_icmp_eq_0_and_1_and_not_1( 320; CHECK-NEXT: [[AND:%.*]] = and i64 [[X:%.*]], 1 321; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[AND]], 0 322; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2 323; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 324; CHECK-NEXT: ret i32 [[SELECT]] 325; 326 %and = and i64 %x, 1 327 %cmp = icmp eq i64 %and, 0 328 %and2 = and i32 %y, -2 329 %select = select i1 %cmp, i32 %y, i32 %and2 330 ret i32 %select 331} 332 333define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { 334; CHECK-LABEL: @select_icmp_ne_0_and_4096_or_32( 335; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 7 336; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 32 337; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 32 338; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP2]] 339; CHECK-NEXT: ret i32 [[SELECT]] 340; 341 %and = and i32 %x, 4096 342 %cmp = icmp ne i32 0, %and 343 %or = or i32 %y, 32 344 %select = select i1 %cmp, i32 %y, i32 %or 345 ret i32 %select 346} 347 348define i32 @select_icmp_ne_0_and_4096_xor_32(i32 %x, i32 %y) { 349; CHECK-LABEL: @select_icmp_ne_0_and_4096_xor_32( 350; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 7 351; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 32 352; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], [[Y:%.*]] 353; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP2]], 32 354; CHECK-NEXT: ret i32 [[SELECT]] 355; 356 %and = and i32 %x, 4096 357 %cmp = icmp ne i32 0, %and 358 %xor = xor i32 %y, 32 359 %select = select i1 %cmp, i32 %y, i32 %xor 360 ret i32 %select 361} 362 363define i32 @select_icmp_ne_0_and_4096_and_not_32(i32 %x, i32 %y) { 364; CHECK-LABEL: @select_icmp_ne_0_and_4096_and_not_32( 365; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 366; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 367; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -33 368; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 369; CHECK-NEXT: ret i32 [[SELECT]] 370; 371 %and = and i32 %x, 4096 372 %cmp = icmp ne i32 0, %and 373 %and2 = and i32 %y, -33 374 %select = select i1 %cmp, i32 %y, i32 %and2 375 ret i32 %select 376} 377 378define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { 379; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096( 380; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 7 381; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 4096 382; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 4096 383; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP2]] 384; CHECK-NEXT: ret i32 [[SELECT]] 385; 386 %and = and i32 %x, 32 387 %cmp = icmp ne i32 0, %and 388 %or = or i32 %y, 4096 389 %select = select i1 %cmp, i32 %y, i32 %or 390 ret i32 %select 391} 392 393define <2 x i32> @select_icmp_ne_0_and_32_or_4096_vec(<2 x i32> %x, <2 x i32> %y) { 394; CHECK-LABEL: @select_icmp_ne_0_and_32_or_4096_vec( 395; CHECK-NEXT: [[AND:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 7) 396; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 4096) 397; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 4096) 398; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP2]] 399; CHECK-NEXT: ret <2 x i32> [[SELECT]] 400; 401 %and = and <2 x i32> %x, <i32 32, i32 32> 402 %cmp = icmp ne <2 x i32> zeroinitializer, %and 403 %or = or <2 x i32> %y, <i32 4096, i32 4096> 404 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 405 ret <2 x i32> %select 406} 407 408define i32 @select_icmp_ne_0_and_32_xor_4096(i32 %x, i32 %y) { 409; CHECK-LABEL: @select_icmp_ne_0_and_32_xor_4096( 410; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 7 411; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 4096 412; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], [[Y:%.*]] 413; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP2]], 4096 414; CHECK-NEXT: ret i32 [[SELECT]] 415; 416 %and = and i32 %x, 32 417 %cmp = icmp ne i32 0, %and 418 %xor = xor i32 %y, 4096 419 %select = select i1 %cmp, i32 %y, i32 %xor 420 ret i32 %select 421} 422 423define i32 @select_icmp_ne_0_and_32_and_not_4096(i32 %x, i32 %y) { 424; CHECK-LABEL: @select_icmp_ne_0_and_32_and_not_4096( 425; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 32 426; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 427; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 428; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 429; CHECK-NEXT: ret i32 [[SELECT]] 430; 431 %and = and i32 %x, 32 432 %cmp = icmp ne i32 0, %and 433 %and2 = and i32 %y, -4097 434 %select = select i1 %cmp, i32 %y, i32 %and2 435 ret i32 %select 436} 437 438define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { 439; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_or_8( 440; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 441; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 442; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 8 443; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[OR]], i8 [[Y]] 444; CHECK-NEXT: ret i8 [[SELECT]] 445; 446 %and = and i32 %x, 1073741824 447 %cmp = icmp ne i32 0, %and 448 %or = or i8 %y, 8 449 %select = select i1 %cmp, i8 %y, i8 %or 450 ret i8 %select 451} 452 453define i8 @select_icmp_ne_0_and_1073741824_xor_8(i32 %x, i8 %y) { 454; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_xor_8( 455; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 456; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 457; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[Y:%.*]], 8 458; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[XOR]], i8 [[Y]] 459; CHECK-NEXT: ret i8 [[SELECT]] 460; 461 %and = and i32 %x, 1073741824 462 %cmp = icmp ne i32 0, %and 463 %xor = xor i8 %y, 8 464 %select = select i1 %cmp, i8 %y, i8 %xor 465 ret i8 %select 466} 467 468define i8 @select_icmp_ne_0_and_1073741824_and_not_8(i32 %x, i8 %y) { 469; CHECK-LABEL: @select_icmp_ne_0_and_1073741824_and_not_8( 470; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1073741824 471; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 472; CHECK-NEXT: [[AND2:%.*]] = and i8 [[Y:%.*]], -9 473; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i8 [[AND2]], i8 [[Y]] 474; CHECK-NEXT: ret i8 [[SELECT]] 475; 476 %and = and i32 %x, 1073741824 477 %cmp = icmp ne i32 0, %and 478 %and2 = and i8 %y, -9 479 %select = select i1 %cmp, i8 %y, i8 %and2 480 ret i8 %select 481} 482 483define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { 484; CHECK-LABEL: @select_icmp_ne_0_and_8_or_1073741824( 485; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 486; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 487; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 1073741824 488; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 489; CHECK-NEXT: ret i32 [[SELECT]] 490; 491 %and = and i8 %x, 8 492 %cmp = icmp ne i8 0, %and 493 %or = or i32 %y, 1073741824 494 %select = select i1 %cmp, i32 %y, i32 %or 495 ret i32 %select 496} 497 498define i32 @select_icmp_ne_0_and_8_xor_1073741824(i8 %x, i32 %y) { 499; CHECK-LABEL: @select_icmp_ne_0_and_8_xor_1073741824( 500; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 501; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 502; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 1073741824 503; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 504; CHECK-NEXT: ret i32 [[SELECT]] 505; 506 %and = and i8 %x, 8 507 %cmp = icmp ne i8 0, %and 508 %xor = xor i32 %y, 1073741824 509 %select = select i1 %cmp, i32 %y, i32 %xor 510 ret i32 %select 511} 512 513define i32 @select_icmp_ne_0_and_8_and_not_1073741824(i8 %x, i32 %y) { 514; CHECK-LABEL: @select_icmp_ne_0_and_8_and_not_1073741824( 515; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 8 516; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 0 517; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -1073741825 518; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 519; CHECK-NEXT: ret i32 [[SELECT]] 520; 521 %and = and i8 %x, 8 522 %cmp = icmp ne i8 0, %and 523 %and2 = and i32 %y, -1073741825 524 %select = select i1 %cmp, i32 %y, i32 %and2 525 ret i32 %select 526} 527 528; We can't combine here, because the cmp is scalar and the or vector. 529; Just make sure we don't assert. 530define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { 531; CHECK-LABEL: @select_icmp_eq_and_1_0_or_vector_of_2s( 532; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 533; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 534; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[Y:%.*]], splat (i32 2) 535; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], <2 x i32> [[Y]], <2 x i32> [[OR]] 536; CHECK-NEXT: ret <2 x i32> [[SELECT]] 537; 538 %and = and i32 %x, 1 539 %cmp = icmp eq i32 %and, 0 540 %or = or <2 x i32> %y, <i32 2, i32 2> 541 %select = select i1 %cmp, <2 x i32> %y, <2 x i32> %or 542 ret <2 x i32> %select 543} 544 545define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { 546; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( 547; CHECK-NEXT: [[X_XOR:%.*]] = and i32 [[X:%.*]], -9 548; CHECK-NEXT: ret i32 [[X_XOR]] 549; 550 %and = and i32 %x, 8 551 %cmp = icmp eq i32 %and, 0 552 %xor = xor i32 %x, 8 553 %x.xor = select i1 %cmp, i32 %x, i32 %xor 554 ret i32 %x.xor 555} 556 557define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { 558; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( 559; CHECK-NEXT: [[XOR_X:%.*]] = or i32 [[X:%.*]], 8 560; CHECK-NEXT: ret i32 [[XOR_X]] 561; 562 %and = and i32 %x, 8 563 %cmp = icmp eq i32 %and, 0 564 %xor = xor i32 %x, 8 565 %xor.x = select i1 %cmp, i32 %xor, i32 %x 566 ret i32 %xor.x 567} 568 569define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { 570; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( 571; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 572; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i32 [[AND]] to i64 573; CHECK-NEXT: [[Y_XOR:%.*]] = xor i64 [[Y:%.*]], [[TMP1]] 574; CHECK-NEXT: ret i64 [[Y_XOR]] 575; 576 %and = and i32 %x, 8 577 %cmp = icmp eq i32 %and, 0 578 %xor = xor i64 %y, 8 579 %y.xor = select i1 %cmp, i64 %y, i64 %xor 580 ret i64 %y.xor 581} 582 583define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { 584; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( 585; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 586; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 8 587; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[TMP1]] to i64 588; CHECK-NEXT: [[XOR_Y:%.*]] = xor i64 [[Y:%.*]], [[TMP2]] 589; CHECK-NEXT: ret i64 [[XOR_Y]] 590; 591 %and = and i32 %x, 8 592 %cmp = icmp eq i32 %and, 0 593 %xor = xor i64 %y, 8 594 %xor.y = select i1 %cmp, i64 %xor, i64 %y 595 ret i64 %xor.y 596} 597 598define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { 599; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( 600; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 601; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 8 602; CHECK-NEXT: [[TMP2:%.*]] = zext nneg i32 [[TMP1]] to i64 603; CHECK-NEXT: [[OR_Y:%.*]] = or i64 [[Y:%.*]], [[TMP2]] 604; CHECK-NEXT: ret i64 [[OR_Y]] 605; 606 %and = and i32 %x, 8 607 %cmp = icmp eq i32 %and, 0 608 %or = or i64 %y, 8 609 %or.y = select i1 %cmp, i64 %or, i64 %y 610 ret i64 %or.y 611} 612 613define <2 x i64> @select_icmp_x_and_8_ne_0_y_or_8_vec(<2 x i32> %x, <2 x i64> %y) { 614; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8_vec( 615; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 8) 616; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[AND]], splat (i32 8) 617; CHECK-NEXT: [[TMP2:%.*]] = zext nneg <2 x i32> [[TMP1]] to <2 x i64> 618; CHECK-NEXT: [[OR_Y:%.*]] = or <2 x i64> [[Y:%.*]], [[TMP2]] 619; CHECK-NEXT: ret <2 x i64> [[OR_Y]] 620; 621 %and = and <2 x i32> %x, <i32 8, i32 8> 622 %cmp = icmp eq <2 x i32> %and, zeroinitializer 623 %or = or <2 x i64> %y, <i64 8, i64 8> 624 %or.y = select <2 x i1> %cmp, <2 x i64> %or, <2 x i64> %y 625 ret <2 x i64> %or.y 626} 627 628define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) { 629; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8( 630; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 631; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 632; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], -9 633; CHECK-NEXT: [[AND_Y:%.*]] = select i1 [[CMP]], i64 [[AND2]], i64 [[Y]] 634; CHECK-NEXT: ret i64 [[AND_Y]] 635; 636 %and = and i32 %x, 8 637 %cmp = icmp eq i32 %and, 0 638 %and2 = and i64 %y, -9 639 %and.y = select i1 %cmp, i64 %and2, i64 %y 640 ret i64 %and.y 641} 642 643define i32 @select_icmp_and_2147483648_ne_0_xor_2147483648(i32 %x) { 644; CHECK-LABEL: @select_icmp_and_2147483648_ne_0_xor_2147483648( 645; CHECK-NEXT: [[X_XOR:%.*]] = and i32 [[X:%.*]], 2147483647 646; CHECK-NEXT: ret i32 [[X_XOR]] 647; 648 %and = and i32 %x, 2147483648 649 %cmp = icmp eq i32 %and, 0 650 %xor = xor i32 %x, 2147483648 651 %x.xor = select i1 %cmp, i32 %x, i32 %xor 652 ret i32 %x.xor 653} 654 655define i32 @select_icmp_and_2147483648_eq_0_xor_2147483648(i32 %x) { 656; CHECK-LABEL: @select_icmp_and_2147483648_eq_0_xor_2147483648( 657; CHECK-NEXT: [[XOR_X:%.*]] = or i32 [[X:%.*]], -2147483648 658; CHECK-NEXT: ret i32 [[XOR_X]] 659; 660 %and = and i32 %x, 2147483648 661 %cmp = icmp eq i32 %and, 0 662 %xor = xor i32 %x, 2147483648 663 %xor.x = select i1 %cmp, i32 %xor, i32 %x 664 ret i32 %xor.x 665} 666 667define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) { 668; CHECK-LABEL: @select_icmp_x_and_2147483648_ne_0_or_2147483648( 669; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 670; CHECK-NEXT: ret i32 [[OR]] 671; 672 %and = and i32 %x, 2147483648 673 %cmp = icmp eq i32 %and, 0 674 %or = or i32 %x, 2147483648 675 %or.x = select i1 %cmp, i32 %or, i32 %x 676 ret i32 %or.x 677} 678 679define i32 @test68(i32 %x, i32 %y) { 680; CHECK-LABEL: @test68( 681; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 6 682; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 683; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 684; CHECK-NEXT: ret i32 [[SELECT]] 685; 686 %and = and i32 %x, 128 687 %cmp = icmp eq i32 %and, 0 688 %or = or i32 %y, 2 689 %select = select i1 %cmp, i32 %y, i32 %or 690 ret i32 %select 691} 692 693define <2 x i32> @test68vec(<2 x i32> %x, <2 x i32> %y) { 694; CHECK-LABEL: @test68vec( 695; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i32> [[X:%.*]], splat (i32 6) 696; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 2) 697; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP1]] 698; CHECK-NEXT: ret <2 x i32> [[SELECT]] 699; 700 %and = and <2 x i32> %x, <i32 128, i32 128> 701 %cmp = icmp eq <2 x i32> %and, zeroinitializer 702 %or = or <2 x i32> %y, <i32 2, i32 2> 703 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 704 ret <2 x i32> %select 705} 706 707define i32 @test68_xor(i32 %x, i32 %y) { 708; CHECK-LABEL: @test68_xor( 709; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 6 710; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 711; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[TMP1]] 712; CHECK-NEXT: ret i32 [[SELECT]] 713; 714 %and = and i32 %x, 128 715 %cmp = icmp eq i32 %and, 0 716 %xor = xor i32 %y, 2 717 %select = select i1 %cmp, i32 %y, i32 %xor 718 ret i32 %select 719} 720 721define i32 @test68_and(i32 %x, i32 %y) { 722; CHECK-LABEL: @test68_and( 723; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 128 724; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 725; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 726; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 727; CHECK-NEXT: ret i32 [[SELECT]] 728; 729 %and = and i32 %x, 128 730 %cmp = icmp eq i32 %and, 0 731 %and2 = and i32 %y, -3 732 %select = select i1 %cmp, i32 %y, i32 %and2 733 ret i32 %select 734} 735 736define i32 @test69(i32 %x, i32 %y) { 737; CHECK-LABEL: @test69( 738; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 6 739; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 740; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 2 741; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP2]] 742; CHECK-NEXT: ret i32 [[SELECT]] 743; 744 %and = and i32 %x, 128 745 %cmp = icmp ne i32 %and, 0 746 %or = or i32 %y, 2 747 %select = select i1 %cmp, i32 %y, i32 %or 748 ret i32 %select 749} 750 751define <2 x i32> @test69vec(<2 x i32> %x, <2 x i32> %y) { 752; CHECK-LABEL: @test69vec( 753; CHECK-NEXT: [[AND:%.*]] = lshr <2 x i32> [[X:%.*]], splat (i32 6) 754; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[AND]], splat (i32 2) 755; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], splat (i32 2) 756; CHECK-NEXT: [[SELECT:%.*]] = or <2 x i32> [[Y:%.*]], [[TMP2]] 757; CHECK-NEXT: ret <2 x i32> [[SELECT]] 758; 759 %and = and <2 x i32> %x, <i32 128, i32 128> 760 %cmp = icmp ne <2 x i32> %and, zeroinitializer 761 %or = or <2 x i32> %y, <i32 2, i32 2> 762 %select = select <2 x i1> %cmp, <2 x i32> %y, <2 x i32> %or 763 ret <2 x i32> %select 764} 765 766define i32 @test69_xor(i32 %x, i32 %y) { 767; CHECK-LABEL: @test69_xor( 768; CHECK-NEXT: [[AND:%.*]] = lshr i32 [[X:%.*]], 6 769; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 770; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], [[Y:%.*]] 771; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP2]], 2 772; CHECK-NEXT: ret i32 [[SELECT]] 773; 774 %and = and i32 %x, 128 775 %cmp = icmp ne i32 %and, 0 776 %xor = xor i32 %y, 2 777 %select = select i1 %cmp, i32 %y, i32 %xor 778 ret i32 %select 779} 780 781define i32 @test69_and(i32 %x, i32 %y) { 782; CHECK-LABEL: @test69_and( 783; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 128 784; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 785; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2 786; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 787; CHECK-NEXT: ret i32 [[SELECT]] 788; 789 %and = and i32 %x, 128 790 %cmp = icmp ne i32 %and, 0 791 %and2 = and i32 %y, 2 792 %select = select i1 %cmp, i32 %y, i32 %and2 793 ret i32 %select 794} 795 796define i8 @test70(i8 %x, i8 %y) { 797; CHECK-LABEL: @test70( 798; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[X:%.*]], 6 799; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], 2 800; CHECK-NEXT: [[SELECT:%.*]] = or i8 [[Y:%.*]], [[TMP2]] 801; CHECK-NEXT: ret i8 [[SELECT]] 802; 803 %cmp = icmp slt i8 %x, 0 804 %or = or i8 %y, 2 805 %select = select i1 %cmp, i8 %or, i8 %y 806 ret i8 %select 807} 808 809define i8 @test70_multiuse(i8 %x, i8 %y) { 810; CHECK-LABEL: @test70_multiuse( 811; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0 812; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], 2 813; CHECK-NEXT: call void @use(i8 [[OR]]) 814; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i8 [[OR]], i8 [[Y]] 815; CHECK-NEXT: ret i8 [[SELECT]] 816; 817 %cmp = icmp slt i8 %x, 0 818 %or = or i8 %y, 2 819 call void @use(i8 %or) 820 %select = select i1 %cmp, i8 %or, i8 %y 821 ret i8 %select 822} 823 824define i32 @shift_no_xor_multiuse_or(i32 %x, i32 %y) { 825; CHECK-LABEL: @shift_no_xor_multiuse_or( 826; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 827; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 828; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 829; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y]], [[TMP1]] 830; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 831; CHECK-NEXT: ret i32 [[RES]] 832; 833 %and = and i32 %x, 1 834 %cmp = icmp eq i32 %and, 0 835 %or = or i32 %y, 2 836 %select = select i1 %cmp, i32 %y, i32 %or 837 %res = mul i32 %select, %or ; to bump up use count of the Or 838 ret i32 %res 839} 840 841define i32 @shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 842; CHECK-LABEL: @shift_no_xor_multiuse_xor( 843; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 844; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X:%.*]], 1 845; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[AND]], 2 846; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y]], [[TMP1]] 847; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 848; CHECK-NEXT: ret i32 [[RES]] 849; 850 %and = and i32 %x, 1 851 %cmp = icmp eq i32 %and, 0 852 %xor = xor i32 %y, 2 853 %select = select i1 %cmp, i32 %y, i32 %xor 854 %res = mul i32 %select, %xor ; to bump up use count of the Xor 855 ret i32 %res 856} 857 858define i32 @shift_no_xor_multiuse_and(i32 %x, i32 %y) { 859; CHECK-LABEL: @shift_no_xor_multiuse_and( 860; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 861; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 862; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 863; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 864; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 865; CHECK-NEXT: ret i32 [[RES]] 866; 867 %and = and i32 %x, 1 868 %cmp = icmp eq i32 %and, 0 869 %and2 = and i32 %y, -3 870 %select = select i1 %cmp, i32 %y, i32 %and2 871 %res = mul i32 %select, %and2 ; to bump up use count of the And 872 ret i32 %res 873} 874 875define i32 @no_shift_no_xor_multiuse_or(i32 %x, i32 %y) { 876; CHECK-LABEL: @no_shift_no_xor_multiuse_or( 877; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 878; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 879; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y]], [[AND]] 880; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 881; CHECK-NEXT: ret i32 [[RES]] 882; 883 %and = and i32 %x, 4096 884 %cmp = icmp eq i32 %and, 0 885 %or = or i32 %y, 4096 886 %select = select i1 %cmp, i32 %y, i32 %or 887 %res = mul i32 %select, %or ; to bump up use count of the Or 888 ret i32 %res 889} 890 891define i32 @no_shift_no_xor_multiuse_xor(i32 %x, i32 %y) { 892; CHECK-LABEL: @no_shift_no_xor_multiuse_xor( 893; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 894; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 895; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y]], [[AND]] 896; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 897; CHECK-NEXT: ret i32 [[RES]] 898; 899 %and = and i32 %x, 4096 900 %cmp = icmp eq i32 %and, 0 901 %xor = xor i32 %y, 4096 902 %select = select i1 %cmp, i32 %y, i32 %xor 903 %res = mul i32 %select, %xor ; to bump up use count of the Xor 904 ret i32 %res 905} 906 907define i32 @no_shift_no_xor_multiuse_and(i32 %x, i32 %y) { 908; CHECK-LABEL: @no_shift_no_xor_multiuse_and( 909; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 910; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 911; CHECK-NEXT: [[AND2:%.*]] = add i32 [[Y:%.*]], -4097 912; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 913; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 914; CHECK-NEXT: ret i32 [[RES]] 915; 916 %and = and i32 %x, 4096 917 %cmp = icmp eq i32 %and, 0 918 %and2 = add i32 %y, -4097 919 %select = select i1 %cmp, i32 %y, i32 %and2 920 %res = mul i32 %select, %and2 ; to bump up use count of the And 921 ret i32 %res 922} 923 924define i32 @no_shift_xor_multiuse_or(i32 %x, i32 %y) { 925; CHECK-LABEL: @no_shift_xor_multiuse_or( 926; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 927; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 928; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 929; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y]], [[TMP1]] 930; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 931; CHECK-NEXT: ret i32 [[RES]] 932; 933 %and = and i32 %x, 4096 934 %cmp = icmp ne i32 0, %and 935 %or = or i32 %y, 4096 936 %select = select i1 %cmp, i32 %y, i32 %or 937 %res = mul i32 %select, %or ; to bump up use count of the Or 938 ret i32 %res 939} 940 941define i32 @no_shift_xor_multiuse_xor(i32 %x, i32 %y) { 942; CHECK-LABEL: @no_shift_xor_multiuse_xor( 943; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 944; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 945; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], [[Y]] 946; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP1]], 4096 947; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 948; CHECK-NEXT: ret i32 [[RES]] 949; 950 %and = and i32 %x, 4096 951 %cmp = icmp ne i32 0, %and 952 %xor = xor i32 %y, 4096 953 %select = select i1 %cmp, i32 %y, i32 %xor 954 %res = mul i32 %select, %xor ; to bump up use count of the Xor 955 ret i32 %res 956} 957 958define i32 @no_shift_xor_multiuse_and(i32 %x, i32 %y) { 959; CHECK-LABEL: @no_shift_xor_multiuse_and( 960; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 961; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 962; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 963; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 964; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 965; CHECK-NEXT: ret i32 [[RES]] 966; 967 %and = and i32 %x, 4096 968 %cmp = icmp ne i32 0, %and 969 %and2 = and i32 %y, -4097 970 %select = select i1 %cmp, i32 %y, i32 %and2 971 %res = mul i32 %select, %and2 ; to bump up use count of the And 972 ret i32 %res 973} 974 975define i32 @shift_xor_multiuse_or(i32 %x, i32 %y) { 976; CHECK-LABEL: @shift_xor_multiuse_or( 977; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 978; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 979; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 980; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 981; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[OR]] 982; CHECK-NEXT: ret i32 [[RES]] 983; 984 %and = and i32 %x, 4096 985 %cmp = icmp ne i32 0, %and 986 %or = or i32 %y, 2048 987 %select = select i1 %cmp, i32 %y, i32 %or 988 %res = mul i32 %select, %or ; to bump up use count of the Or 989 ret i32 %res 990} 991 992define i32 @shift_xor_multiuse_xor(i32 %x, i32 %y) { 993; CHECK-LABEL: @shift_xor_multiuse_xor( 994; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 995; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 996; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 997; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 998; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[XOR]] 999; CHECK-NEXT: ret i32 [[RES]] 1000; 1001 %and = and i32 %x, 4096 1002 %cmp = icmp ne i32 0, %and 1003 %xor = xor i32 %y, 2048 1004 %select = select i1 %cmp, i32 %y, i32 %xor 1005 %res = mul i32 %select, %xor ; to bump up use count of the Xor 1006 ret i32 %res 1007} 1008 1009define i32 @shift_xor_multiuse_and(i32 %x, i32 %y) { 1010; CHECK-LABEL: @shift_xor_multiuse_and( 1011; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1012; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1013; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 1014; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1015; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[AND2]] 1016; CHECK-NEXT: ret i32 [[RES]] 1017; 1018 %and = and i32 %x, 4096 1019 %cmp = icmp ne i32 0, %and 1020 %and2 = and i32 %y, -2049 1021 %select = select i1 %cmp, i32 %y, i32 %and2 1022 %res = mul i32 %select, %and2 ; to bump up use count of the and 1023 ret i32 %res 1024} 1025 1026define i32 @shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1027; CHECK-LABEL: @shift_no_xor_multiuse_cmp( 1028; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1029; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1030; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i32 [[AND]], 1 1031; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 1032; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1033; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1034; CHECK-NEXT: ret i32 [[RES]] 1035; 1036 %and = and i32 %x, 1 1037 %cmp = icmp eq i32 %and, 0 1038 %or = or i32 %y, 2 1039 %select = select i1 %cmp, i32 %y, i32 %or 1040 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1041 %res = mul i32 %select, %select2 1042 ret i32 %res 1043} 1044 1045define i32 @shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1046; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_xor( 1047; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1048; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1049; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i32 [[AND]], 1 1050; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[TMP1]] 1051; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1052; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1053; CHECK-NEXT: ret i32 [[RES]] 1054; 1055 %and = and i32 %x, 1 1056 %cmp = icmp eq i32 %and, 0 1057 %xor = xor i32 %y, 2 1058 %select = select i1 %cmp, i32 %y, i32 %xor 1059 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1060 %res = mul i32 %select, %select2 1061 ret i32 %res 1062} 1063 1064define i32 @shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1065; CHECK-LABEL: @shift_no_xor_multiuse_cmp_with_and( 1066; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1067; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1068; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1069; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1070; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1071; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1072; CHECK-NEXT: ret i32 [[RES]] 1073; 1074 %and = and i32 %x, 1 1075 %cmp = icmp eq i32 %and, 0 1076 %and2 = and i32 %y, -3 1077 %select = select i1 %cmp, i32 %y, i32 %and2 1078 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1079 %res = mul i32 %select, %select2 1080 ret i32 %res 1081} 1082 1083define i32 @no_shift_no_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1084; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp( 1085; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1086; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1087; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[AND]] 1088; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1089; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1090; CHECK-NEXT: ret i32 [[RES]] 1091; 1092 %and = and i32 %x, 4096 1093 %cmp = icmp eq i32 %and, 0 1094 %or = or i32 %y, 4096 1095 %select = select i1 %cmp, i32 %y, i32 %or 1096 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1097 %res = mul i32 %select, %select2 1098 ret i32 %res 1099} 1100 1101define i32 @no_shift_no_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1102; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_xor( 1103; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1104; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1105; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y:%.*]], [[AND]] 1106; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1107; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1108; CHECK-NEXT: ret i32 [[RES]] 1109; 1110 %and = and i32 %x, 4096 1111 %cmp = icmp eq i32 %and, 0 1112 %xor = xor i32 %y, 4096 1113 %select = select i1 %cmp, i32 %y, i32 %xor 1114 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1115 %res = mul i32 %select, %select2 1116 ret i32 %res 1117} 1118 1119define i32 @no_shift_no_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1120; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_with_and( 1121; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1122; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1123; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1124; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1125; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1126; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1127; CHECK-NEXT: ret i32 [[RES]] 1128; 1129 %and = and i32 %x, 4096 1130 %cmp = icmp eq i32 %and, 0 1131 %and2 = and i32 %y, -4097 1132 %select = select i1 %cmp, i32 %y, i32 %and2 1133 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1134 %res = mul i32 %select, %select2 1135 ret i32 %res 1136} 1137 1138define i32 @no_shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1139; CHECK-LABEL: @no_shift_xor_multiuse_cmp( 1140; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1141; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1142; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], 4096 1143; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y:%.*]], [[TMP1]] 1144; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1145; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1146; CHECK-NEXT: ret i32 [[RES]] 1147; 1148 %and = and i32 %x, 4096 1149 %cmp = icmp ne i32 0, %and 1150 %or = or i32 %y, 4096 1151 %select = select i1 %cmp, i32 %y, i32 %or 1152 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1153 %res = mul i32 %select, %select2 1154 ret i32 %res 1155} 1156 1157define i32 @no_shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1158; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_xor( 1159; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1160; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1161; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[AND]], [[Y:%.*]] 1162; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[TMP1]], 4096 1163; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1164; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1165; CHECK-NEXT: ret i32 [[RES]] 1166; 1167 %and = and i32 %x, 4096 1168 %cmp = icmp ne i32 0, %and 1169 %xor = xor i32 %y, 4096 1170 %select = select i1 %cmp, i32 %y, i32 %xor 1171 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1172 %res = mul i32 %select, %select2 1173 ret i32 %res 1174} 1175 1176define i32 @no_shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1177; CHECK-LABEL: @no_shift_xor_multiuse_cmp_with_and( 1178; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1179; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1180; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1181; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1182; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1183; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1184; CHECK-NEXT: ret i32 [[RES]] 1185; 1186 %and = and i32 %x, 4096 1187 %cmp = icmp ne i32 0, %and 1188 %and2 = and i32 %y, -4097 1189 %select = select i1 %cmp, i32 %y, i32 %and2 1190 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1191 %res = mul i32 %select, %select2 1192 ret i32 %res 1193} 1194 1195define i32 @shift_xor_multiuse_cmp(i32 %x, i32 %y, i32 %z, i32 %w) { 1196; CHECK-LABEL: @shift_xor_multiuse_cmp( 1197; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1198; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1199; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1200; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1201; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1202; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1203; CHECK-NEXT: ret i32 [[RES]] 1204; 1205 %and = and i32 %x, 4096 1206 %cmp = icmp ne i32 0, %and 1207 %or = or i32 %y, 2048 1208 %select = select i1 %cmp, i32 %y, i32 %or 1209 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1210 %res = mul i32 %select, %select2 1211 ret i32 %res 1212} 1213 1214define i32 @shift_xor_multiuse_cmp_with_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1215; CHECK-LABEL: @shift_xor_multiuse_cmp_with_xor( 1216; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1217; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1218; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1219; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1220; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1221; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1222; CHECK-NEXT: ret i32 [[RES]] 1223; 1224 %and = and i32 %x, 4096 1225 %cmp = icmp ne i32 0, %and 1226 %xor = xor i32 %y, 2048 1227 %select = select i1 %cmp, i32 %y, i32 %xor 1228 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1229 %res = mul i32 %select, %select2 1230 ret i32 %res 1231} 1232 1233define i32 @shift_xor_multiuse_cmp_with_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1234; CHECK-LABEL: @shift_xor_multiuse_cmp_with_and( 1235; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1236; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1237; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -2049 1238; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1239; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1240; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1241; CHECK-NEXT: ret i32 [[RES]] 1242; 1243 %and = and i32 %x, 4096 1244 %cmp = icmp ne i32 0, %and 1245 %and2 = and i32 %y, -2049 1246 %select = select i1 %cmp, i32 %y, i32 %and2 1247 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1248 %res = mul i32 %select, %select2 1249 ret i32 %res 1250} 1251 1252define i32 @shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1253; CHECK-LABEL: @shift_no_xor_multiuse_cmp_or( 1254; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1255; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1256; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2 1257; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]] 1258; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1259; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1260; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1261; CHECK-NEXT: ret i32 [[RES2]] 1262; 1263 %and = and i32 %x, 1 1264 %cmp = icmp eq i32 %and, 0 1265 %or = or i32 %y, 2 1266 %select = select i1 %cmp, i32 %y, i32 %or 1267 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1268 %res = mul i32 %select, %select2 1269 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1270 ret i32 %res2 1271} 1272 1273define i32 @shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1274; CHECK-LABEL: @shift_no_xor_multiuse_cmp_xor( 1275; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1276; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1277; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2 1278; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1279; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1280; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1281; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1282; CHECK-NEXT: ret i32 [[RES2]] 1283; 1284 %and = and i32 %x, 1 1285 %cmp = icmp eq i32 %and, 0 1286 %xor = xor i32 %y, 2 1287 %select = select i1 %cmp, i32 %y, i32 %xor 1288 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1289 %res = mul i32 %select, %select2 1290 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1291 ret i32 %res2 1292} 1293 1294define i32 @shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1295; CHECK-LABEL: @shift_no_xor_multiuse_cmp_and( 1296; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1297; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1298; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -3 1299; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1300; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1301; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1302; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1303; CHECK-NEXT: ret i32 [[RES2]] 1304; 1305 %and = and i32 %x, 1 1306 %cmp = icmp eq i32 %and, 0 1307 %and2 = and i32 %y, -3 1308 %select = select i1 %cmp, i32 %y, i32 %and2 1309 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1310 %res = mul i32 %select, %select2 1311 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1312 ret i32 %res2 1313} 1314 1315define i32 @no_shift_no_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1316; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_or( 1317; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1318; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1319; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1320; CHECK-NEXT: [[SELECT:%.*]] = or i32 [[Y]], [[AND]] 1321; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1322; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1323; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1324; CHECK-NEXT: ret i32 [[RES2]] 1325; 1326 %and = and i32 %x, 4096 1327 %cmp = icmp eq i32 %and, 0 1328 %or = or i32 %y, 4096 1329 %select = select i1 %cmp, i32 %y, i32 %or 1330 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1331 %res = mul i32 %select, %select2 1332 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1333 ret i32 %res2 1334} 1335 1336define i32 @no_shift_no_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1337; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_xor( 1338; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1339; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1340; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1341; CHECK-NEXT: [[SELECT:%.*]] = xor i32 [[Y]], [[AND]] 1342; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1343; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1344; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1345; CHECK-NEXT: ret i32 [[RES2]] 1346; 1347 %and = and i32 %x, 4096 1348 %cmp = icmp eq i32 %and, 0 1349 %xor = xor i32 %y, 4096 1350 %select = select i1 %cmp, i32 %y, i32 %xor 1351 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1352 %res = mul i32 %select, %select2 1353 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1354 ret i32 %res2 1355} 1356 1357define i32 @no_shift_no_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1358; CHECK-LABEL: @no_shift_no_xor_multiuse_cmp_and( 1359; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1360; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1361; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1362; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND2]] 1363; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP]], i32 [[Z:%.*]], i32 [[W:%.*]] 1364; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1365; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1366; CHECK-NEXT: ret i32 [[RES2]] 1367; 1368 %and = and i32 %x, 4096 1369 %cmp = icmp eq i32 %and, 0 1370 %and2 = and i32 %y, -4097 1371 %select = select i1 %cmp, i32 %y, i32 %and2 1372 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1373 %res = mul i32 %select, %select2 1374 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1375 ret i32 %res2 1376} 1377 1378define i32 @no_shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1379; CHECK-LABEL: @no_shift_xor_multiuse_cmp_or( 1380; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1381; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1382; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 4096 1383; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1384; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1385; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1386; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1387; CHECK-NEXT: ret i32 [[RES2]] 1388; 1389 %and = and i32 %x, 4096 1390 %cmp = icmp ne i32 0, %and 1391 %or = or i32 %y, 4096 1392 %select = select i1 %cmp, i32 %y, i32 %or 1393 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1394 %res = mul i32 %select, %select2 1395 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1396 ret i32 %res2 1397} 1398 1399define i32 @no_shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1400; CHECK-LABEL: @no_shift_xor_multiuse_cmp_xor( 1401; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1402; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1403; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 4096 1404; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1405; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1406; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1407; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1408; CHECK-NEXT: ret i32 [[RES2]] 1409; 1410 %and = and i32 %x, 4096 1411 %cmp = icmp ne i32 0, %and 1412 %xor = xor i32 %y, 4096 1413 %select = select i1 %cmp, i32 %y, i32 %xor 1414 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1415 %res = mul i32 %select, %select2 1416 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1417 ret i32 %res2 1418} 1419 1420define i32 @no_shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1421; CHECK-LABEL: @no_shift_xor_multiuse_cmp_and( 1422; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1423; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1424; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], -4097 1425; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1426; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1427; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1428; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1429; CHECK-NEXT: ret i32 [[RES2]] 1430; 1431 %and = and i32 %x, 4096 1432 %cmp = icmp ne i32 0, %and 1433 %and2 = and i32 %y, -4097 1434 %select = select i1 %cmp, i32 %y, i32 %and2 1435 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1436 %res = mul i32 %select, %select2 1437 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1438 ret i32 %res2 1439} 1440 1441define i32 @shift_xor_multiuse_cmp_or(i32 %x, i32 %y, i32 %z, i32 %w) { 1442; CHECK-LABEL: @shift_xor_multiuse_cmp_or( 1443; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1444; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1445; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2048 1446; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[OR]], i32 [[Y]] 1447; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1448; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1449; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[OR]] 1450; CHECK-NEXT: ret i32 [[RES2]] 1451; 1452 %and = and i32 %x, 4096 1453 %cmp = icmp ne i32 0, %and 1454 %or = or i32 %y, 2048 1455 %select = select i1 %cmp, i32 %y, i32 %or 1456 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1457 %res = mul i32 %select, %select2 1458 %res2 = mul i32 %res, %or ; to bump up the use count of the or 1459 ret i32 %res2 1460} 1461 1462define i32 @shift_xor_multiuse_cmp_xor(i32 %x, i32 %y, i32 %z, i32 %w) { 1463; CHECK-LABEL: @shift_xor_multiuse_cmp_xor( 1464; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1465; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1466; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[Y:%.*]], 2048 1467; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[XOR]], i32 [[Y]] 1468; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1469; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1470; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[XOR]] 1471; CHECK-NEXT: ret i32 [[RES2]] 1472; 1473 %and = and i32 %x, 4096 1474 %cmp = icmp ne i32 0, %and 1475 %xor = xor i32 %y, 2048 1476 %select = select i1 %cmp, i32 %y, i32 %xor 1477 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1478 %res = mul i32 %select, %select2 1479 %res2 = mul i32 %res, %xor ; to bump up the use count of the xor 1480 ret i32 %res2 1481} 1482 1483define i32 @shift_xor_multiuse_cmp_and(i32 %x, i32 %y, i32 %z, i32 %w) { 1484; CHECK-LABEL: @shift_xor_multiuse_cmp_and( 1485; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 4096 1486; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0 1487; CHECK-NEXT: [[AND2:%.*]] = and i32 [[Y:%.*]], 2048 1488; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP_NOT]], i32 [[AND2]], i32 [[Y]] 1489; CHECK-NEXT: [[SELECT2:%.*]] = select i1 [[CMP_NOT]], i32 [[W:%.*]], i32 [[Z:%.*]] 1490; CHECK-NEXT: [[RES:%.*]] = mul i32 [[SELECT]], [[SELECT2]] 1491; CHECK-NEXT: [[RES2:%.*]] = mul i32 [[RES]], [[AND2]] 1492; CHECK-NEXT: ret i32 [[RES2]] 1493; 1494 %and = and i32 %x, 4096 1495 %cmp = icmp ne i32 0, %and 1496 %and2 = and i32 %y, 2048 1497 %select = select i1 %cmp, i32 %y, i32 %and2 1498 %select2 = select i1 %cmp, i32 %z, i32 %w ; to bump up use count of the cmp 1499 %res = mul i32 %select, %select2 1500 %res2 = mul i32 %res, %and2 ; to bump up the use count of the and 1501 ret i32 %res2 1502} 1503 1504define i8 @set_bits(i8 %x, i1 %b) { 1505; CHECK-LABEL: @set_bits( 1506; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1507; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], i8 5, i8 0 1508; CHECK-NEXT: [[COND:%.*]] = or disjoint i8 [[AND]], [[MASKSEL]] 1509; CHECK-NEXT: ret i8 [[COND]] 1510; 1511 %and = and i8 %x, 250 1512 %or = or i8 %x, 5 1513 %cond = select i1 %b, i8 %or, i8 %and 1514 ret i8 %cond 1515} 1516 1517; Negative test 1518 1519define i8 @set_bits_not_inverse_constant(i8 %x, i1 %b) { 1520; CHECK-LABEL: @set_bits_not_inverse_constant( 1521; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1522; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 7 1523; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[OR]], i8 [[AND]] 1524; CHECK-NEXT: ret i8 [[COND]] 1525; 1526 %and = and i8 %x, 250 1527 %or = or i8 %x, 7 1528 %cond = select i1 %b, i8 %or, i8 %and 1529 ret i8 %cond 1530} 1531 1532define i8 @set_bits_extra_use1(i8 %x, i1 %b) { 1533; CHECK-LABEL: @set_bits_extra_use1( 1534; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1535; CHECK-NEXT: call void @use(i8 [[AND]]) 1536; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], i8 5, i8 0 1537; CHECK-NEXT: [[COND:%.*]] = or disjoint i8 [[AND]], [[MASKSEL]] 1538; CHECK-NEXT: ret i8 [[COND]] 1539; 1540 %and = and i8 %x, 250 1541 call void @use(i8 %and) 1542 %or = or i8 %x, 5 1543 %cond = select i1 %b, i8 %or, i8 %and 1544 ret i8 %cond 1545} 1546 1547; Negative test 1548 1549define i8 @set_bits_extra_use2(i8 %x, i1 %b) { 1550; CHECK-LABEL: @set_bits_extra_use2( 1551; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1552; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 5 1553; CHECK-NEXT: call void @use(i8 [[OR]]) 1554; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[OR]], i8 [[AND]] 1555; CHECK-NEXT: ret i8 [[COND]] 1556; 1557 %and = and i8 %x, 250 1558 %or = or i8 %x, 5 1559 call void @use(i8 %or) 1560 %cond = select i1 %b, i8 %or, i8 %and 1561 ret i8 %cond 1562} 1563 1564define <2 x i8> @clear_bits(<2 x i8> %x, <2 x i1> %b) { 1565; CHECK-LABEL: @clear_bits( 1566; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], splat (i8 37) 1567; CHECK-NEXT: [[MASKSEL:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> zeroinitializer, <2 x i8> splat (i8 -38) 1568; CHECK-NEXT: [[COND:%.*]] = or disjoint <2 x i8> [[AND]], [[MASKSEL]] 1569; CHECK-NEXT: ret <2 x i8> [[COND]] 1570; 1571 %and = and <2 x i8> %x, <i8 37, i8 37> 1572 %or = or <2 x i8> %x, <i8 218, i8 218> 1573 %cond = select <2 x i1> %b, <2 x i8> %and, <2 x i8> %or 1574 ret <2 x i8> %cond 1575} 1576 1577; Negative test 1578 1579define <2 x i8> @clear_bits_not_inverse_constant(<2 x i8> %x, <2 x i1> %b) { 1580; CHECK-LABEL: @clear_bits_not_inverse_constant( 1581; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 undef, i8 37> 1582; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[X]], splat (i8 -38) 1583; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> [[AND]], <2 x i8> [[OR]] 1584; CHECK-NEXT: ret <2 x i8> [[COND]] 1585; 1586 %and = and <2 x i8> %x, <i8 undef, i8 37> 1587 %or = or <2 x i8> %x, <i8 218, i8 218> 1588 %cond = select <2 x i1> %b, <2 x i8> %and, <2 x i8> %or 1589 ret <2 x i8> %cond 1590} 1591 1592define <2 x i8> @clear_bits_extra_use1(<2 x i8> %x, i1 %b) { 1593; CHECK-LABEL: @clear_bits_extra_use1( 1594; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], splat (i8 37) 1595; CHECK-NEXT: call void @use_vec(<2 x i8> [[AND]]) 1596; CHECK-NEXT: [[MASKSEL:%.*]] = select i1 [[B:%.*]], <2 x i8> zeroinitializer, <2 x i8> splat (i8 -38) 1597; CHECK-NEXT: [[COND:%.*]] = or disjoint <2 x i8> [[AND]], [[MASKSEL]] 1598; CHECK-NEXT: ret <2 x i8> [[COND]] 1599; 1600 %and = and <2 x i8> %x, <i8 37, i8 37> 1601 call void @use_vec(<2 x i8> %and) 1602 %or = or <2 x i8> %x, <i8 218, i8 218> 1603 %cond = select i1 %b, <2 x i8> %and, <2 x i8> %or 1604 ret <2 x i8> %cond 1605} 1606 1607; Negative test 1608 1609define i8 @clear_bits_extra_use2(i8 %x, i1 %b) { 1610; CHECK-LABEL: @clear_bits_extra_use2( 1611; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], -6 1612; CHECK-NEXT: [[OR:%.*]] = or i8 [[X]], 5 1613; CHECK-NEXT: call void @use(i8 [[OR]]) 1614; CHECK-NEXT: [[COND:%.*]] = select i1 [[B:%.*]], i8 [[AND]], i8 [[OR]] 1615; CHECK-NEXT: ret i8 [[COND]] 1616; 1617 %and = and i8 %x, 250 1618 %or = or i8 %x, 5 1619 call void @use(i8 %or) 1620 %cond = select i1 %b, i8 %and, i8 %or 1621 ret i8 %cond 1622} 1623 1624; Tests factoring in cost of saving the `and` 1625define i64 @xor_i8_to_i64_shl_save_and_eq(i8 %x, i64 %y) { 1626; CHECK-LABEL: @xor_i8_to_i64_shl_save_and_eq( 1627; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], 1 1628; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[XX]], 0 1629; CHECK-NEXT: [[Z:%.*]] = xor i64 [[Y:%.*]], -9223372036854775808 1630; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i64 [[Z]], i64 [[Y]] 1631; CHECK-NEXT: ret i64 [[R]] 1632; 1633 %xx = and i8 %x, 1 1634 %cmp = icmp eq i8 %xx, 0 1635 %z = xor i64 %y, -9223372036854775808 1636 %r = select i1 %cmp, i64 %z, i64 %y 1637 ret i64 %r 1638} 1639 1640define i64 @xor_i8_to_i64_shl_save_and_ne(i8 %x, i64 %y) { 1641; CHECK-LABEL: @xor_i8_to_i64_shl_save_and_ne( 1642; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[X:%.*]] to i64 1643; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP1]], 63 1644; CHECK-NEXT: [[R:%.*]] = xor i64 [[Y:%.*]], [[TMP2]] 1645; CHECK-NEXT: ret i64 [[R]] 1646; 1647 %xx = and i8 %x, 1 1648 %cmp = icmp ne i8 %xx, 0 1649 %z = xor i64 %y, -9223372036854775808 1650 %r = select i1 %cmp, i64 %z, i64 %y 1651 ret i64 %r 1652} 1653 1654define i32 @select_icmp_eq_and_1_0_srem_2_fail_null_identity(i32 %x, i32 %y) { 1655; CHECK-LABEL: @select_icmp_eq_and_1_0_srem_2_fail_null_identity( 1656; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1657; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1658; CHECK-NEXT: [[XOR:%.*]] = srem i32 [[Y:%.*]], 2 1659; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1660; CHECK-NEXT: ret i32 [[SELECT]] 1661; 1662 %and = and i32 %x, 1 1663 %cmp = icmp eq i32 %and, 0 1664 %xor = srem i32 %y, 2 1665 %select = select i1 %cmp, i32 %y, i32 %xor 1666 ret i32 %select 1667} 1668 1669 1670define i32 @select_icmp_eq_and_1_0_sdiv_2_fail_null_1_identity(i32 %x, i32 %y) { 1671; CHECK-LABEL: @select_icmp_eq_and_1_0_sdiv_2_fail_null_1_identity( 1672; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 1673; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 1674; CHECK-NEXT: [[XOR:%.*]] = sdiv i32 [[Y:%.*]], 2 1675; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[XOR]] 1676; CHECK-NEXT: ret i32 [[SELECT]] 1677; 1678 %and = and i32 %x, 1 1679 %cmp = icmp eq i32 %and, 0 1680 %xor = sdiv i32 %y, 2 1681 %select = select i1 %cmp, i32 %y, i32 %xor 1682 ret i32 %select 1683} 1684 1685define i8 @select_icmp_eq_and_1_0_lshr_fv(i8 %x, i8 %y) { 1686; CHECK-LABEL: @select_icmp_eq_and_1_0_lshr_fv( 1687; CHECK-NEXT: [[AND:%.*]] = shl i8 [[X:%.*]], 1 1688; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[AND]], 2 1689; CHECK-NEXT: [[SELECT:%.*]] = lshr i8 [[Y:%.*]], [[TMP1]] 1690; CHECK-NEXT: ret i8 [[SELECT]] 1691; 1692 %and = and i8 %x, 1 1693 %cmp = icmp eq i8 %and, 0 1694 %blshr = lshr i8 %y, 2 1695 %select = select i1 %cmp, i8 %y, i8 %blshr 1696 ret i8 %select 1697} 1698 1699define i8 @select_icmp_eq_and_1_0_lshr_tv(i8 %x, i8 %y) { 1700; CHECK-LABEL: @select_icmp_eq_and_1_0_lshr_tv( 1701; CHECK-NEXT: [[AND:%.*]] = shl i8 [[X:%.*]], 1 1702; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[AND]], 2 1703; CHECK-NEXT: [[SELECT:%.*]] = lshr i8 [[Y:%.*]], [[TMP1]] 1704; CHECK-NEXT: ret i8 [[SELECT]] 1705; 1706 %and = and i8 %x, 1 1707 %cmp = icmp ne i8 %and, 0 1708 %blshr = lshr i8 %y, 2 1709 %select = select i1 %cmp, i8 %blshr, i8 %y 1710 ret i8 %select 1711} 1712