xref: /llvm-project/llvm/test/Transforms/InstCombine/pr75369.ll (revision a105877646d68e48cdeeeadd9d1e075dc3c5d68d)
19cf3e311SYingwei Zheng; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
29cf3e311SYingwei Zheng; RUN: opt -passes=instcombine -S < %s | FileCheck %s
39cf3e311SYingwei Zheng
49cf3e311SYingwei Zhengdefine i32 @main(ptr %a, i8 %a0, i32 %conv, i8 %a1) {
59cf3e311SYingwei Zheng; CHECK-LABEL: define i32 @main(
69cf3e311SYingwei Zheng; CHECK-SAME: ptr [[A:%.*]], i8 [[A0:%.*]], i32 [[CONV:%.*]], i8 [[A1:%.*]]) {
79cf3e311SYingwei Zheng; CHECK-NEXT:    [[A3:%.*]] = trunc i32 [[CONV]] to i8
8*a1058776SNikita Popov; CHECK-NEXT:    [[OR11:%.*]] = or i8 [[A0]], [[A3]]
99cf3e311SYingwei Zheng; CHECK-NEXT:    store i8 [[OR11]], ptr [[A]], align 1
109cf3e311SYingwei Zheng; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[A1]], 0
119cf3e311SYingwei Zheng; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
129cf3e311SYingwei Zheng; CHECK-NEXT:    ret i32 [[CONV]]
139cf3e311SYingwei Zheng;
149cf3e311SYingwei Zheng  %conv1 = sext i8 %a1 to i32
159cf3e311SYingwei Zheng  %a2 = xor i32 %conv, 1
169cf3e311SYingwei Zheng  %or = or i32 %conv1, %conv
179cf3e311SYingwei Zheng  %not = xor i32 %or, -1
189cf3e311SYingwei Zheng  %shr = lshr i32 %not, 1
199cf3e311SYingwei Zheng  %add.neg3 = sub i32 %a2, %shr
209cf3e311SYingwei Zheng  %conv24 = trunc i32 %add.neg3 to i8
219cf3e311SYingwei Zheng  store i8 %conv24, ptr %a, align 1
229cf3e311SYingwei Zheng  %sext = shl i32 %conv, 0
239cf3e311SYingwei Zheng  %conv3 = ashr i32 %sext, 0
249cf3e311SYingwei Zheng  %a3 = trunc i32 %conv to i8
259cf3e311SYingwei Zheng  %conv5 = or i8 %a3, 0
269cf3e311SYingwei Zheng  %xor6 = xor i8 %conv5, 0
279cf3e311SYingwei Zheng  %xor816 = xor i8 %a0, 0
289cf3e311SYingwei Zheng  %a4 = xor i8 %xor816, 0
299cf3e311SYingwei Zheng  %or11 = or i8 %xor6, %a4
309cf3e311SYingwei Zheng  store i8 %or11, ptr %a, align 1
319cf3e311SYingwei Zheng  %cmp = icmp slt i8 %a1, 0
329cf3e311SYingwei Zheng  call void @llvm.assume(i1 %cmp)
339cf3e311SYingwei Zheng  ret i32 %conv3
349cf3e311SYingwei Zheng}
359cf3e311SYingwei Zheng
369cf3e311SYingwei Zhengdeclare void @llvm.assume(i1)
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