xref: /llvm-project/llvm/test/Transforms/InstCombine/pr75369.ll (revision a105877646d68e48cdeeeadd9d1e075dc3c5d68d)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -passes=instcombine -S < %s | FileCheck %s
3
4define i32 @main(ptr %a, i8 %a0, i32 %conv, i8 %a1) {
5; CHECK-LABEL: define i32 @main(
6; CHECK-SAME: ptr [[A:%.*]], i8 [[A0:%.*]], i32 [[CONV:%.*]], i8 [[A1:%.*]]) {
7; CHECK-NEXT:    [[A3:%.*]] = trunc i32 [[CONV]] to i8
8; CHECK-NEXT:    [[OR11:%.*]] = or i8 [[A0]], [[A3]]
9; CHECK-NEXT:    store i8 [[OR11]], ptr [[A]], align 1
10; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[A1]], 0
11; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
12; CHECK-NEXT:    ret i32 [[CONV]]
13;
14  %conv1 = sext i8 %a1 to i32
15  %a2 = xor i32 %conv, 1
16  %or = or i32 %conv1, %conv
17  %not = xor i32 %or, -1
18  %shr = lshr i32 %not, 1
19  %add.neg3 = sub i32 %a2, %shr
20  %conv24 = trunc i32 %add.neg3 to i8
21  store i8 %conv24, ptr %a, align 1
22  %sext = shl i32 %conv, 0
23  %conv3 = ashr i32 %sext, 0
24  %a3 = trunc i32 %conv to i8
25  %conv5 = or i8 %a3, 0
26  %xor6 = xor i8 %conv5, 0
27  %xor816 = xor i8 %a0, 0
28  %a4 = xor i8 %xor816, 0
29  %or11 = or i8 %xor6, %a4
30  store i8 %or11, ptr %a, align 1
31  %cmp = icmp slt i8 %a1, 0
32  call void @llvm.assume(i1 %cmp)
33  ret i32 %conv3
34}
35
36declare void @llvm.assume(i1)
37