1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4define i32 @sub1(i32 %x) { 5; CHECK-LABEL: @sub1( 6; CHECK-NEXT: [[Y:%.*]] = sub i32 0, [[X:%.*]] 7; CHECK-NEXT: [[Z:%.*]] = sdiv i32 [[Y]], 337 8; CHECK-NEXT: ret i32 [[Z]] 9; 10 %y = sub i32 0, %x 11 %z = sdiv i32 %y, 337 12 ret i32 %z 13} 14 15define i32 @sub2(i32 %x) { 16; CHECK-LABEL: @sub2( 17; CHECK-NEXT: [[Z:%.*]] = sdiv i32 [[X:%.*]], -337 18; CHECK-NEXT: ret i32 [[Z]] 19; 20 %y = sub nsw i32 0, %x 21 %z = sdiv i32 %y, 337 22 ret i32 %z 23} 24 25define i1 @shl_icmp(i64 %X) { 26; CHECK-LABEL: @shl_icmp( 27; CHECK-NEXT: [[B:%.*]] = icmp eq i64 [[X:%.*]], 0 28; CHECK-NEXT: ret i1 [[B]] 29; 30 %A = shl nuw i64 %X, 2 ; X/4 31 %B = icmp eq i64 %A, 0 32 ret i1 %B 33} 34 35define i64 @shl1(i64 %X, ptr %P) { 36; CHECK-LABEL: @shl1( 37; CHECK-NEXT: [[A:%.*]] = and i64 [[X:%.*]], 312 38; CHECK-NEXT: store i64 [[A]], ptr [[P:%.*]], align 4 39; CHECK-NEXT: [[B:%.*]] = shl nuw nsw i64 [[A]], 8 40; CHECK-NEXT: ret i64 [[B]] 41; 42 %A = and i64 %X, 312 43 store i64 %A, ptr %P ; multiple uses of A. 44 %B = shl i64 %A, 8 45 ret i64 %B 46} 47 48define i32 @preserve1(i32 %x) { 49; CHECK-LABEL: @preserve1( 50; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[X:%.*]], 5 51; CHECK-NEXT: ret i32 [[ADD3]] 52; 53 %add = add nsw i32 %x, 2 54 %add3 = add nsw i32 %add, 3 55 ret i32 %add3 56} 57 58define i8 @nopreserve1(i8 %x) { 59; CHECK-LABEL: @nopreserve1( 60; CHECK-NEXT: [[ADD3:%.*]] = add i8 [[X:%.*]], -126 61; CHECK-NEXT: ret i8 [[ADD3]] 62; 63 %add = add nsw i8 %x, 127 64 %add3 = add nsw i8 %add, 3 65 ret i8 %add3 66} 67 68define i8 @nopreserve2(i8 %x) { 69; CHECK-LABEL: @nopreserve2( 70; CHECK-NEXT: [[ADD3:%.*]] = add i8 [[X:%.*]], 3 71; CHECK-NEXT: ret i8 [[ADD3]] 72; 73 %add = add i8 %x, 1 74 %add3 = add nsw i8 %add, 2 75 ret i8 %add3 76} 77 78define i8 @nopreserve3(i8 %A, i8 %B) { 79; CHECK-LABEL: @nopreserve3( 80; CHECK-NEXT: [[Y:%.*]] = add i8 [[A:%.*]], [[B:%.*]] 81; CHECK-NEXT: [[ADD:%.*]] = add i8 [[Y]], 20 82; CHECK-NEXT: ret i8 [[ADD]] 83; 84 %x = add i8 %A, 10 85 %y = add i8 %B, 10 86 %add = add nsw i8 %x, %y 87 ret i8 %add 88} 89 90define i8 @nopreserve4(i8 %A, i8 %B) { 91; CHECK-LABEL: @nopreserve4( 92; CHECK-NEXT: [[Y:%.*]] = add i8 [[A:%.*]], [[B:%.*]] 93; CHECK-NEXT: [[ADD:%.*]] = add i8 [[Y]], 20 94; CHECK-NEXT: ret i8 [[ADD]] 95; 96 %x = add nsw i8 %A, 10 97 %y = add nsw i8 %B, 10 98 %add = add nsw i8 %x, %y 99 ret i8 %add 100} 101 102define <3 x i32> @shl_nuw_nsw_shuffle_splat_vec(<2 x i8> %x) { 103; CHECK-LABEL: @shl_nuw_nsw_shuffle_splat_vec( 104; CHECK-NEXT: [[T2:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32> 105; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i32> [[T2]], <2 x i32> poison, <3 x i32> <i32 1, i32 0, i32 1> 106; CHECK-NEXT: [[T3:%.*]] = shl nuw nsw <3 x i32> [[SHUF]], splat (i32 17) 107; CHECK-NEXT: ret <3 x i32> [[T3]] 108; 109 %t2 = zext <2 x i8> %x to <2 x i32> 110 %shuf = shufflevector <2 x i32> %t2, <2 x i32> undef, <3 x i32> <i32 1, i32 0, i32 1> 111 %t3 = shl <3 x i32> %shuf, <i32 17, i32 17, i32 17> 112 ret <3 x i32> %t3 113} 114 115; Negative test - if the shuffle mask contains an undef, we bail out to 116; avoid propagating information that may not be used consistently by callers. 117 118define <3 x i32> @shl_nuw_nsw_shuffle_undef_elt_splat_vec(<2 x i8> %x) { 119; CHECK-LABEL: @shl_nuw_nsw_shuffle_undef_elt_splat_vec( 120; CHECK-NEXT: [[T2:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32> 121; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i32> [[T2]], <2 x i32> poison, <3 x i32> <i32 1, i32 poison, i32 0> 122; CHECK-NEXT: [[T3:%.*]] = shl <3 x i32> [[SHUF]], splat (i32 17) 123; CHECK-NEXT: ret <3 x i32> [[T3]] 124; 125 %t2 = zext <2 x i8> %x to <2 x i32> 126 %shuf = shufflevector <2 x i32> %t2, <2 x i32> undef, <3 x i32> <i32 1, i32 undef, i32 0> 127 %t3 = shl <3 x i32> %shuf, <i32 17, i32 17, i32 17> 128 ret <3 x i32> %t3 129} 130 131; Make sure we don't crash on a ConstantExpr shufflevector 132define <vscale x 2 x i64> @mul_nuw_nsw_shuffle_constant_expr(<vscale x 2 x i8> %z) { 133; CHECK-LABEL: @mul_nuw_nsw_shuffle_constant_expr( 134; CHECK-NEXT: [[XX:%.*]] = zext <vscale x 2 x i8> [[Z:%.*]] to <vscale x 2 x i64> 135; CHECK-NEXT: [[T3:%.*]] = mul <vscale x 2 x i64> [[XX]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 3, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer) 136; CHECK-NEXT: ret <vscale x 2 x i64> [[T3]] 137; 138 %xx = zext <vscale x 2 x i8> %z to <vscale x 2 x i64> 139 %shuf = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 3, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer 140 %t3 = mul <vscale x 2 x i64> %shuf, %xx 141 ret <vscale x 2 x i64> %t3 142} 143 144; This could propagate nsw. 145 146define i32 @neg_sub0_sub_nsw_nsw(i32 %a, i32 %b) { 147; CHECK-LABEL: @neg_sub0_sub_nsw_nsw( 148; CHECK-NEXT: [[C_NEG:%.*]] = sub nsw i32 [[B:%.*]], [[A:%.*]] 149; CHECK-NEXT: ret i32 [[C_NEG]] 150; 151 %c = sub nsw i32 %a, %b 152 %d = sub nsw i32 0, %c 153 ret i32 %d 154} 155 156; Must not propagate nsw. 157 158define i32 @neg_sub_sub_nsw0(i32 %a, i32 %b) { 159; CHECK-LABEL: @neg_sub_sub_nsw0( 160; CHECK-NEXT: [[C_NEG:%.*]] = sub i32 [[B:%.*]], [[A:%.*]] 161; CHECK-NEXT: ret i32 [[C_NEG]] 162; 163 %c = sub nsw i32 %a, %b 164 %d = sub i32 0, %c 165 ret i32 %d 166} 167 168; Must not propagate nsw. 169 170define i32 @neg_sub_sub_nsw1(i32 %a, i32 %b) { 171; CHECK-LABEL: @neg_sub_sub_nsw1( 172; CHECK-NEXT: [[C_NEG:%.*]] = sub i32 [[B:%.*]], [[A:%.*]] 173; CHECK-NEXT: ret i32 [[C_NEG]] 174; 175 %c = sub i32 %a, %b 176 %d = sub nsw i32 0, %c 177 ret i32 %d 178} 179 180; This could propagate nsw. 181 182define i32 @neg_mul_sub_nsw_nsw(i32 %a, i32 %b) { 183; CHECK-LABEL: @neg_mul_sub_nsw_nsw( 184; CHECK-NEXT: [[C_NEG:%.*]] = sub nsw i32 [[B:%.*]], [[A:%.*]] 185; CHECK-NEXT: ret i32 [[C_NEG]] 186; 187 %c = sub nsw i32 %a, %b 188 %d = mul nsw i32 -1, %c 189 ret i32 %d 190} 191 192; Must not propagate nsw. 193 194define i32 @neg_mul_sub_nsw0(i32 %a, i32 %b) { 195; CHECK-LABEL: @neg_mul_sub_nsw0( 196; CHECK-NEXT: [[C_NEG:%.*]] = sub i32 [[B:%.*]], [[A:%.*]] 197; CHECK-NEXT: ret i32 [[C_NEG]] 198; 199 %c = sub nsw i32 %a, %b 200 %d = mul i32 -1, %c 201 ret i32 %d 202} 203 204; Must not propagate nsw. 205 206define i32 @neg_mul_sub_nsw1(i32 %a, i32 %b) { 207; CHECK-LABEL: @neg_mul_sub_nsw1( 208; CHECK-NEXT: [[C_NEG:%.*]] = sub i32 [[B:%.*]], [[A:%.*]] 209; CHECK-NEXT: ret i32 [[C_NEG]] 210; 211 %c = sub i32 %a, %b 212 %d = mul nsw i32 -1, %c 213 ret i32 %d 214} 215 216; Must not propagate nsw. 217 218define i8 @neg_sub_sub2(i16 %a, i16 %b) { 219; CHECK-LABEL: @neg_sub_sub2( 220; CHECK-NEXT: [[C_NEG:%.*]] = sub i16 [[B:%.*]], [[A:%.*]] 221; CHECK-NEXT: [[D_NEG:%.*]] = trunc i16 [[C_NEG]] to i8 222; CHECK-NEXT: ret i8 [[D_NEG]] 223; 224 %c = sub nsw i16 %a, %b 225 %d = trunc i16 %c to i8 226 %e = sub nsw i8 0, %d 227 ret i8 %e 228} 229 230; Must not propagate nsw. 231 232define i32 @sub_sub0_nsw_nsw(i32 %a, i32 %b, i32 %c) { 233; CHECK-LABEL: @sub_sub0_nsw_nsw( 234; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[B:%.*]], [[C:%.*]] 235; CHECK-NEXT: [[S2:%.*]] = sub i32 [[A:%.*]], [[TMP1]] 236; CHECK-NEXT: ret i32 [[S2]] 237; 238 %s1 = sub nsw i32 %a, %b 239 %s2 = sub nsw i32 %s1, %c 240 ret i32 %s2 241} 242 243; Must not propagate nsw. 244 245define i32 @sub_sub1_nsw_nsw(i32 %a, i32 %b, i32 %c) { 246; CHECK-LABEL: @sub_sub1_nsw_nsw( 247; CHECK-NEXT: [[S1_NEG:%.*]] = sub i32 [[B:%.*]], [[A:%.*]] 248; CHECK-NEXT: [[S2:%.*]] = add i32 [[S1_NEG]], [[C:%.*]] 249; CHECK-NEXT: ret i32 [[S2]] 250; 251 %s1 = sub nsw i32 %a, %b 252 %s2 = sub nsw i32 %c, %s1 253 ret i32 %s2 254} 255 256define i8 @neg_nsw_freeze(i8 %a1, i8 %a2) { 257; CHECK-LABEL: @neg_nsw_freeze( 258; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw i8 [[A2:%.*]], [[A1:%.*]] 259; CHECK-NEXT: [[FR_NEG:%.*]] = freeze i8 [[A_NEG]] 260; CHECK-NEXT: ret i8 [[FR_NEG]] 261; 262 %a = sub nsw i8 %a1, %a2 263 %fr = freeze i8 %a 264 %neg = sub nsw i8 0, %fr 265 ret i8 %neg 266} 267 268define i8 @neg_nsw_phi(i1 %c, i8 %a1, i8 %a2, i8 %b1, i8 %b2) { 269; CHECK-LABEL: @neg_nsw_phi( 270; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]] 271; CHECK: if: 272; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw i8 [[A2:%.*]], [[A1:%.*]] 273; CHECK-NEXT: br label [[JOIN:%.*]] 274; CHECK: else: 275; CHECK-NEXT: [[B_NEG:%.*]] = sub nsw i8 [[B2:%.*]], [[B1:%.*]] 276; CHECK-NEXT: br label [[JOIN]] 277; CHECK: join: 278; CHECK-NEXT: [[PHI_NEG:%.*]] = phi i8 [ [[A_NEG]], [[IF]] ], [ [[B_NEG]], [[ELSE]] ] 279; CHECK-NEXT: ret i8 [[PHI_NEG]] 280; 281 br i1 %c, label %if, label %else 282 283if: 284 %a = sub nsw i8 %a1, %a2 285 br label %join 286 287else: 288 %b = sub nsw i8 %b1, %b2 289 br label %join 290 291join: 292 %phi = phi i8 [ %a, %if ], [ %b, %else ] 293 %neg = sub nsw i8 0, %phi 294 ret i8 %neg 295} 296 297define i8 @neg_nsw_select(i1 %c, i8 %a1, i8 %a2, i8 %b1, i8 %b2) { 298; CHECK-LABEL: @neg_nsw_select( 299; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw i8 [[A2:%.*]], [[A1:%.*]] 300; CHECK-NEXT: [[B_NEG:%.*]] = sub nsw i8 [[B2:%.*]], [[B1:%.*]] 301; CHECK-NEXT: [[SEL_NEG:%.*]] = select i1 [[C:%.*]], i8 [[A_NEG]], i8 [[B_NEG]] 302; CHECK-NEXT: ret i8 [[SEL_NEG]] 303; 304 %a = sub nsw i8 %a1, %a2 305 %b = sub nsw i8 %b1, %b2 306 %sel = select i1 %c, i8 %a, i8 %b 307 %neg = sub nsw i8 0, %sel 308 ret i8 %neg 309} 310 311define <4 x i8> @neg_nsw_shufflevector(<2 x i8> %a1, <2 x i8> %a2, <2 x i8> %b1, <2 x i8> %b2) { 312; CHECK-LABEL: @neg_nsw_shufflevector( 313; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw <2 x i8> [[A2:%.*]], [[A1:%.*]] 314; CHECK-NEXT: [[B_NEG:%.*]] = sub nsw <2 x i8> [[B2:%.*]], [[B1:%.*]] 315; CHECK-NEXT: [[SHUF_NEG:%.*]] = shufflevector <2 x i8> [[A_NEG]], <2 x i8> [[B_NEG]], <4 x i32> <i32 0, i32 1, i32 2, i32 3> 316; CHECK-NEXT: ret <4 x i8> [[SHUF_NEG]] 317; 318 %a = sub nsw <2 x i8> %a1, %a2 319 %b = sub nsw <2 x i8> %b1, %b2 320 %shuf = shufflevector <2 x i8> %a, <2 x i8> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 321 %neg = sub nsw <4 x i8> zeroinitializer, %shuf 322 ret <4 x i8> %neg 323} 324 325define i8 @neg_nsw_extractelement(<2 x i8> %a1, <2 x i8> %a2) { 326; CHECK-LABEL: @neg_nsw_extractelement( 327; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw <2 x i8> [[A2:%.*]], [[A1:%.*]] 328; CHECK-NEXT: [[EXTR_NEG:%.*]] = extractelement <2 x i8> [[A_NEG]], i64 0 329; CHECK-NEXT: ret i8 [[EXTR_NEG]] 330; 331 %a = sub nsw <2 x i8> %a1, %a2 332 %extr = extractelement <2 x i8> %a, i32 0 333 %neg = sub nsw i8 0, %extr 334 ret i8 %neg 335} 336 337define <2 x i8> @neg_nsw_insertelement(<2 x i8> %a1, <2 x i8> %a2, i8 %b1, i8 %b2) { 338; CHECK-LABEL: @neg_nsw_insertelement( 339; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw <2 x i8> [[A2:%.*]], [[A1:%.*]] 340; CHECK-NEXT: [[B_NEG:%.*]] = sub nsw i8 [[B2:%.*]], [[B1:%.*]] 341; CHECK-NEXT: [[INSERT_NEG:%.*]] = insertelement <2 x i8> [[A_NEG]], i8 [[B_NEG]], i64 0 342; CHECK-NEXT: ret <2 x i8> [[INSERT_NEG]] 343; 344 %a = sub nsw <2 x i8> %a1, %a2 345 %b = sub nsw i8 %b1, %b2 346 %insert = insertelement <2 x i8> %a, i8 %b, i32 0 347 %neg = sub nsw <2 x i8> zeroinitializer, %insert 348 ret <2 x i8> %neg 349} 350 351define i8 @neg_nsw_shl(i8 %a1, i8 %a2, i8 %b) { 352; CHECK-LABEL: @neg_nsw_shl( 353; CHECK-NEXT: [[A_NEG:%.*]] = sub nsw i8 [[A2:%.*]], [[A1:%.*]] 354; CHECK-NEXT: [[SHL_NEG:%.*]] = shl nsw i8 [[A_NEG]], [[B:%.*]] 355; CHECK-NEXT: ret i8 [[SHL_NEG]] 356; 357 %a = sub nsw i8 %a1, %a2 358 %shl = shl nsw i8 %a, %b 359 %neg = sub nsw i8 0, %shl 360 ret i8 %neg 361} 362 363define i8 @neg_nsw_shl_missing_nsw_on_shl(i8 %a1, i8 %a2, i8 %b) { 364; CHECK-LABEL: @neg_nsw_shl_missing_nsw_on_shl( 365; CHECK-NEXT: [[A_NEG:%.*]] = sub i8 [[A2:%.*]], [[A1:%.*]] 366; CHECK-NEXT: [[SHL_NEG:%.*]] = shl i8 [[A_NEG]], [[B:%.*]] 367; CHECK-NEXT: ret i8 [[SHL_NEG]] 368; 369 %a = sub nsw i8 %a1, %a2 370 %shl = shl i8 %a, %b 371 %neg = sub nsw i8 0, %shl 372 ret i8 %neg 373} 374 375define i8 @neg_nsw_shl_to_mul(i8 %a, i8 %b) { 376; CHECK-LABEL: @neg_nsw_shl_to_mul( 377; CHECK-NEXT: [[SHL_NEG:%.*]] = mul nsw i8 [[A:%.*]], -2 378; CHECK-NEXT: ret i8 [[SHL_NEG]] 379; 380 %shl = shl nsw i8 %a, 1 381 %neg = sub nsw i8 0, %shl 382 ret i8 %neg 383} 384 385define i8 @neg_nsw_shl_to_mul_missing_nsw_on_shl(i8 %a, i8 %b) { 386; CHECK-LABEL: @neg_nsw_shl_to_mul_missing_nsw_on_shl( 387; CHECK-NEXT: [[SHL_NEG:%.*]] = mul i8 [[A:%.*]], -2 388; CHECK-NEXT: ret i8 [[SHL_NEG]] 389; 390 %shl = shl i8 %a, 1 391 %neg = sub nsw i8 0, %shl 392 ret i8 %neg 393} 394 395define i8 @neg_nsw_mul(i8 %a1, i8 %a2, i8 %b) { 396; CHECK-LABEL: @neg_nsw_mul( 397; CHECK-NEXT: [[A_NEG:%.*]] = sub i8 [[A2:%.*]], [[A1:%.*]] 398; CHECK-NEXT: [[SHL_NEG:%.*]] = mul nsw i8 [[A_NEG]], [[B:%.*]] 399; CHECK-NEXT: ret i8 [[SHL_NEG]] 400; 401 %a = sub nsw i8 %a1, %a2 402 %shl = mul nsw i8 %a, %b 403 %neg = sub nsw i8 0, %shl 404 ret i8 %neg 405} 406 407define i8 @neg_nsw_mul_missing_nsw_on_mul(i8 %a1, i8 %a2, i8 %b) { 408; CHECK-LABEL: @neg_nsw_mul_missing_nsw_on_mul( 409; CHECK-NEXT: [[A_NEG:%.*]] = sub i8 [[A2:%.*]], [[A1:%.*]] 410; CHECK-NEXT: [[SHL_NEG:%.*]] = mul i8 [[A_NEG]], [[B:%.*]] 411; CHECK-NEXT: ret i8 [[SHL_NEG]] 412; 413 %a = sub nsw i8 %a1, %a2 414 %shl = mul i8 %a, %b 415 %neg = sub nsw i8 0, %shl 416 ret i8 %neg 417} 418 419; This could propagate nsw. 420 421define i16 @mul_nsw_reassoc_prop(i16 %x) { 422; CHECK-LABEL: @mul_nsw_reassoc_prop( 423; CHECK-NEXT: [[B:%.*]] = mul nsw i16 [[X:%.*]], 6 424; CHECK-NEXT: ret i16 [[B]] 425; 426 %a = mul nsw i16 %x, 3 427 %b = mul nsw i16 %a, 2 428 ret i16 %b 429} 430 431; This could propagate nsw. 432 433define i16 @mul_nsw_reassoc_prop_neg(i16 %x) { 434; CHECK-LABEL: @mul_nsw_reassoc_prop_neg( 435; CHECK-NEXT: [[B:%.*]] = mul nsw i16 [[X:%.*]], -2201 436; CHECK-NEXT: ret i16 [[B]] 437; 438 %a = mul nsw i16 %x, -71 439 %b = mul nsw i16 %a, 31 440 ret i16 %b 441} 442 443; Must not propagate nsw. 444 445define i16 @mul_nsw_reassoc_prop_no_nsw1(i16 %x) { 446; CHECK-LABEL: @mul_nsw_reassoc_prop_no_nsw1( 447; CHECK-NEXT: [[B:%.*]] = mul i16 [[X:%.*]], 6 448; CHECK-NEXT: ret i16 [[B]] 449; 450 %a = mul i16 %x, 3 451 %b = mul nsw i16 %a, 2 452 ret i16 %b 453} 454 455; Must not propagate nsw. 456 457define i16 @mul_nsw_reassoc_prop_no_nsw2(i16 %x) { 458; CHECK-LABEL: @mul_nsw_reassoc_prop_no_nsw2( 459; CHECK-NEXT: [[B:%.*]] = mul i16 [[X:%.*]], 6 460; CHECK-NEXT: ret i16 [[B]] 461; 462 %a = mul nsw i16 %x, 3 463 %b = mul i16 %a, 2 464 ret i16 %b 465} 466 467; Must not propagate nsw. 468 469define i16 @mul_nsw_reassoc_prop_overflow(i16 %x) { 470; CHECK-LABEL: @mul_nsw_reassoc_prop_overflow( 471; CHECK-NEXT: [[B:%.*]] = mul i16 [[X:%.*]], -31777 472; CHECK-NEXT: ret i16 [[B]] 473; 474 %a = mul nsw i16 %x, 1023 475 %b = mul nsw i16 %a, 33 476 ret i16 %b 477} 478