1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=instcombine < %s | FileCheck %s 3 4; -------------------------------------------------------------------- 5; llvm.is.fpclass 6; -------------------------------------------------------------------- 7 8; FIXME: Should this really be immarg? 9; define i1 @test_class_undef_mask_f32(float %x) { 10; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 undef) 11; ret i1 %val 12; } 13 14define i1 @test_class_no_mask_f32(float %x) { 15; CHECK-LABEL: @test_class_no_mask_f32( 16; CHECK-NEXT: ret i1 false 17; 18 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 0) 19 ret i1 %val 20} 21 22define i1 @test_class_full_mask_f32(float %x) { 23; CHECK-LABEL: @test_class_full_mask_f32( 24; CHECK-NEXT: ret i1 true 25; 26 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 1023) 27 ret i1 %val 28} 29 30define i1 @test_class_undef_no_mask_f32() { 31; CHECK-LABEL: @test_class_undef_no_mask_f32( 32; CHECK-NEXT: ret i1 false 33; 34 %val = call i1 @llvm.is.fpclass.f32(float undef, i32 0) 35 ret i1 %val 36} 37 38define i1 @test_class_undef_full_mask_f32() { 39; CHECK-LABEL: @test_class_undef_full_mask_f32( 40; CHECK-NEXT: ret i1 true 41; 42 %val = call i1 @llvm.is.fpclass.f32(float undef, i32 1023) 43 ret i1 %val 44} 45 46define i1 @test_class_poison_no_mask_f32() { 47; CHECK-LABEL: @test_class_poison_no_mask_f32( 48; CHECK-NEXT: ret i1 poison 49; 50 %val = call i1 @llvm.is.fpclass.f32(float poison, i32 0) 51 ret i1 %val 52} 53 54define i1 @test_class_poison_full_mask_f32() { 55; CHECK-LABEL: @test_class_poison_full_mask_f32( 56; CHECK-NEXT: ret i1 poison 57; 58 %val = call i1 @llvm.is.fpclass.f32(float poison, i32 1023) 59 ret i1 %val 60} 61 62define i1 @test_class_undef_val_f32() { 63; CHECK-LABEL: @test_class_undef_val_f32( 64; CHECK-NEXT: ret i1 undef 65; 66 %val = call i1 @llvm.is.fpclass.f32(float undef, i32 4) 67 ret i1 %val 68} 69 70define i1 @test_class_poison_val_f32() { 71; CHECK-LABEL: @test_class_poison_val_f32( 72; CHECK-NEXT: ret i1 poison 73; 74 %val = call i1 @llvm.is.fpclass.f32(float poison, i32 4) 75 ret i1 %val 76} 77 78; FIXME: Should this really be immarg? 79; define i1 @test_class_undef_undef_f32() { 80; %val = call i1 @llvm.is.fpclass.f32(float undef, i32 undef) 81; ret i1 %val 82; } 83 84; FIXME: Should this really be immarg? 85; define i1 @test_class_var_mask_f32(float %x, i32 %mask) { 86; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 %mask) 87; ret i1 %val 88; } 89 90define i1 @test_class_isnan_f32(float %x) { 91; CHECK-LABEL: @test_class_isnan_f32( 92; CHECK-NEXT: [[VAL:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00 93; CHECK-NEXT: ret i1 [[VAL]] 94; 95 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 96 ret i1 %val 97} 98 99define <2 x i1> @test_class_isnan_v2f32(<2 x float> %x) { 100; CHECK-LABEL: @test_class_isnan_v2f32( 101; CHECK-NEXT: [[VAL:%.*]] = fcmp uno <2 x float> [[X:%.*]], zeroinitializer 102; CHECK-NEXT: ret <2 x i1> [[VAL]] 103; 104 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3) 105 ret <2 x i1> %val 106} 107 108define i1 @test_class_isnan_f32_strict(float %x) strictfp { 109; CHECK-LABEL: @test_class_isnan_f32_strict( 110; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR0:[0-9]+]] 111; CHECK-NEXT: ret i1 [[VAL]] 112; 113 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp 114 ret i1 %val 115} 116 117define i1 @test_class_is_p0_n0_f32(float %x) { 118; CHECK-LABEL: @test_class_is_p0_n0_f32( 119; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0.000000e+00 120; CHECK-NEXT: ret i1 [[VAL]] 121; 122 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; fcZero 123 ret i1 %val 124} 125 126define <2 x i1> @test_class_is_p0_n0_v2f32(<2 x float> %x) { 127; CHECK-LABEL: @test_class_is_p0_n0_v2f32( 128; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], zeroinitializer 129; CHECK-NEXT: ret <2 x i1> [[VAL]] 130; 131 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 96) ; fcZero 132 ret <2 x i1> %val 133} 134 135define <2 x i1> @test_class_is_p0_n0_v2f32_daz(<2 x float> %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 136; CHECK-LABEL: @test_class_is_p0_n0_v2f32_daz( 137; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 96) 138; CHECK-NEXT: ret <2 x i1> [[VAL]] 139; 140 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 96) ; fcZero 141 ret <2 x i1> %val 142} 143 144define <2 x i1> @test_class_is_p0_n0_v2f32_dynamic(<2 x float> %x) "denormal-fp-math-f32"="ieee,dynamic" { 145; CHECK-LABEL: @test_class_is_p0_n0_v2f32_dynamic( 146; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 96) 147; CHECK-NEXT: ret <2 x i1> [[VAL]] 148; 149 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 96) ; fcZero 150 ret <2 x i1> %val 151} 152 153define i1 @test_class_is_p0_n0_or_nan_f32(float %x) { 154; CHECK-LABEL: @test_class_is_p0_n0_or_nan_f32( 155; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0.000000e+00 156; CHECK-NEXT: ret i1 [[VAL]] 157; 158 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 99) ; fcZero|fcNan 159 ret i1 %val 160} 161 162define <2 x i1> @test_class_is_p0_n0_or_nan_v2f32(<2 x float> %x) { 163; CHECK-LABEL: @test_class_is_p0_n0_or_nan_v2f32( 164; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq <2 x float> [[X:%.*]], zeroinitializer 165; CHECK-NEXT: ret <2 x i1> [[VAL]] 166; 167 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 99) ; fcZero|fcNan 168 ret <2 x i1> %val 169} 170 171define i1 @test_class_is_p0_n0_or_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 172; CHECK-LABEL: @test_class_is_p0_n0_or_nan_f32_daz( 173; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 99) 174; CHECK-NEXT: ret i1 [[VAL]] 175; 176 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 99) ; fcZero|fcNan 177 ret i1 %val 178} 179 180define <2 x i1> @test_class_is_p0_n0_or_nan_v2f32_daz(<2 x float> %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 181; CHECK-LABEL: @test_class_is_p0_n0_or_nan_v2f32_daz( 182; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 99) 183; CHECK-NEXT: ret <2 x i1> [[VAL]] 184; 185 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 99) ; fcZero|fcNan 186 ret <2 x i1> %val 187} 188 189define i1 @test_class_is_p0_n0_or_sub_or_nan_f32(float %x) { 190; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_f32( 191; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 243) 192; CHECK-NEXT: ret i1 [[VAL]] 193; 194;` 195 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 243) ; fcZero|fcNan|fcSubnormal 196 ret i1 %val 197} 198 199define <2 x i1> @test_class_is_p0_n0_or_sub_or_nan_v2f32(<2 x float> %x) { 200; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_v2f32( 201; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 243) 202; CHECK-NEXT: ret <2 x i1> [[VAL]] 203; 204 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 243) ; fcZero|fcNan|fcSubnormal 205 ret <2 x i1> %val 206} 207 208define i1 @test_class_is_p0_n0_or_sub_or_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 209; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_f32_daz( 210; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0.000000e+00 211; CHECK-NEXT: ret i1 [[VAL]] 212; 213 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 243) ; fcZero|fcNan|fcSubnormal 214 ret i1 %val 215} 216 217define <2 x i1> @test_class_is_p0_n0_or_sub_or_nan_v2f32_daz(<2 x float> %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 218; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_v2f32_daz( 219; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq <2 x float> [[X:%.*]], zeroinitializer 220; CHECK-NEXT: ret <2 x i1> [[VAL]] 221; 222 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 243) ; fcZero|fcNan|fcSubnormal 223 ret <2 x i1> %val 224} 225 226define i1 @test_class_is_p0_n0_or_sub_or_snan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 227; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_snan_f32_daz( 228; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 241) 229; CHECK-NEXT: ret i1 [[VAL]] 230; 231 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 241) ; fcZero|fcSNan|fcSubnormal 232 ret i1 %val 233} 234 235define i1 @test_class_is_p0_n0_or_sub_or_qnan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 236; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_qnan_f32_daz( 237; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 242) 238; CHECK-NEXT: ret i1 [[VAL]] 239; 240 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 242) ; fcZero|fcQNan|fcSubnormal 241 ret i1 %val 242} 243 244define i1 @test_class_is_not_p0_n0_or_nan_f32(float %x) { 245; CHECK-LABEL: @test_class_is_not_p0_n0_or_nan_f32( 246; CHECK-NEXT: [[VAL:%.*]] = fcmp one float [[X:%.*]], 0.000000e+00 247; CHECK-NEXT: ret i1 [[VAL]] 248; 249 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 924) ; ~fcZero & ~fcNan & fcAllFlags 250 ret i1 %val 251} 252 253define i1 @test_class_is_not_p0_n0_or_qnan_f32(float %x) { 254; CHECK-LABEL: @test_class_is_not_p0_n0_or_qnan_f32( 255; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 926) 256; CHECK-NEXT: ret i1 [[VAL]] 257; 258 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 926) ; ~fcZero & ~fcSNan & fcAllFlags 259 ret i1 %val 260} 261 262define i1 @test_class_is_not_p0_n0_or_snan_f32(float %x) { 263; CHECK-LABEL: @test_class_is_not_p0_n0_or_snan_f32( 264; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 925) 265; CHECK-NEXT: ret i1 [[VAL]] 266; 267 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 925) ; ~fcZero & ~fcQNan & fcAllFlags 268 ret i1 %val 269} 270 271define i1 @test_class_is_not_p0_n0_or_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 272; CHECK-LABEL: @test_class_is_not_p0_n0_or_nan_f32_daz( 273; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 924) 274; CHECK-NEXT: ret i1 [[VAL]] 275; 276 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 924) ; ~fcZero & ~fcNan & fcAllFlags 277 ret i1 %val 278} 279 280define i1 @test_class_is_not_p0_n0_or_sub_or_nan_f32(float %x) { 281; CHECK-LABEL: @test_class_is_not_p0_n0_or_sub_or_nan_f32( 282; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 783) 283; CHECK-NEXT: ret i1 [[VAL]] 284; 285 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 783) ; ~(fcZero|fcSubnormal) | fcNan 286 ret i1 %val 287} 288 289define i1 @test_class_is_not_p0_n0_or_sub_or_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 290; CHECK-LABEL: @test_class_is_not_p0_n0_or_sub_or_nan_f32_daz( 291; CHECK-NEXT: [[VAL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00 292; CHECK-NEXT: ret i1 [[VAL]] 293; 294 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 783) ; ~(fcZero|fcSubnormal) | fcNan 295 ret i1 %val 296} 297 298define i1 @test_class_is_not_p0_n0_or_sub_and_not_nan_f32(float %x) { 299; CHECK-LABEL: @test_class_is_not_p0_n0_or_sub_and_not_nan_f32( 300; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 780) 301; CHECK-NEXT: ret i1 [[VAL]] 302; 303 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 780) ; ~(fcZero|fcSubnormal) & ~fcNan & fcAllFlags 304 ret i1 %val 305} 306 307define i1 @test_class_is_not_p0_n0_or_sub_and_not_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" { 308; CHECK-LABEL: @test_class_is_not_p0_n0_or_sub_and_not_nan_f32_daz( 309; CHECK-NEXT: [[VAL:%.*]] = fcmp one float [[X:%.*]], 0.000000e+00 310; CHECK-NEXT: ret i1 [[VAL]] 311; 312 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 780) ; ~(fcZero|fcSubonrmal) & ~fcNan & fcAllFlags 313 ret i1 %val 314} 315 316define i1 @test_class_is_not_p0_n0_f32(float %x) { 317; CHECK-LABEL: @test_class_is_not_p0_n0_f32( 318; CHECK-NEXT: [[VAL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00 319; CHECK-NEXT: ret i1 [[VAL]] 320; 321 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) ; ~fcZero & fcAllFlags 322 ret i1 %val 323} 324 325define <2 x i1> @test_class_is_not_p0_n0_v2f32(<2 x float> %x) { 326; CHECK-LABEL: @test_class_is_not_p0_n0_v2f32( 327; CHECK-NEXT: [[VAL:%.*]] = fcmp une <2 x float> [[X:%.*]], zeroinitializer 328; CHECK-NEXT: ret <2 x i1> [[VAL]] 329; 330 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 927) ; ~fcZero & fcAllFlags 331 ret <2 x i1> %val 332} 333 334define i1 @test_class_is_not_p0_n0_f32_strict(float %x) strictfp { 335; CHECK-LABEL: @test_class_is_not_p0_n0_f32_strict( 336; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) #[[ATTR0]] 337; CHECK-NEXT: ret i1 [[VAL]] 338; 339 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) strictfp ; ~fcZero & fcAllFlags 340 ret i1 %val 341} 342 343define i1 @test_class_is_not_p0_n0_f32_daz(float %x) "denormal-fp-math"="ieee,preserve-sign" { 344; CHECK-LABEL: @test_class_is_not_p0_n0_f32_daz( 345; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) 346; CHECK-NEXT: ret i1 [[VAL]] 347; 348 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) ; ~fcZero & fcAllFlags 349 ret i1 %val 350} 351 352define i1 @test_class_is_not_p0_n0_f32_dynamic(float %x) "denormal-fp-math"="ieee,dynamic" { 353; CHECK-LABEL: @test_class_is_not_p0_n0_f32_dynamic( 354; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) 355; CHECK-NEXT: ret i1 [[VAL]] 356; 357 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) ; ~fcZero & fcAllFlags 358 ret i1 %val 359} 360 361define i1 @test_class_is_not_p0_n0_psub_nsub_f32_daz(float %x) "denormal-fp-math"="ieee,preserve-sign" { 362; CHECK-LABEL: @test_class_is_not_p0_n0_psub_nsub_f32_daz( 363; CHECK-NEXT: [[VAL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00 364; CHECK-NEXT: ret i1 [[VAL]] 365; 366 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 783) ; ~(fcZero|fcSubnormal) & fcAllFlags 367 ret i1 %val 368} 369 370define i1 @test_class_is_not_p0_n0_psub_nsub_f32_dapz(float %x) "denormal-fp-math"="ieee,positive-zero" { 371; CHECK-LABEL: @test_class_is_not_p0_n0_psub_nsub_f32_dapz( 372; CHECK-NEXT: [[VAL:%.*]] = fcmp une float [[X:%.*]], 0.000000e+00 373; CHECK-NEXT: ret i1 [[VAL]] 374; 375 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 783) ; ~(fcZero|fcSubnormal) & fcAllFlags 376 ret i1 %val 377} 378 379define i1 @test_class_is_not_p0_n0_psub_nsub_f32_dynamic(float %x) "denormal-fp-math"="ieee,dynamic" { 380; CHECK-LABEL: @test_class_is_not_p0_n0_psub_nsub_f32_dynamic( 381; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 783) 382; CHECK-NEXT: ret i1 [[VAL]] 383; 384 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 783) ; ~(fcZero|fcSubnormal) & fcAllFlags 385 ret i1 %val 386} 387 388define i1 @test_class_is_p0_n0_f32_strict(float %x) strictfp { 389; CHECK-LABEL: @test_class_is_p0_n0_f32_strict( 390; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR0]] 391; CHECK-NEXT: ret i1 [[VAL]] 392; 393 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) strictfp 394 ret i1 %val 395} 396 397define i1 @test_class_is_p0_n0_f32_daz(float %x) "denormal-fp-math"="ieee,preserve-sign" { 398; CHECK-LABEL: @test_class_is_p0_n0_f32_daz( 399; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) 400; CHECK-NEXT: ret i1 [[VAL]] 401; 402 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; fcZero 403 ret i1 %val 404} 405 406define i1 @test_class_is_p0_n0_f32_dapz(float %x) "denormal-fp-math"="ieee,positive-zero" { 407; CHECK-LABEL: @test_class_is_p0_n0_f32_dapz( 408; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) 409; CHECK-NEXT: ret i1 [[VAL]] 410; 411 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) ; fcZero 412 ret i1 %val 413} 414 415define i1 @test_class_is_p0_n0_psub_nsub_f32(float %x) { 416; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_f32( 417; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 240) 418; CHECK-NEXT: ret i1 [[VAL]] 419; 420 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 240) ; fcZero | fcSubnormal 421 ret i1 %val 422} 423 424define i1 @test_class_is_p0_n0_psub_nsub_f32_daz(float %x) "denormal-fp-math"="ieee,preserve-sign" { 425; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_f32_daz( 426; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0.000000e+00 427; CHECK-NEXT: ret i1 [[VAL]] 428; 429 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 240) ; fcZero | fcSubnormal 430 ret i1 %val 431} 432 433define i1 @test_class_is_p0_n0_psub_nsub_f32_dapz(float %x) "denormal-fp-math"="ieee,positive-zero" { 434; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_f32_dapz( 435; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0.000000e+00 436; CHECK-NEXT: ret i1 [[VAL]] 437; 438 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 240) ; fcZero | fcSubnormal 439 ret i1 %val 440} 441 442define i1 @test_class_is_p0_n0_psub_nsub_f32_dynamic(float %x) "denormal-fp-math"="ieee,dynamic" { 443; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_f32_dynamic( 444; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 240) 445; CHECK-NEXT: ret i1 [[VAL]] 446; 447 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 240) ; fcZero | fcSubnormal 448 ret i1 %val 449} 450 451define <2 x i1> @test_class_is_p0_n0_psub_nsub_v2f32(<2 x float> %x) { 452; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_v2f32( 453; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 240) 454; CHECK-NEXT: ret <2 x i1> [[VAL]] 455; 456 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 240) ; fcZero | fcSubnormal 457 ret <2 x i1> %val 458} 459 460define <2 x i1> @test_class_is_p0_n0_psub_nsub_v2f32_daz(<2 x float> %x) "denormal-fp-math"="ieee,preserve-sign" { 461; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_v2f32_daz( 462; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], zeroinitializer 463; CHECK-NEXT: ret <2 x i1> [[VAL]] 464; 465 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 240) ; fcZero | fcSubnormal 466 ret <2 x i1> %val 467} 468 469define <2 x i1> @test_class_is_p0_n0_psub_nsub_v2f32_dapz(<2 x float> %x) "denormal-fp-math"="ieee,positive-zero" { 470; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_v2f32_dapz( 471; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], zeroinitializer 472; CHECK-NEXT: ret <2 x i1> [[VAL]] 473; 474 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 240) ; fcZero | fcSubnormal 475 ret <2 x i1> %val 476} 477 478define <2 x i1> @test_class_is_p0_n0_psub_nsub_v2f32_dynamic(<2 x float> %x) "denormal-fp-math"="ieee,dynamic" { 479; CHECK-LABEL: @test_class_is_p0_n0_psub_nsub_v2f32_dynamic( 480; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 240) 481; CHECK-NEXT: ret <2 x i1> [[VAL]] 482; 483 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 240) ; fcZero | fcSubnormal 484 ret <2 x i1> %val 485} 486 487define i1 @test_class_is_pinf_f32(float %x) { 488; CHECK-LABEL: @test_class_is_pinf_f32( 489; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0x7FF0000000000000 490; CHECK-NEXT: ret i1 [[VAL]] 491; 492 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; fcPosInf 493 ret i1 %val 494} 495 496define i1 @test_class_is_pinf_or_nan_f32(float %x) { 497; CHECK-LABEL: @test_class_is_pinf_or_nan_f32( 498; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0x7FF0000000000000 499; CHECK-NEXT: ret i1 [[VAL]] 500; 501 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 515) ; fcPosInf|fcNan 502 ret i1 %val 503} 504 505define <2 x i1> @test_class_is_pinf_v2f32(<2 x float> %x) { 506; CHECK-LABEL: @test_class_is_pinf_v2f32( 507; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], splat (float 0x7FF0000000000000) 508; CHECK-NEXT: ret <2 x i1> [[VAL]] 509; 510 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 512) ; fcPosInf 511 ret <2 x i1> %val 512} 513 514define i1 @test_class_is_ninf_f32(float %x) { 515; CHECK-LABEL: @test_class_is_ninf_f32( 516; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0xFFF0000000000000 517; CHECK-NEXT: ret i1 [[VAL]] 518; 519 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; fcNegInf 520 ret i1 %val 521} 522 523define i1 @test_class_is_ninf_or_nan_f32(float %x) { 524; CHECK-LABEL: @test_class_is_ninf_or_nan_f32( 525; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0xFFF0000000000000 526; CHECK-NEXT: ret i1 [[VAL]] 527; 528 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 7) ; fcNegInf|fcNan 529 ret i1 %val 530} 531 532define <2 x i1> @test_class_is_ninf_v2f32(<2 x float> %x) { 533; CHECK-LABEL: @test_class_is_ninf_v2f32( 534; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], splat (float 0xFFF0000000000000) 535; CHECK-NEXT: ret <2 x i1> [[VAL]] 536; 537 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 4) ; fcNegInf 538 ret <2 x i1> %val 539} 540 541define i1 @test_class_is_inf_f32(float %x) { 542; CHECK-LABEL: @test_class_is_inf_f32( 543; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) 544; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 545; CHECK-NEXT: ret i1 [[VAL]] 546; 547 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; fcInf 548 ret i1 %val 549} 550 551define <2 x i1> @test_class_is_inf_v2f32(<2 x float> %x) { 552; CHECK-LABEL: @test_class_is_inf_v2f32( 553; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X:%.*]]) 554; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[TMP1]], splat (float 0x7FF0000000000000) 555; CHECK-NEXT: ret <2 x i1> [[VAL]] 556; 557 %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 516) ; fcInf 558 ret <2 x i1> %val 559} 560 561define i1 @test_class_is_inf_or_nan_f32(float %x) { 562; CHECK-LABEL: @test_class_is_inf_or_nan_f32( 563; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) 564; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 565; CHECK-NEXT: ret i1 [[VAL]] 566; 567 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; fcInf|fcNan 568 ret i1 %val 569} 570 571define i1 @test_class_is_pinf_f32_strict(float %x) strictfp { 572; CHECK-LABEL: @test_class_is_pinf_f32_strict( 573; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512) #[[ATTR0]] 574; CHECK-NEXT: ret i1 [[VAL]] 575; 576 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 512) strictfp ; fcPosInf 577 ret i1 %val 578} 579 580define i1 @test_class_is_ninf_f32_strict(float %x) strictfp { 581; CHECK-LABEL: @test_class_is_ninf_f32_strict( 582; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4) #[[ATTR0]] 583; CHECK-NEXT: ret i1 [[VAL]] 584; 585 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 4) strictfp ; fcNegInf 586 ret i1 %val 587} 588 589define i1 @test_class_is_inf_f32_strict(float %x) strictfp { 590; CHECK-LABEL: @test_class_is_inf_f32_strict( 591; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) #[[ATTR0]] 592; CHECK-NEXT: ret i1 [[VAL]] 593; 594 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) strictfp ; fcInf 595 ret i1 %val 596} 597 598define i1 @test_class_is_pinf_or_nan_f32_strict(float %x) strictfp { 599; CHECK-LABEL: @test_class_is_pinf_or_nan_f32_strict( 600; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515) #[[ATTR0]] 601; CHECK-NEXT: ret i1 [[VAL]] 602; 603 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 515) strictfp ; fcPosInf|fcNan 604 ret i1 %val 605} 606 607define i1 @test_class_is_ninf_or_nan_f32_strict(float %x) strictfp { 608; CHECK-LABEL: @test_class_is_ninf_or_nan_f32_strict( 609; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7) #[[ATTR0]] 610; CHECK-NEXT: ret i1 [[VAL]] 611; 612 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 7) strictfp ; fcNegInf|fcNan 613 ret i1 %val 614} 615 616define i1 @test_class_is_inf_or_nan_f32_strict(float %x) strictfp { 617; CHECK-LABEL: @test_class_is_inf_or_nan_f32_strict( 618; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) #[[ATTR0]] 619; CHECK-NEXT: ret i1 [[VAL]] 620; 621 %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; fcInf|fcNan 622 ret i1 %val 623} 624 625define i1 @test_constant_class_snan_test_snan_f64() { 626; CHECK-LABEL: @test_constant_class_snan_test_snan_f64( 627; CHECK-NEXT: ret i1 true 628; 629 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 1) 630 ret i1 %val 631} 632 633define i1 @test_constant_class_qnan_test_qnan_f64() { 634; CHECK-LABEL: @test_constant_class_qnan_test_qnan_f64( 635; CHECK-NEXT: ret i1 true 636; 637 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 2) 638 ret i1 %val 639} 640 641define i1 @test_constant_class_qnan_test_snan_f64() { 642; CHECK-LABEL: @test_constant_class_qnan_test_snan_f64( 643; CHECK-NEXT: ret i1 false 644; 645 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 1) 646 ret i1 %val 647} 648 649define i1 @test_constant_class_ninf_test_ninf_f64() { 650; CHECK-LABEL: @test_constant_class_ninf_test_ninf_f64( 651; CHECK-NEXT: ret i1 true 652; 653 %val = call i1 @llvm.is.fpclass.f64(double 0xFFF0000000000000, i32 4) 654 ret i1 %val 655} 656 657define i1 @test_constant_class_pinf_test_ninf_f64() { 658; CHECK-LABEL: @test_constant_class_pinf_test_ninf_f64( 659; CHECK-NEXT: ret i1 false 660; 661 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000000, i32 4) 662 ret i1 %val 663} 664 665define i1 @test_constant_class_qnan_test_ninf_f64() { 666; CHECK-LABEL: @test_constant_class_qnan_test_ninf_f64( 667; CHECK-NEXT: ret i1 false 668; 669 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 4) 670 ret i1 %val 671} 672 673define i1 @test_constant_class_snan_test_ninf_f64() { 674; CHECK-LABEL: @test_constant_class_snan_test_ninf_f64( 675; CHECK-NEXT: ret i1 false 676; 677 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 4) 678 ret i1 %val 679} 680 681define i1 @test_constant_class_nnormal_test_nnormal_f64() { 682; CHECK-LABEL: @test_constant_class_nnormal_test_nnormal_f64( 683; CHECK-NEXT: ret i1 true 684; 685 %val = call i1 @llvm.is.fpclass.f64(double -1.0, i32 8) 686 ret i1 %val 687} 688 689define i1 @test_constant_class_pnormal_test_nnormal_f64() { 690; CHECK-LABEL: @test_constant_class_pnormal_test_nnormal_f64( 691; CHECK-NEXT: ret i1 false 692; 693 %val = call i1 @llvm.is.fpclass.f64(double 1.0, i32 8) 694 ret i1 %val 695} 696 697define i1 @test_constant_class_nsubnormal_test_nsubnormal_f64() { 698; CHECK-LABEL: @test_constant_class_nsubnormal_test_nsubnormal_f64( 699; CHECK-NEXT: ret i1 true 700; 701 %val = call i1 @llvm.is.fpclass.f64(double 0x800fffffffffffff, i32 16) 702 ret i1 %val 703} 704 705define i1 @test_constant_class_psubnormal_test_nsubnormal_f64() { 706; CHECK-LABEL: @test_constant_class_psubnormal_test_nsubnormal_f64( 707; CHECK-NEXT: ret i1 false 708; 709 %val = call i1 @llvm.is.fpclass.f64(double 0x000fffffffffffff, i32 16) 710 ret i1 %val 711} 712 713define i1 @test_constant_class_nzero_test_nzero_f64() { 714; CHECK-LABEL: @test_constant_class_nzero_test_nzero_f64( 715; CHECK-NEXT: ret i1 true 716; 717 %val = call i1 @llvm.is.fpclass.f64(double -0.0, i32 32) 718 ret i1 %val 719} 720 721define i1 @test_constant_class_pzero_test_nzero_f64() { 722; CHECK-LABEL: @test_constant_class_pzero_test_nzero_f64( 723; CHECK-NEXT: ret i1 false 724; 725 %val = call i1 @llvm.is.fpclass.f64(double 0.0, i32 32) 726 ret i1 %val 727} 728 729define i1 @test_constant_class_pzero_test_pzero_f64() { 730; CHECK-LABEL: @test_constant_class_pzero_test_pzero_f64( 731; CHECK-NEXT: ret i1 true 732; 733 %val = call i1 @llvm.is.fpclass.f64(double 0.0, i32 64) 734 ret i1 %val 735} 736 737define i1 @test_constant_class_nzero_test_pzero_f64() { 738; CHECK-LABEL: @test_constant_class_nzero_test_pzero_f64( 739; CHECK-NEXT: ret i1 false 740; 741 %val = call i1 @llvm.is.fpclass.f64(double -0.0, i32 64) 742 ret i1 %val 743} 744 745define i1 @test_constant_class_psubnormal_test_psubnormal_f64() { 746; CHECK-LABEL: @test_constant_class_psubnormal_test_psubnormal_f64( 747; CHECK-NEXT: ret i1 true 748; 749 %val = call i1 @llvm.is.fpclass.f64(double 0x000fffffffffffff, i32 128) 750 ret i1 %val 751} 752 753define i1 @test_constant_class_nsubnormal_test_psubnormal_f64() { 754; CHECK-LABEL: @test_constant_class_nsubnormal_test_psubnormal_f64( 755; CHECK-NEXT: ret i1 false 756; 757 %val = call i1 @llvm.is.fpclass.f64(double 0x800fffffffffffff, i32 128) 758 ret i1 %val 759} 760 761define i1 @test_constant_class_pnormal_test_pnormal_f64() { 762; CHECK-LABEL: @test_constant_class_pnormal_test_pnormal_f64( 763; CHECK-NEXT: ret i1 true 764; 765 %val = call i1 @llvm.is.fpclass.f64(double 1.0, i32 256) 766 ret i1 %val 767} 768 769define i1 @test_constant_class_nnormal_test_pnormal_f64() { 770; CHECK-LABEL: @test_constant_class_nnormal_test_pnormal_f64( 771; CHECK-NEXT: ret i1 false 772; 773 %val = call i1 @llvm.is.fpclass.f64(double -1.0, i32 256) 774 ret i1 %val 775} 776 777define i1 @test_constant_class_pinf_test_pinf_f64() { 778; CHECK-LABEL: @test_constant_class_pinf_test_pinf_f64( 779; CHECK-NEXT: ret i1 true 780; 781 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000000, i32 512) 782 ret i1 %val 783} 784 785define i1 @test_constant_class_ninf_test_pinf_f64() { 786; CHECK-LABEL: @test_constant_class_ninf_test_pinf_f64( 787; CHECK-NEXT: ret i1 false 788; 789 %val = call i1 @llvm.is.fpclass.f64(double 0xFFF0000000000000, i32 512) 790 ret i1 %val 791} 792 793define i1 @test_constant_class_qnan_test_pinf_f64() { 794; CHECK-LABEL: @test_constant_class_qnan_test_pinf_f64( 795; CHECK-NEXT: ret i1 false 796; 797 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 512) 798 ret i1 %val 799} 800 801define i1 @test_constant_class_snan_test_pinf_f64() { 802; CHECK-LABEL: @test_constant_class_snan_test_pinf_f64( 803; CHECK-NEXT: ret i1 false 804; 805 %val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 512) 806 ret i1 %val 807} 808 809define i1 @test_class_is_snan_nnan_src(float %x) { 810; CHECK-LABEL: @test_class_is_snan_nnan_src( 811; CHECK-NEXT: ret i1 false 812; 813 %nnan = fadd nnan float %x, 1.0 814 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 1) 815 ret i1 %class 816} 817 818define i1 @test_class_is_qnan_nnan_src(float %x) { 819; CHECK-LABEL: @test_class_is_qnan_nnan_src( 820; CHECK-NEXT: ret i1 false 821; 822 %nnan = fadd nnan float %x, 1.0 823 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 2) 824 ret i1 %class 825} 826 827define i1 @test_class_is_nan_nnan_src(float %x) { 828; CHECK-LABEL: @test_class_is_nan_nnan_src( 829; CHECK-NEXT: ret i1 false 830; 831 %nnan = fadd nnan float %x, 1.0 832 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 3) 833 ret i1 %class 834} 835 836define i1 @test_class_is_nan_other_nnan_src(float %x) { 837; CHECK-LABEL: @test_class_is_nan_other_nnan_src( 838; CHECK-NEXT: [[NNAN:%.*]] = fadd nnan float [[X:%.*]], 1.000000e+00 839; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NNAN]], i32 264) 840; CHECK-NEXT: ret i1 [[CLASS]] 841; 842 %nnan = fadd nnan float %x, 1.0 843 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 267) 844 ret i1 %class 845} 846 847; Fold test of is not nan 848define i1 @test_class_is_not_nan_nnan_src(float %x) { 849; CHECK-LABEL: @test_class_is_not_nan_nnan_src( 850; CHECK-NEXT: ret i1 true 851; 852 %nnan = fadd nnan float %x, 1.0 853 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 1020) ; ~fcNan & fcAllFlags 854 ret i1 %class 855} 856 857define i1 @test_class_is_not_nan_nnan_src_strict(float %x) strictfp { 858; CHECK-LABEL: @test_class_is_not_nan_nnan_src_strict( 859; CHECK-NEXT: ret i1 true 860; 861 %nnan = fadd nnan float %x, 1.0 862 %class = call i1 @llvm.is.fpclass.f32(float %nnan, i32 1020) strictfp ; ~fcNan & fcAllFlags 863 ret i1 %class 864} 865 866; -------------------------------------------------------------------- 867; llvm.is.fpclass with ninf sources 868; -------------------------------------------------------------------- 869 870define i1 @test_class_is_ninf_pinf_ninf_src(float %x) { 871; CHECK-LABEL: @test_class_is_ninf_pinf_ninf_src( 872; CHECK-NEXT: ret i1 false 873; 874 %ninf = fadd ninf float %x, 1.0 875 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 516) 876 ret i1 %class 877} 878 879define i1 @test_class_is_ninf_ninf_src(float %x) { 880; CHECK-LABEL: @test_class_is_ninf_ninf_src( 881; CHECK-NEXT: ret i1 false 882; 883 %ninf = fadd ninf float %x, 1.0 884 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 4) 885 ret i1 %class 886} 887 888define i1 @test_class_is_pinf_ninf_src(float %x) { 889; CHECK-LABEL: @test_class_is_pinf_ninf_src( 890; CHECK-NEXT: ret i1 false 891; 892 %ninf = fadd ninf float %x, 1.0 893 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 512) 894 ret i1 %class 895} 896 897define i1 @test_class_is_ninf_pinf_pnormal_ninf_src(float %x) { 898; CHECK-LABEL: @test_class_is_ninf_pinf_pnormal_ninf_src( 899; CHECK-NEXT: [[NINF:%.*]] = fadd ninf float [[X:%.*]], 1.000000e+00 900; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NINF]], i32 256) 901; CHECK-NEXT: ret i1 [[CLASS]] 902; 903 %ninf = fadd ninf float %x, 1.0 904 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 772) 905 ret i1 %class 906} 907 908define i1 @test_class_is_not_inf_ninf_src(float %x) { 909; CHECK-LABEL: @test_class_is_not_inf_ninf_src( 910; CHECK-NEXT: ret i1 true 911; 912 %ninf = fadd ninf float %x, 1.0 913 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 507) ; ~fcInf & fcAllFlags 914 ret i1 %class 915} 916 917define i1 @test_class_is_not_inf_ninf_src_strict(float %x) strictfp { 918; CHECK-LABEL: @test_class_is_not_inf_ninf_src_strict( 919; CHECK-NEXT: ret i1 true 920; 921 %ninf = fadd ninf float %x, 1.0 922 %class = call i1 @llvm.is.fpclass.f32(float %ninf, i32 507) strictfp ; ~fcInf & fcAllFlags 923 ret i1 %class 924} 925 926; -------------------------------------------------------------------- 927; Negation of llvm.is.fpclass 928; -------------------------------------------------------------------- 929 930define i1 @test_class_not_is_nan(float %x) { 931; CHECK-LABEL: @test_class_not_is_nan( 932; CHECK-NEXT: [[CLASS:%.*]] = fcmp ord float [[X:%.*]], 0.000000e+00 933; CHECK-NEXT: ret i1 [[CLASS]] 934; 935 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 936 %not = xor i1 %class, true 937 ret i1 %not 938} 939 940define i1 @test_class_not_is_nan_multi_use(float %x, ptr %ptr) { 941; CHECK-LABEL: @test_class_not_is_nan_multi_use( 942; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00 943; CHECK-NEXT: store i1 [[CLASS]], ptr [[PTR:%.*]], align 1 944; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[CLASS]], true 945; CHECK-NEXT: ret i1 [[NOT]] 946; 947 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 948 store i1 %class, ptr %ptr 949 %not = xor i1 %class, true 950 ret i1 %not 951} 952 953define i1 @test_class_not_is_inf_nan(float %x) { 954; CHECK-LABEL: @test_class_not_is_inf_nan( 955; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) 956; CHECK-NEXT: [[CLASS:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000 957; CHECK-NEXT: ret i1 [[CLASS]] 958; 959 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 519) 960 %not = xor i1 %class, true 961 ret i1 %not 962} 963 964define i1 @test_class_not_is_normal(float %x) { 965; CHECK-LABEL: @test_class_not_is_normal( 966; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 759) 967; CHECK-NEXT: ret i1 [[CLASS]] 968; 969 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 264) 970 %not = xor i1 %class, true 971 ret i1 %not 972} 973 974define i1 @test_class_xor_false(float %x) { 975; CHECK-LABEL: @test_class_xor_false( 976; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 33) 977; CHECK-NEXT: ret i1 [[CLASS]] 978; 979 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 33) 980 %not = xor i1 %class, false 981 ret i1 %not 982} 983 984define <2 x i1> @test_class_not_vector(<2 x float> %x) { 985; CHECK-LABEL: @test_class_not_vector( 986; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 990) 987; CHECK-NEXT: ret <2 x i1> [[CLASS]] 988; 989 %class = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 33) 990 %not = xor <2 x i1> %class, <i1 true, i1 true> 991 ret <2 x i1> %not 992} 993 994define <2 x i1> @test_class_xor_vector(<2 x float> %x) { 995; CHECK-LABEL: @test_class_xor_vector( 996; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 33) 997; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[CLASS]], <i1 true, i1 false> 998; CHECK-NEXT: ret <2 x i1> [[NOT]] 999; 1000 %class = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 33) 1001 %not = xor <2 x i1> %class, <i1 true, i1 false> 1002 ret <2 x i1> %not 1003} 1004 1005; -------------------------------------------------------------------- 1006; or llvm.is.fpclass, llvm.is.fpclass 1007; -------------------------------------------------------------------- 1008 1009define i1 @test_fold_or_class_f32_0(float %a) { 1010; CHECK-LABEL: @test_fold_or_class_f32_0( 1011; CHECK-NEXT: [[CLASS0:%.*]] = fcmp uno float [[A:%.*]], 0.000000e+00 1012; CHECK-NEXT: ret i1 [[CLASS0]] 1013; 1014 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1015 %class1 = fcmp uno float %a, 0.000000e+00 1016 %or = or i1 %class0, %class1 1017 ret i1 %or 1018} 1019 1020define i1 @test_fold_or3_class_f32_0(float %a) { 1021; CHECK-LABEL: @test_fold_or3_class_f32_0( 1022; CHECK-NEXT: [[OR_1:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000 1023; CHECK-NEXT: ret i1 [[OR_1]] 1024; 1025 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1026 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1027 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1028 %or.0 = or i1 %class0, %class1 1029 %or.1 = or i1 %or.0, %class2 1030 ret i1 %or.1 1031} 1032 1033define i1 @test_fold_or_all_tests_class_f32_0(float %a) { 1034; CHECK-LABEL: @test_fold_or_all_tests_class_f32_0( 1035; CHECK-NEXT: ret i1 true 1036; 1037 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1038 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1039 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1040 %class3 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1041 %class4 = call i1 @llvm.is.fpclass.f32(float %a, i32 16) 1042 %class5 = call i1 @llvm.is.fpclass.f32(float %a, i32 32) 1043 %class6 = call i1 @llvm.is.fpclass.f32(float %a, i32 64) 1044 %class7 = call i1 @llvm.is.fpclass.f32(float %a, i32 128) 1045 %class8 = call i1 @llvm.is.fpclass.f32(float %a, i32 256) 1046 %class9 = call i1 @llvm.is.fpclass.f32(float %a, i32 512) 1047 %or.0 = or i1 %class0, %class1 1048 %or.1 = or i1 %or.0, %class2 1049 %or.2 = or i1 %or.1, %class3 1050 %or.3 = or i1 %or.2, %class4 1051 %or.4 = or i1 %or.3, %class5 1052 %or.5 = or i1 %or.4, %class6 1053 %or.6 = or i1 %or.5, %class7 1054 %or.7 = or i1 %or.6, %class8 1055 %or.8 = or i1 %or.7, %class9 1056 ret i1 %or.8 1057} 1058 1059define i1 @test_fold_or_class_f32_1(float %a) { 1060; CHECK-LABEL: @test_fold_or_class_f32_1( 1061; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12) 1062; CHECK-NEXT: ret i1 [[CLASS1]] 1063; 1064 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1065 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1066 %or = or i1 %class0, %class1 1067 ret i1 %or 1068} 1069 1070define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) { 1071; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use0( 1072; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1073; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1 1074; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1075; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]] 1076; CHECK-NEXT: ret i1 [[OR]] 1077; 1078 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1079 store i1 %class0, ptr %ptr 1080 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1081 %or = or i1 %class0, %class1 1082 ret i1 %or 1083} 1084 1085define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) { 1086; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use1( 1087; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1088; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1089; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1 1090; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]] 1091; CHECK-NEXT: ret i1 [[OR]] 1092; 1093 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1094 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1095 store i1 %class1, ptr %ptr 1096 %or = or i1 %class0, %class1 1097 ret i1 %or 1098} 1099 1100define i1 @test_fold_or_class_f32_2(float %a) { 1101; CHECK-LABEL: @test_fold_or_class_f32_2( 1102; CHECK-NEXT: [[OR:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000 1103; CHECK-NEXT: ret i1 [[OR]] 1104; 1105 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1106 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1107 %or = or i1 %class0, %class1 1108 ret i1 %or 1109} 1110 1111define i1 @test_no_fold_or_class_f32_0(float %a, float %b) { 1112; CHECK-LABEL: @test_no_fold_or_class_f32_0( 1113; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1114; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8) 1115; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]] 1116; CHECK-NEXT: ret i1 [[OR]] 1117; 1118 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1119 %class1 = call i1 @llvm.is.fpclass.f32(float %b, i32 8) 1120 %or = or i1 %class0, %class1 1121 ret i1 %or 1122} 1123 1124define <2 x i1> @test_fold_or_class_v2f32(<2 x float> %a) { 1125; CHECK-LABEL: @test_fold_or_class_v2f32( 1126; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 12) 1127; CHECK-NEXT: ret <2 x i1> [[CLASS1]] 1128; 1129 %class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 4) 1130 %class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 8) 1131 %or = or <2 x i1> %class0, %class1 1132 ret <2 x i1> %or 1133} 1134 1135; -------------------------------------------------------------------- 1136; and llvm.is.fpclass, llvm.is.fpclass 1137; -------------------------------------------------------------------- 1138 1139define i1 @test_fold_and_class_f32_0(float %a) { 1140; CHECK-LABEL: @test_fold_and_class_f32_0( 1141; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1) 1142; CHECK-NEXT: ret i1 [[CLASS0]] 1143; 1144 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1145 %class1 = fcmp uno float %a, 0.000000e+00 1146 %and = and i1 %class0, %class1 1147 ret i1 %and 1148} 1149 1150define i1 @test_fold_and3_class_f32_0(float %a) { 1151; CHECK-LABEL: @test_fold_and3_class_f32_0( 1152; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 2) 1153; CHECK-NEXT: ret i1 [[CLASS1]] 1154; 1155 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 3) 1156 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1157 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1158 %and.0 = and i1 %class0, %class1 1159 %and.1 = and i1 %and.0, %class2 1160 ret i1 %and.1 1161} 1162 1163define i1 @test_fold_and_all_tests_class_f32_0(float %a) { 1164; CHECK-LABEL: @test_fold_and_all_tests_class_f32_0( 1165; CHECK-NEXT: ret i1 false 1166; 1167 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1168 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1169 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1170 %class3 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1171 %class4 = call i1 @llvm.is.fpclass.f32(float %a, i32 16) 1172 %class5 = call i1 @llvm.is.fpclass.f32(float %a, i32 32) 1173 %class6 = call i1 @llvm.is.fpclass.f32(float %a, i32 64) 1174 %class7 = call i1 @llvm.is.fpclass.f32(float %a, i32 128) 1175 %class8 = call i1 @llvm.is.fpclass.f32(float %a, i32 256) 1176 %class9 = call i1 @llvm.is.fpclass.f32(float %a, i32 512) 1177 %and.0 = and i1 %class0, %class1 1178 %and.1 = and i1 %and.0, %class2 1179 %and.2 = and i1 %and.1, %class3 1180 %and.3 = and i1 %and.2, %class4 1181 %and.4 = and i1 %and.3, %class5 1182 %and.5 = and i1 %and.4, %class6 1183 %and.6 = and i1 %and.5, %class7 1184 %and.7 = and i1 %and.6, %class8 1185 %and.8 = and i1 %and.7, %class9 1186 ret i1 %and.8 1187} 1188 1189define i1 @test_fold_and_not_all_tests_class_f32_0(float %a) { 1190; CHECK-LABEL: @test_fold_and_not_all_tests_class_f32_0( 1191; CHECK-NEXT: ret i1 false 1192; 1193 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1022) 1194 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 1021) 1195 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 1019) 1196 %class3 = call i1 @llvm.is.fpclass.f32(float %a, i32 1015) 1197 %class4 = call i1 @llvm.is.fpclass.f32(float %a, i32 1007) 1198 %class5 = call i1 @llvm.is.fpclass.f32(float %a, i32 991) 1199 %class6 = call i1 @llvm.is.fpclass.f32(float %a, i32 959) 1200 %class7 = call i1 @llvm.is.fpclass.f32(float %a, i32 895) 1201 %class8 = call i1 @llvm.is.fpclass.f32(float %a, i32 767) 1202 %class9 = call i1 @llvm.is.fpclass.f32(float %a, i32 511) 1203 %and.0 = and i1 %class0, %class1 1204 %and.1 = and i1 %and.0, %class2 1205 %and.2 = and i1 %and.1, %class3 1206 %and.3 = and i1 %and.2, %class4 1207 %and.4 = and i1 %and.3, %class5 1208 %and.5 = and i1 %and.4, %class6 1209 %and.6 = and i1 %and.5, %class7 1210 %and.7 = and i1 %and.6, %class8 1211 %and.8 = and i1 %and.7, %class9 1212 ret i1 %and.8 1213} 1214 1215define i1 @test_fold_and_class_f32_1(float %a) { 1216; CHECK-LABEL: @test_fold_and_class_f32_1( 1217; CHECK-NEXT: ret i1 false 1218; 1219 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 48) 1220 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 11) 1221 %and = and i1 %class0, %class1 1222 ret i1 %and 1223} 1224 1225define i1 @test_no_fold_and_class_f32_multi_use0(float %a, ptr %ptr) { 1226; CHECK-LABEL: @test_no_fold_and_class_f32_multi_use0( 1227; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 15) 1228; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1 1229; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1230; CHECK-NEXT: [[AND:%.*]] = and i1 [[CLASS0]], [[CLASS1]] 1231; CHECK-NEXT: ret i1 [[AND]] 1232; 1233 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 15) 1234 store i1 %class0, ptr %ptr 1235 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1236 %and = and i1 %class0, %class1 1237 ret i1 %and 1238} 1239 1240define i1 @test_no_fold_and_class_f32_multi_use1(float %a, ptr %ptr) { 1241; CHECK-LABEL: @test_no_fold_and_class_f32_multi_use1( 1242; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 15) 1243; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1244; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1 1245; CHECK-NEXT: [[AND:%.*]] = and i1 [[CLASS0]], [[CLASS1]] 1246; CHECK-NEXT: ret i1 [[AND]] 1247; 1248 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 15) 1249 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1250 store i1 %class1, ptr %ptr 1251 %and = and i1 %class0, %class1 1252 ret i1 %and 1253} 1254 1255define i1 @test_fold_and_class_f32_2(float %a) { 1256; CHECK-LABEL: @test_fold_and_class_f32_2( 1257; CHECK-NEXT: [[AND:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000 1258; CHECK-NEXT: ret i1 [[AND]] 1259; 1260 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1261 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1262 %and = and i1 %class0, %class1 1263 ret i1 %and 1264} 1265 1266define i1 @test_fold_and_class_f32_3(float %a) { 1267; CHECK-LABEL: @test_fold_and_class_f32_3( 1268; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1) 1269; CHECK-NEXT: ret i1 [[CLASS0]] 1270; 1271 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 37) 1272 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 393) 1273 %and = and i1 %class0, %class1 1274 ret i1 %and 1275} 1276 1277define i1 @test_fold_and_class_f32_4(float %a) { 1278; CHECK-LABEL: @test_fold_and_class_f32_4( 1279; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1) 1280; CHECK-NEXT: ret i1 [[CLASS0]] 1281; 1282 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 393) 1283 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 37) 1284 %and = and i1 %class0, %class1 1285 ret i1 %and 1286} 1287 1288define i1 @test_no_fold_and_class_f32_0(float %a, float %b) { 1289; CHECK-LABEL: @test_no_fold_and_class_f32_0( 1290; CHECK-NEXT: [[CLASS0:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000 1291; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 15) 1292; CHECK-NEXT: [[AND:%.*]] = and i1 [[CLASS0]], [[CLASS1]] 1293; CHECK-NEXT: ret i1 [[AND]] 1294; 1295 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1296 %class1 = call i1 @llvm.is.fpclass.f32(float %b, i32 15) 1297 %and = and i1 %class0, %class1 1298 ret i1 %and 1299} 1300 1301define <2 x i1> @test_fold_and_class_v2f32(<2 x float> %a) { 1302; CHECK-LABEL: @test_fold_and_class_v2f32( 1303; CHECK-NEXT: [[CLASS1:%.*]] = fcmp ueq <2 x float> [[A:%.*]], splat (float 0xFFF0000000000000) 1304; CHECK-NEXT: ret <2 x i1> [[CLASS1]] 1305; 1306 %class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 7) 1307 %class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 15) 1308 %and = and <2 x i1> %class0, %class1 1309 ret <2 x i1> %and 1310} 1311 1312; -------------------------------------------------------------------- 1313; xor llvm.is.fpclass, llvm.is.fpclass 1314; -------------------------------------------------------------------- 1315 1316define i1 @test_fold_xor_class_f32_0(float %a) { 1317; CHECK-LABEL: @test_fold_xor_class_f32_0( 1318; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 2) 1319; CHECK-NEXT: ret i1 [[CLASS0]] 1320; 1321 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1322 %class1 = fcmp uno float %a, 0.000000e+00 1323 %xor = xor i1 %class0, %class1 1324 ret i1 %xor 1325} 1326 1327define i1 @test_fold_xor3_class_f32_0(float %a) { 1328; CHECK-LABEL: @test_fold_xor3_class_f32_0( 1329; CHECK-NEXT: [[XOR_1:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000 1330; CHECK-NEXT: ret i1 [[XOR_1]] 1331; 1332 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1333 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1334 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1335 %xor.0 = xor i1 %class0, %class1 1336 %xor.1 = xor i1 %xor.0, %class2 1337 ret i1 %xor.1 1338} 1339 1340define i1 @test_fold_xor_all_tests_class_f32_0(float %a) { 1341; CHECK-LABEL: @test_fold_xor_all_tests_class_f32_0( 1342; CHECK-NEXT: ret i1 true 1343; 1344 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1) 1345 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2) 1346 %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1347 %class3 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1348 %class4 = call i1 @llvm.is.fpclass.f32(float %a, i32 16) 1349 %class5 = call i1 @llvm.is.fpclass.f32(float %a, i32 32) 1350 %class6 = call i1 @llvm.is.fpclass.f32(float %a, i32 64) 1351 %class7 = call i1 @llvm.is.fpclass.f32(float %a, i32 128) 1352 %class8 = call i1 @llvm.is.fpclass.f32(float %a, i32 256) 1353 %class9 = call i1 @llvm.is.fpclass.f32(float %a, i32 512) 1354 %xor.0 = xor i1 %class0, %class1 1355 %xor.1 = xor i1 %xor.0, %class2 1356 %xor.2 = xor i1 %xor.1, %class3 1357 %xor.3 = xor i1 %xor.2, %class4 1358 %xor.4 = xor i1 %xor.3, %class5 1359 %xor.5 = xor i1 %xor.4, %class6 1360 %xor.6 = xor i1 %xor.5, %class7 1361 %xor.7 = xor i1 %xor.6, %class8 1362 %xor.8 = xor i1 %xor.7, %class9 1363 ret i1 %xor.8 1364} 1365 1366define i1 @test_fold_xor_class_f32_1(float %a) { 1367; CHECK-LABEL: @test_fold_xor_class_f32_1( 1368; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12) 1369; CHECK-NEXT: ret i1 [[CLASS1]] 1370; 1371 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1372 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1373 %xor = xor i1 %class0, %class1 1374 ret i1 %xor 1375} 1376 1377define i1 @test_no_fold_xor_class_f32_multi_use0(float %a, ptr %ptr) { 1378; CHECK-LABEL: @test_no_fold_xor_class_f32_multi_use0( 1379; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1380; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1 1381; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1382; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]] 1383; CHECK-NEXT: ret i1 [[XOR]] 1384; 1385 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1386 store i1 %class0, ptr %ptr 1387 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1388 %xor = xor i1 %class0, %class1 1389 ret i1 %xor 1390} 1391 1392define i1 @test_no_fold_xor_class_f32_multi_use1(float %a, ptr %ptr) { 1393; CHECK-LABEL: @test_no_fold_xor_class_f32_multi_use1( 1394; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1395; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8) 1396; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1 1397; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]] 1398; CHECK-NEXT: ret i1 [[XOR]] 1399; 1400 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1401 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8) 1402 store i1 %class1, ptr %ptr 1403 %xor = xor i1 %class0, %class1 1404 ret i1 %xor 1405} 1406 1407define i1 @test_fold_xor_class_f32_2(float %a) { 1408; CHECK-LABEL: @test_fold_xor_class_f32_2( 1409; CHECK-NEXT: ret i1 false 1410; 1411 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1412 %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7) 1413 %xor = xor i1 %class0, %class1 1414 ret i1 %xor 1415} 1416 1417define i1 @test_no_fold_xor_class_f32_0(float %a, float %b) { 1418; CHECK-LABEL: @test_no_fold_xor_class_f32_0( 1419; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000 1420; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8) 1421; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]] 1422; CHECK-NEXT: ret i1 [[XOR]] 1423; 1424 %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4) 1425 %class1 = call i1 @llvm.is.fpclass.f32(float %b, i32 8) 1426 %xor = xor i1 %class0, %class1 1427 ret i1 %xor 1428} 1429 1430define <2 x i1> @test_fold_xor_class_v2f32(<2 x float> %a) { 1431; CHECK-LABEL: @test_fold_xor_class_v2f32( 1432; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 9) 1433; CHECK-NEXT: ret <2 x i1> [[CLASS1]] 1434; 1435 %class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 4) 1436 %class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 13) 1437 %xor = xor <2 x i1> %class0, %class1 1438 ret <2 x i1> %xor 1439} 1440 1441; --------------------------------------------------------------------- 1442; fneg folds 1443; --------------------------------------------------------------------- 1444 1445; -> false 1446define i1 @test_class_fneg_none(float %arg) { 1447; CHECK-LABEL: @test_class_fneg_none( 1448; CHECK-NEXT: ret i1 false 1449; 1450 %fneg = fneg float %arg 1451 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 0) 1452 ret i1 %class 1453} 1454 1455; -> true 1456define i1 @test_class_fneg_all(float %arg) { 1457; CHECK-LABEL: @test_class_fneg_all( 1458; CHECK-NEXT: ret i1 true 1459; 1460 %fneg = fneg float %arg 1461 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 1023) 1462 ret i1 %class 1463} 1464 1465; -> snan 1466define i1 @test_class_fneg_snan(float %arg) { 1467; CHECK-LABEL: @test_class_fneg_snan( 1468; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1) 1469; CHECK-NEXT: ret i1 [[CLASS]] 1470; 1471 %fneg = fneg float %arg 1472 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 1) 1473 ret i1 %class 1474} 1475 1476; -> qnan 1477define i1 @test_class_fneg_qnan(float %arg) { 1478; CHECK-LABEL: @test_class_fneg_qnan( 1479; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 2) 1480; CHECK-NEXT: ret i1 [[CLASS]] 1481; 1482 %fneg = fneg float %arg 1483 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 2) 1484 ret i1 %class 1485} 1486 1487; -> posinf 1488define i1 @test_class_fneg_neginf(float %arg) { 1489; CHECK-LABEL: @test_class_fneg_neginf( 1490; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0x7FF0000000000000 1491; CHECK-NEXT: ret i1 [[CLASS]] 1492; 1493 %fneg = fneg float %arg 1494 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 4) 1495 ret i1 %class 1496} 1497 1498; -> posnormal 1499define i1 @test_class_fneg_negnormal(float %arg) { 1500; CHECK-LABEL: @test_class_fneg_negnormal( 1501; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 256) 1502; CHECK-NEXT: ret i1 [[CLASS]] 1503; 1504 %fneg = fneg float %arg 1505 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 8) 1506 ret i1 %class 1507} 1508 1509; -> possubnormal 1510define i1 @test_class_fneg_negsubnormal(float %arg) { 1511; CHECK-LABEL: @test_class_fneg_negsubnormal( 1512; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 128) 1513; CHECK-NEXT: ret i1 [[CLASS]] 1514; 1515 %fneg = fneg float %arg 1516 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 16) 1517 ret i1 %class 1518} 1519 1520; -> poszero 1521define i1 @test_class_fneg_negzero(float %arg) { 1522; CHECK-LABEL: @test_class_fneg_negzero( 1523; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 64) 1524; CHECK-NEXT: ret i1 [[CLASS]] 1525; 1526 %fneg = fneg float %arg 1527 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 32) 1528 ret i1 %class 1529} 1530 1531; -> negzero 1532define i1 @test_class_fneg_poszero(float %arg) { 1533; CHECK-LABEL: @test_class_fneg_poszero( 1534; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 32) 1535; CHECK-NEXT: ret i1 [[CLASS]] 1536; 1537 %fneg = fneg float %arg 1538 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 64) 1539 ret i1 %class 1540} 1541 1542; -> negsubnormal 1543define i1 @test_class_fneg_possubnormal(float %arg) { 1544; CHECK-LABEL: @test_class_fneg_possubnormal( 1545; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 16) 1546; CHECK-NEXT: ret i1 [[CLASS]] 1547; 1548 %fneg = fneg float %arg 1549 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 128) 1550 ret i1 %class 1551} 1552 1553; -> negnormal 1554define i1 @test_class_fneg_posnormal(float %arg) { 1555; CHECK-LABEL: @test_class_fneg_posnormal( 1556; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 8) 1557; CHECK-NEXT: ret i1 [[CLASS]] 1558; 1559 %fneg = fneg float %arg 1560 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 256) 1561 ret i1 %class 1562} 1563 1564; -> neginf 1565define i1 @test_class_fneg_posinf(float %arg) { 1566; CHECK-LABEL: @test_class_fneg_posinf( 1567; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0xFFF0000000000000 1568; CHECK-NEXT: ret i1 [[CLASS]] 1569; 1570 %fneg = fneg float %arg 1571 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 512) 1572 ret i1 %class 1573} 1574 1575; -> qnan|snan 1576define i1 @test_class_fneg_isnan(float %arg) { 1577; CHECK-LABEL: @test_class_fneg_isnan( 1578; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[ARG:%.*]], 0.000000e+00 1579; CHECK-NEXT: ret i1 [[CLASS]] 1580; 1581 %fneg = fneg float %arg 1582 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 3) 1583 ret i1 %class 1584} 1585 1586; -> ~nan 1587define i1 @test_class_fneg_nnan(float %arg) { 1588; CHECK-LABEL: @test_class_fneg_nnan( 1589; CHECK-NEXT: [[CLASS:%.*]] = fcmp ord float [[ARG:%.*]], 0.000000e+00 1590; CHECK-NEXT: ret i1 [[CLASS]] 1591; 1592 %fneg = fneg float %arg 1593 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 1020) 1594 ret i1 %class 1595} 1596 1597; -> normal 1598define i1 @test_class_fneg_normal(float %arg) { 1599; CHECK-LABEL: @test_class_fneg_normal( 1600; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 1601; CHECK-NEXT: ret i1 [[CLASS]] 1602; 1603 %fneg = fneg float %arg 1604 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 264) 1605 ret i1 %class 1606} 1607 1608; -> zero 1609define i1 @test_class_fneg_zero(float %arg) { 1610; 1611; CHECK-LABEL: @test_class_fneg_zero( 1612; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 1613; CHECK-NEXT: ret i1 [[CLASS]] 1614; 1615 %fneg = fneg float %arg 1616 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 96) 1617 ret i1 %class 1618} 1619 1620; -> subnormal 1621define i1 @test_class_fneg_subnormal(float %arg) { 1622; 1623; CHECK-LABEL: @test_class_fneg_subnormal( 1624; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 144) 1625; CHECK-NEXT: ret i1 [[CLASS]] 1626; 1627 %fneg = fneg float %arg 1628 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 144) 1629 ret i1 %class 1630} 1631 1632; -> normal|pinf 1633define i1 @test_class_fneg_normal_neginf(float %arg) { 1634; CHECK-LABEL: @test_class_fneg_normal_neginf( 1635; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 776) 1636; CHECK-NEXT: ret i1 [[CLASS]] 1637; 1638 %fneg = fneg float %arg 1639 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 268) 1640 ret i1 %class 1641} 1642 1643; -> normal|ninf 1644define i1 @test_class_fneg_normal_pinf(float %arg) { 1645; CHECK-LABEL: @test_class_fneg_normal_pinf( 1646; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 268) 1647; CHECK-NEXT: ret i1 [[CLASS]] 1648; 1649 %fneg = fneg float %arg 1650 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 776) 1651 ret i1 %class 1652} 1653 1654; -> pinf|nnormal|pnormal|nzero 1655define i1 @test_class_fneg_neginf_posnormal_negsubnormal_poszero(float %arg) { 1656; CHECK-LABEL: @test_class_fneg_neginf_posnormal_negsubnormal_poszero( 1657; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 680) 1658; CHECK-NEXT: ret i1 [[CLASS]] 1659; 1660 %fneg = fneg float %arg 1661 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 340) 1662 ret i1 %class 1663} 1664 1665; -> pinf|nnormal|psubnormal|negzero|snan 1666define i1 @test_class_fneg_neginf_posnormal_negsubnormal_poszero_snan(float %arg) { 1667; CHECK-LABEL: @test_class_fneg_neginf_posnormal_negsubnormal_poszero_snan( 1668; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 681) 1669; CHECK-NEXT: ret i1 [[CLASS]] 1670; 1671 %fneg = fneg float %arg 1672 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 341) 1673 ret i1 %class 1674} 1675 1676; pinf|negnormal|psubnormal|negzero|qnan 1677define i1 @test_class_fneg_neginf_posnormal_negsubnormal_poszero_qnan(float %arg) { 1678; CHECK-LABEL: @test_class_fneg_neginf_posnormal_negsubnormal_poszero_qnan( 1679; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 682) 1680; CHECK-NEXT: ret i1 [[CLASS]] 1681; 1682 %fneg = fneg float %arg 1683 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 342) 1684 ret i1 %class 1685} 1686 1687; -> pinf | nnormal|psubnormal|nzero|nan 1688define i1 @test_class_fneg_neginf_posnormal_negsubnormal_poszero_nan(float %arg) { 1689; CHECK-LABEL: @test_class_fneg_neginf_posnormal_negsubnormal_poszero_nan( 1690; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 683) 1691; CHECK-NEXT: ret i1 [[CLASS]] 1692; 1693 %fneg = fneg float %arg 1694 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 343) 1695 ret i1 %class 1696} 1697 1698; -> ninf|pnormal|negsubnormal|pzero 1699define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero(float %arg) { 1700; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero( 1701; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 340) 1702; CHECK-NEXT: ret i1 [[CLASS]] 1703; 1704 %fneg = fneg float %arg 1705 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 680) 1706 ret i1 %class 1707} 1708 1709; -> ninf|pnormal|negsubnormal|pzero|snan 1710define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan(float %arg) { 1711; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan( 1712; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) 1713; CHECK-NEXT: ret i1 [[CLASS]] 1714; 1715 %fneg = fneg float %arg 1716 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 681) 1717 ret i1 %class 1718} 1719 1720; -> ninf|pnormal|negsubnormal|pzero|qnan 1721define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_qnan(float %arg) { 1722; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_qnan( 1723; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 342) 1724; CHECK-NEXT: ret i1 [[CLASS]] 1725; 1726 %fneg = fneg float %arg 1727 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 682) 1728 ret i1 %class 1729} 1730 1731; -> ninf|pnormal|negsubnormal|pzero 1732define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan(float %arg) { 1733; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan( 1734; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 343) 1735; CHECK-NEXT: ret i1 [[CLASS]] 1736; 1737 %fneg = fneg float %arg 1738 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 683) 1739 ret i1 %class 1740} 1741 1742; strictfp doesn't matter 1743; -> ninf|pnormal|negsubnormal|pzero|snan 1744define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { 1745; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp( 1746; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR0]] 1747; CHECK-NEXT: ret i1 [[CLASS]] 1748; 1749 %fneg = fneg float %arg 1750 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 681) strictfp 1751 ret i1 %class 1752} 1753 1754; multiple uses don't matter 1755define i1 @test_class_fneg_multiple_use_fneg(float %arg, ptr %ptr) { 1756; CHECK-LABEL: @test_class_fneg_multiple_use_fneg( 1757; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[ARG:%.*]] 1758; CHECK-NEXT: store float [[FNEG]], ptr [[PTR:%.*]], align 4 1759; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG]], i32 342) 1760; CHECK-NEXT: ret i1 [[CLASS]] 1761; 1762 %fneg = fneg float %arg 1763 store float %fneg, ptr %ptr 1764 %class = call i1 @llvm.is.fpclass.f32(float %fneg, i32 682) 1765 ret i1 %class 1766} 1767 1768define <2 x i1> @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan_vector(<2 x float> %arg) { 1769; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan_vector( 1770; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[ARG:%.*]], i32 343) 1771; CHECK-NEXT: ret <2 x i1> [[CLASS]] 1772; 1773 %fneg = fneg <2 x float> %arg 1774 %class = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %fneg, i32 683) 1775 ret <2 x i1> %class 1776} 1777 1778; --------------------------------------------------------------------- 1779; fabs folds 1780; --------------------------------------------------------------------- 1781 1782; -> false 1783define i1 @test_class_fabs_none(float %arg) { 1784; CHECK-LABEL: @test_class_fabs_none( 1785; CHECK-NEXT: ret i1 false 1786; 1787 %fabs = call float @llvm.fabs.f32(float %arg) 1788 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 0) 1789 ret i1 %class 1790} 1791 1792; -> true 1793define i1 @test_class_fabs_all(float %arg) { 1794; CHECK-LABEL: @test_class_fabs_all( 1795; CHECK-NEXT: ret i1 true 1796; 1797 %fabs = call float @llvm.fabs.f32(float %arg) 1798 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 1023) 1799 ret i1 %class 1800} 1801 1802; -> snan 1803define i1 @test_class_fabs_snan(float %arg) { 1804; CHECK-LABEL: @test_class_fabs_snan( 1805; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1) 1806; CHECK-NEXT: ret i1 [[CLASS]] 1807; 1808 %fabs = call float @llvm.fabs.f32(float %arg) 1809 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 1) 1810 ret i1 %class 1811} 1812 1813; -> qnan 1814define i1 @test_class_fabs_qnan(float %arg) { 1815; CHECK-LABEL: @test_class_fabs_qnan( 1816; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 2) 1817; CHECK-NEXT: ret i1 [[CLASS]] 1818; 1819 %fabs = call float @llvm.fabs.f32(float %arg) 1820 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 2) 1821 ret i1 %class 1822} 1823 1824; -> false 1825define i1 @test_class_fabs_neginf(float %arg) { 1826; CHECK-LABEL: @test_class_fabs_neginf( 1827; CHECK-NEXT: ret i1 false 1828; 1829 %fabs = call float @llvm.fabs.f32(float %arg) 1830 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 4) 1831 ret i1 %class 1832} 1833 1834; -> false 1835define i1 @test_class_fabs_negnormal(float %arg) { 1836; CHECK-LABEL: @test_class_fabs_negnormal( 1837; CHECK-NEXT: ret i1 false 1838; 1839 %fabs = call float @llvm.fabs.f32(float %arg) 1840 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 8) 1841 ret i1 %class 1842} 1843 1844; -> false 1845define i1 @test_class_fabs_negsubnormal(float %arg) { 1846; CHECK-LABEL: @test_class_fabs_negsubnormal( 1847; CHECK-NEXT: ret i1 false 1848; 1849 %fabs = call float @llvm.fabs.f32(float %arg) 1850 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 16) 1851 ret i1 %class 1852} 1853 1854; -> false 1855define i1 @test_class_fabs_negzero(float %arg) { 1856; CHECK-LABEL: @test_class_fabs_negzero( 1857; CHECK-NEXT: ret i1 false 1858; 1859 %fabs = call float @llvm.fabs.f32(float %arg) 1860 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 32) 1861 ret i1 %class 1862} 1863 1864; -> poszero 1865define i1 @test_class_fabs_poszero(float %arg) { 1866; CHECK-LABEL: @test_class_fabs_poszero( 1867; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 1868; CHECK-NEXT: ret i1 [[CLASS]] 1869; 1870 %fabs = call float @llvm.fabs.f32(float %arg) 1871 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 64) 1872 ret i1 %class 1873} 1874 1875; -> possubnormal 1876define i1 @test_class_fabs_possubnormal(float %arg) { 1877; CHECK-LABEL: @test_class_fabs_possubnormal( 1878; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 144) 1879; CHECK-NEXT: ret i1 [[CLASS]] 1880; 1881 %fabs = call float @llvm.fabs.f32(float %arg) 1882 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 128) 1883 ret i1 %class 1884} 1885 1886; -> posnormal 1887define i1 @test_class_fabs_posnormal(float %arg) { 1888; CHECK-LABEL: @test_class_fabs_posnormal( 1889; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 1890; CHECK-NEXT: ret i1 [[CLASS]] 1891; 1892 %fabs = call float @llvm.fabs.f32(float %arg) 1893 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 256) 1894 ret i1 %class 1895} 1896 1897; -> posinf 1898define i1 @test_class_fabs_posinf(float %arg) { 1899; CHECK-LABEL: @test_class_fabs_posinf( 1900; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 1901; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 1902; CHECK-NEXT: ret i1 [[CLASS]] 1903; 1904 %fabs = call float @llvm.fabs.f32(float %arg) 1905 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 512) 1906 ret i1 %class 1907} 1908 1909; -> qnan|snan 1910define i1 @test_class_fabs_isnan(float %arg) { 1911; CHECK-LABEL: @test_class_fabs_isnan( 1912; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[ARG:%.*]], 0.000000e+00 1913; CHECK-NEXT: ret i1 [[CLASS]] 1914; 1915 %fabs = call float @llvm.fabs.f32(float %arg) 1916 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 3) 1917 ret i1 %class 1918} 1919 1920; -> fcPositive 1921define i1 @test_class_fabs_nnan(float %arg) { 1922; CHECK-LABEL: @test_class_fabs_nnan( 1923; CHECK-NEXT: [[CLASS:%.*]] = fcmp ord float [[ARG:%.*]], 0.000000e+00 1924; CHECK-NEXT: ret i1 [[CLASS]] 1925; 1926 %fabs = call float @llvm.fabs.f32(float %arg) 1927 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 1020) 1928 ret i1 %class 1929} 1930 1931; -> posnormal 1932define i1 @test_class_fabs_normal(float %arg) { 1933; CHECK-LABEL: @test_class_fabs_normal( 1934; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 1935; CHECK-NEXT: ret i1 [[CLASS]] 1936; 1937 %fabs = call float @llvm.fabs.f32(float %arg) 1938 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 264) 1939 ret i1 %class 1940} 1941 1942; -> poszero 1943define i1 @test_class_fabs_zero(float %arg) { 1944; CHECK-LABEL: @test_class_fabs_zero( 1945; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 1946; CHECK-NEXT: ret i1 [[CLASS]] 1947; 1948 %fabs = call float @llvm.fabs.f32(float %arg) 1949 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 96) 1950 ret i1 %class 1951} 1952 1953; -> possubnormal 1954define i1 @test_class_fabs_subnormal(float %arg) { 1955; CHECK-LABEL: @test_class_fabs_subnormal( 1956; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 144) 1957; CHECK-NEXT: ret i1 [[CLASS]] 1958; 1959 %fabs = call float @llvm.fabs.f32(float %arg) 1960 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 144) 1961 ret i1 %class 1962} 1963 1964; -> posnormal 1965define i1 @test_class_fabs_normal_neginf(float %arg) { 1966; CHECK-LABEL: @test_class_fabs_normal_neginf( 1967; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 1968; CHECK-NEXT: ret i1 [[CLASS]] 1969; 1970 %fabs = call float @llvm.fabs.f32(float %arg) 1971 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 268) 1972 ret i1 %class 1973} 1974 1975; -> pnormal|pinf 1976define i1 @test_class_fabs_normal_pinf(float %arg) { 1977; CHECK-LABEL: @test_class_fabs_normal_pinf( 1978; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 780) 1979; CHECK-NEXT: ret i1 [[CLASS]] 1980; 1981 %fabs = call float @llvm.fabs.f32(float %arg) 1982 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 776) 1983 ret i1 %class 1984} 1985 1986; -> pnormal|pzero 1987define i1 @test_class_fabs_neginf_posnormal_negsubnormal_poszero(float %arg) { 1988; CHECK-LABEL: @test_class_fabs_neginf_posnormal_negsubnormal_poszero( 1989; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 360) 1990; CHECK-NEXT: ret i1 [[CLASS]] 1991; 1992 %fabs = call float @llvm.fabs.f32(float %arg) 1993 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 340) 1994 ret i1 %class 1995} 1996 1997; -> pnormal|pzero|snan 1998define i1 @test_class_fabs_neginf_posnormal_negsubnormal_poszero_snan(float %arg) { 1999; CHECK-LABEL: @test_class_fabs_neginf_posnormal_negsubnormal_poszero_snan( 2000; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) 2001; CHECK-NEXT: ret i1 [[CLASS]] 2002; 2003 %fabs = call float @llvm.fabs.f32(float %arg) 2004 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 341) 2005 ret i1 %class 2006} 2007 2008; -> negnormal|pzero|qnan 2009define i1 @test_class_fabs_neginf_posnormal_negsubnormal_poszero_qnan(float %arg) { 2010; CHECK-LABEL: @test_class_fabs_neginf_posnormal_negsubnormal_poszero_qnan( 2011; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 362) 2012; CHECK-NEXT: ret i1 [[CLASS]] 2013; 2014 %fabs = call float @llvm.fabs.f32(float %arg) 2015 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 342) 2016 ret i1 %class 2017} 2018 2019; -> pnormal|pzero|nan 2020define i1 @test_class_fabs_neginf_posnormal_negsubnormal_poszero_nan(float %arg) { 2021; CHECK-LABEL: @test_class_fabs_neginf_posnormal_negsubnormal_poszero_nan( 2022; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 363) 2023; CHECK-NEXT: ret i1 [[CLASS]] 2024; 2025 %fabs = call float @llvm.fabs.f32(float %arg) 2026 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 343) 2027 ret i1 %class 2028} 2029 2030; -> ninf|pnormal|negsubnormal|pzero 2031define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero(float %arg) { 2032; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero( 2033; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 660) 2034; CHECK-NEXT: ret i1 [[CLASS]] 2035; 2036 %fabs = call float @llvm.fabs.f32(float %arg) 2037 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 680) 2038 ret i1 %class 2039} 2040 2041; -> pinf|psubnormal|snan 2042define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan(float %arg) { 2043; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan( 2044; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) 2045; CHECK-NEXT: ret i1 [[CLASS]] 2046; 2047 %fabs = call float @llvm.fabs.f32(float %arg) 2048 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 681) 2049 ret i1 %class 2050} 2051 2052; -> pinf|psubnormal|qnan 2053define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_qnan(float %arg) { 2054; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_qnan( 2055; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 662) 2056; CHECK-NEXT: ret i1 [[CLASS]] 2057; 2058 %fabs = call float @llvm.fabs.f32(float %arg) 2059 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 682) 2060 ret i1 %class 2061} 2062 2063; -> pinf|psubnormal|nan 2064define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan(float %arg) { 2065; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan( 2066; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 663) 2067; CHECK-NEXT: ret i1 [[CLASS]] 2068; 2069 %fabs = call float @llvm.fabs.f32(float %arg) 2070 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 683) 2071 ret i1 %class 2072} 2073 2074; strictfp doesn't matter 2075; -> pinf|psubnormal|snan 2076define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { 2077; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( 2078; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR0]] 2079; CHECK-NEXT: ret i1 [[CLASS]] 2080; 2081 %fabs = call float @llvm.fabs.f32(float %arg) strictfp 2082 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 681) strictfp 2083 ret i1 %class 2084} 2085 2086; multiple uses don't matter 2087define i1 @test_class_fabs_multiple_use_fabs(float %arg, ptr %ptr) { 2088; CHECK-LABEL: @test_class_fabs_multiple_use_fabs( 2089; CHECK-NEXT: [[FABS:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2090; CHECK-NEXT: store float [[FABS]], ptr [[PTR:%.*]], align 4 2091; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG]], i32 662) 2092; CHECK-NEXT: ret i1 [[CLASS]] 2093; 2094 %fabs = call float @llvm.fabs.f32(float %arg) 2095 store float %fabs, ptr %ptr 2096 %class = call i1 @llvm.is.fpclass.f32(float %fabs, i32 682) 2097 ret i1 %class 2098} 2099 2100define <2 x i1> @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan_vector(<2 x float> %arg) { 2101; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan_vector( 2102; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[ARG:%.*]], i32 663) 2103; CHECK-NEXT: ret <2 x i1> [[CLASS]] 2104; 2105 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %arg) 2106 %class = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %fabs, i32 683) 2107 ret <2 x i1> %class 2108} 2109 2110; --------------------------------------------------------------------- 2111; fneg (fabs) folds 2112; --------------------------------------------------------------------- 2113 2114define i1 @test_class_fneg_fabs_none(float %arg) { 2115; CHECK-LABEL: @test_class_fneg_fabs_none( 2116; CHECK-NEXT: ret i1 false 2117; 2118 %fabs = call float @llvm.fabs.f32(float %arg) 2119 %fneg.fabs = fneg float %fabs 2120 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 0) 2121 ret i1 %class 2122} 2123 2124define i1 @test_class_fneg_fabs_all(float %arg) { 2125; CHECK-LABEL: @test_class_fneg_fabs_all( 2126; CHECK-NEXT: ret i1 true 2127; 2128 %fabs = call float @llvm.fabs.f32(float %arg) 2129 %fneg.fabs = fneg float %fabs 2130 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 1023) 2131 ret i1 %class 2132} 2133 2134define i1 @test_class_fneg_fabs_snan(float %arg) { 2135; CHECK-LABEL: @test_class_fneg_fabs_snan( 2136; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1) 2137; CHECK-NEXT: ret i1 [[CLASS]] 2138; 2139 %fabs = call float @llvm.fabs.f32(float %arg) 2140 %fneg.fabs = fneg float %fabs 2141 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 1) 2142 ret i1 %class 2143} 2144 2145define i1 @test_class_fneg_fabs_qnan(float %arg) { 2146; CHECK-LABEL: @test_class_fneg_fabs_qnan( 2147; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 2) 2148; CHECK-NEXT: ret i1 [[CLASS]] 2149; 2150 %fabs = call float @llvm.fabs.f32(float %arg) 2151 %fneg.fabs = fneg float %fabs 2152 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 2) 2153 ret i1 %class 2154} 2155 2156define i1 @test_class_fneg_fabs_neginf(float %arg) { 2157; CHECK-LABEL: @test_class_fneg_fabs_neginf( 2158; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2159; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 2160; CHECK-NEXT: ret i1 [[CLASS]] 2161; 2162 %fabs = call float @llvm.fabs.f32(float %arg) 2163 %fneg.fabs = fneg float %fabs 2164 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 4) 2165 ret i1 %class 2166} 2167 2168define i1 @test_class_fneg_fabs_negnormal(float %arg) { 2169; CHECK-LABEL: @test_class_fneg_fabs_negnormal( 2170; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 2171; CHECK-NEXT: ret i1 [[CLASS]] 2172; 2173 %fabs = call float @llvm.fabs.f32(float %arg) 2174 %fneg.fabs = fneg float %fabs 2175 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 8) 2176 ret i1 %class 2177} 2178 2179define i1 @test_class_fneg_fabs_negsubnormal(float %arg) { 2180; CHECK-LABEL: @test_class_fneg_fabs_negsubnormal( 2181; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 144) 2182; CHECK-NEXT: ret i1 [[CLASS]] 2183; 2184 %fabs = call float @llvm.fabs.f32(float %arg) 2185 %fneg.fabs = fneg float %fabs 2186 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 16) 2187 ret i1 %class 2188} 2189 2190define i1 @test_class_fneg_fabs_negzero(float %arg) { 2191; CHECK-LABEL: @test_class_fneg_fabs_negzero( 2192; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 2193; CHECK-NEXT: ret i1 [[CLASS]] 2194; 2195 %fabs = call float @llvm.fabs.f32(float %arg) 2196 %fneg.fabs = fneg float %fabs 2197 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 32) 2198 ret i1 %class 2199} 2200 2201define i1 @test_class_fneg_fabs_poszero(float %arg) { 2202; CHECK-LABEL: @test_class_fneg_fabs_poszero( 2203; CHECK-NEXT: ret i1 false 2204; 2205 %fabs = call float @llvm.fabs.f32(float %arg) 2206 %fneg.fabs = fneg float %fabs 2207 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 64) 2208 ret i1 %class 2209} 2210 2211define i1 @test_class_fneg_fabs_possubnormal(float %arg) { 2212; CHECK-LABEL: @test_class_fneg_fabs_possubnormal( 2213; CHECK-NEXT: ret i1 false 2214; 2215 %fabs = call float @llvm.fabs.f32(float %arg) 2216 %fneg.fabs = fneg float %fabs 2217 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 128) 2218 ret i1 %class 2219} 2220 2221define i1 @test_class_fneg_fabs_posnormal(float %arg) { 2222; CHECK-LABEL: @test_class_fneg_fabs_posnormal( 2223; CHECK-NEXT: ret i1 false 2224; 2225 %fabs = call float @llvm.fabs.f32(float %arg) 2226 %fneg.fabs = fneg float %fabs 2227 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 256) 2228 ret i1 %class 2229} 2230 2231define i1 @test_class_fneg_fabs_posinf(float %arg) { 2232; CHECK-LABEL: @test_class_fneg_fabs_posinf( 2233; CHECK-NEXT: ret i1 false 2234; 2235 %fabs = call float @llvm.fabs.f32(float %arg) 2236 %fneg.fabs = fneg float %fabs 2237 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 512) 2238 ret i1 %class 2239} 2240 2241define i1 @test_class_fneg_fabs_isnan(float %arg) { 2242; CHECK-LABEL: @test_class_fneg_fabs_isnan( 2243; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[ARG:%.*]], 0.000000e+00 2244; CHECK-NEXT: ret i1 [[CLASS]] 2245; 2246 %fabs = call float @llvm.fabs.f32(float %arg) 2247 %fneg.fabs = fneg float %fabs 2248 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 3) 2249 ret i1 %class 2250} 2251 2252define i1 @test_class_fneg_fabs_nnan(float %arg) { 2253; CHECK-LABEL: @test_class_fneg_fabs_nnan( 2254; CHECK-NEXT: [[CLASS:%.*]] = fcmp ord float [[ARG:%.*]], 0.000000e+00 2255; CHECK-NEXT: ret i1 [[CLASS]] 2256; 2257 %fabs = call float @llvm.fabs.f32(float %arg) 2258 %fneg.fabs = fneg float %fabs 2259 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 1020) 2260 ret i1 %class 2261} 2262 2263define i1 @test_class_fneg_fabs_normal(float %arg) { 2264; CHECK-LABEL: @test_class_fneg_fabs_normal( 2265; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 2266; CHECK-NEXT: ret i1 [[CLASS]] 2267; 2268 %fabs = call float @llvm.fabs.f32(float %arg) 2269 %fneg.fabs = fneg float %fabs 2270 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 264) 2271 ret i1 %class 2272} 2273 2274define i1 @test_class_fneg_fabs_zero(float %arg) { 2275; CHECK-LABEL: @test_class_fneg_fabs_zero( 2276; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 2277; CHECK-NEXT: ret i1 [[CLASS]] 2278; 2279 %fabs = call float @llvm.fabs.f32(float %arg) 2280 %fneg.fabs = fneg float %fabs 2281 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 96) 2282 ret i1 %class 2283} 2284 2285define i1 @test_class_fneg_fabs_subnormal(float %arg) { 2286; CHECK-LABEL: @test_class_fneg_fabs_subnormal( 2287; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 144) 2288; CHECK-NEXT: ret i1 [[CLASS]] 2289; 2290 %fabs = call float @llvm.fabs.f32(float %arg) 2291 %fneg.fabs = fneg float %fabs 2292 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 144) 2293 ret i1 %class 2294} 2295 2296define i1 @test_class_fneg_fabs_normal_neginf(float %arg) { 2297; CHECK-LABEL: @test_class_fneg_fabs_normal_neginf( 2298; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 780) 2299; CHECK-NEXT: ret i1 [[CLASS]] 2300; 2301 %fabs = call float @llvm.fabs.f32(float %arg) 2302 %fneg.fabs = fneg float %fabs 2303 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 268) 2304 ret i1 %class 2305} 2306 2307define i1 @test_class_fneg_fabs_normal_pinf(float %arg) { 2308; CHECK-LABEL: @test_class_fneg_fabs_normal_pinf( 2309; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 2310; CHECK-NEXT: ret i1 [[CLASS]] 2311; 2312 %fabs = call float @llvm.fabs.f32(float %arg) 2313 %fneg.fabs = fneg float %fabs 2314 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 776) 2315 ret i1 %class 2316} 2317 2318define i1 @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero(float %arg) { 2319; CHECK-LABEL: @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero( 2320; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 660) 2321; CHECK-NEXT: ret i1 [[CLASS]] 2322; 2323 %fabs = call float @llvm.fabs.f32(float %arg) 2324 %fneg.fabs = fneg float %fabs 2325 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 340) 2326 ret i1 %class 2327} 2328 2329define i1 @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_snan(float %arg) { 2330; CHECK-LABEL: @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_snan( 2331; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) 2332; CHECK-NEXT: ret i1 [[CLASS]] 2333; 2334 %fabs = call float @llvm.fabs.f32(float %arg) 2335 %fneg.fabs = fneg float %fabs 2336 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 341) 2337 ret i1 %class 2338} 2339 2340define i1 @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_qnan(float %arg) { 2341; CHECK-LABEL: @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_qnan( 2342; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 662) 2343; CHECK-NEXT: ret i1 [[CLASS]] 2344; 2345 %fabs = call float @llvm.fabs.f32(float %arg) 2346 %fneg.fabs = fneg float %fabs 2347 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 342) 2348 ret i1 %class 2349} 2350 2351define i1 @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_nan(float %arg) { 2352; CHECK-LABEL: @test_class_fneg_fabs_neginf_posnormal_negsubnormal_poszero_nan( 2353; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 663) 2354; CHECK-NEXT: ret i1 [[CLASS]] 2355; 2356 %fabs = call float @llvm.fabs.f32(float %arg) 2357 %fneg.fabs = fneg float %fabs 2358 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 343) 2359 ret i1 %class 2360} 2361 2362define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero(float %arg) { 2363; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero( 2364; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 360) 2365; CHECK-NEXT: ret i1 [[CLASS]] 2366; 2367 %fabs = call float @llvm.fabs.f32(float %arg) 2368 %fneg.fabs = fneg float %fabs 2369 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 680) 2370 ret i1 %class 2371} 2372 2373define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan(float %arg) { 2374; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan( 2375; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) 2376; CHECK-NEXT: ret i1 [[CLASS]] 2377; 2378 %fabs = call float @llvm.fabs.f32(float %arg) 2379 %fneg.fabs = fneg float %fabs 2380 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 681) 2381 ret i1 %class 2382} 2383 2384define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_qnan(float %arg) { 2385; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_qnan( 2386; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 362) 2387; CHECK-NEXT: ret i1 [[CLASS]] 2388; 2389 %fabs = call float @llvm.fabs.f32(float %arg) 2390 %fneg.fabs = fneg float %fabs 2391 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 682) 2392 ret i1 %class 2393} 2394 2395define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan(float %arg) { 2396; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan( 2397; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 363) 2398; CHECK-NEXT: ret i1 [[CLASS]] 2399; 2400 %fabs = call float @llvm.fabs.f32(float %arg) 2401 %fneg.fabs = fneg float %fabs 2402 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 683) 2403 ret i1 %class 2404} 2405 2406; strictfp doesn't matter 2407define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { 2408; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( 2409; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR0]] 2410; CHECK-NEXT: ret i1 [[CLASS]] 2411; 2412 %fabs = call float @llvm.fabs.f32(float %arg) strictfp 2413 %fneg.fabs = fneg float %fabs 2414 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 681) strictfp 2415 ret i1 %class 2416} 2417 2418; multiple uses don't matter 2419define i1 @test_class_fneg_fabs_multiple_use_fabs(float %arg, ptr %ptr) { 2420; CHECK-LABEL: @test_class_fneg_fabs_multiple_use_fabs( 2421; CHECK-NEXT: [[FABS:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2422; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] 2423; CHECK-NEXT: store float [[FNEG_FABS]], ptr [[PTR:%.*]], align 4 2424; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG]], i32 362) 2425; CHECK-NEXT: ret i1 [[CLASS]] 2426; 2427 %fabs = call float @llvm.fabs.f32(float %arg) 2428 %fneg.fabs = fneg float %fabs 2429 store float %fneg.fabs, ptr %ptr 2430 %class = call i1 @llvm.is.fpclass.f32(float %fneg.fabs, i32 682) 2431 ret i1 %class 2432} 2433 2434define <2 x i1> @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan_vector(<2 x float> %arg) { 2435; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan_vector( 2436; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[ARG:%.*]], i32 663) 2437; CHECK-NEXT: ret <2 x i1> [[CLASS]] 2438; 2439 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %arg) 2440 %fneg.fabs = fneg <2 x float> %fabs 2441 %class = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %fabs, i32 683) 2442 ret <2 x i1> %class 2443} 2444 2445define i1 @test_class_is_zero_nozero_src(float nofpclass(zero) %arg) { 2446; CHECK-LABEL: @test_class_is_zero_nozero_src( 2447; CHECK-NEXT: ret i1 false 2448; 2449 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 96) 2450 ret i1 %class 2451} 2452 2453define i1 @test_class_is_zero_noposzero_src(float nofpclass(pzero) %arg) { 2454; CHECK-LABEL: @test_class_is_zero_noposzero_src( 2455; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 2456; CHECK-NEXT: ret i1 [[CLASS]] 2457; 2458 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 96) 2459 ret i1 %class 2460} 2461 2462define i1 @test_class_is_zero_nonegzero_src(float nofpclass(nzero) %arg) { 2463; CHECK-LABEL: @test_class_is_zero_nonegzero_src( 2464; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0.000000e+00 2465; CHECK-NEXT: ret i1 [[CLASS]] 2466; 2467 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 96) 2468 ret i1 %class 2469} 2470 2471define i1 @test_class_is_pzero_nozero_src(float nofpclass(zero) %arg) { 2472; CHECK-LABEL: @test_class_is_pzero_nozero_src( 2473; CHECK-NEXT: ret i1 false 2474; 2475 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 64) 2476 ret i1 %class 2477} 2478 2479define i1 @test_class_is_pzero_nopzero_src(float nofpclass(pzero) %arg) { 2480; CHECK-LABEL: @test_class_is_pzero_nopzero_src( 2481; CHECK-NEXT: ret i1 false 2482; 2483 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 64) 2484 ret i1 %class 2485} 2486 2487define i1 @test_class_is_pzero_nonzero_src(float nofpclass(nzero) %arg) { 2488; CHECK-LABEL: @test_class_is_pzero_nonzero_src( 2489; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 64) 2490; CHECK-NEXT: ret i1 [[CLASS]] 2491; 2492 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 64) 2493 ret i1 %class 2494} 2495 2496define i1 @test_class_is_nzero_nozero_src(float nofpclass(zero) %arg) { 2497; CHECK-LABEL: @test_class_is_nzero_nozero_src( 2498; CHECK-NEXT: ret i1 false 2499; 2500 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 32) 2501 ret i1 %class 2502} 2503 2504define i1 @test_class_is_nzero_nopzero_src(float nofpclass(pzero) %arg) { 2505; CHECK-LABEL: @test_class_is_nzero_nopzero_src( 2506; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 32) 2507; CHECK-NEXT: ret i1 [[CLASS]] 2508; 2509 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 32) 2510 ret i1 %class 2511} 2512 2513define i1 @test_class_is_nzero_nonzero_src(float nofpclass(nzero) %arg) { 2514; CHECK-LABEL: @test_class_is_nzero_nonzero_src( 2515; CHECK-NEXT: ret i1 false 2516; 2517 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 32) 2518 ret i1 %class 2519} 2520 2521define i1 @test_class_is_normal_or_zero_nozero_src(float nofpclass(zero) %arg) { 2522; CHECK-LABEL: @test_class_is_normal_or_zero_nozero_src( 2523; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 264) 2524; CHECK-NEXT: ret i1 [[CLASS]] 2525; 2526 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 360) 2527 ret i1 %class 2528} 2529 2530define i1 @test_class_is_inf_or_nan_nozero_src(float nofpclass(zero) %arg) { 2531; CHECK-LABEL: @test_class_is_inf_or_nan_nozero_src( 2532; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2533; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 2534; CHECK-NEXT: ret i1 [[CLASS]] 2535; 2536 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) 2537 ret i1 %class 2538} 2539 2540define i1 @test_class_is_inf_or_nan_noinf_src(float nofpclass(inf) %arg) { 2541; CHECK-LABEL: @test_class_is_inf_or_nan_noinf_src( 2542; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2543; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 2544; CHECK-NEXT: ret i1 [[CLASS]] 2545; 2546 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) 2547 ret i1 %class 2548} 2549 2550define i1 @test_class_is_inf_or_nan_nonan_src(float nofpclass(nan) %arg) { 2551; CHECK-LABEL: @test_class_is_inf_or_nan_nonan_src( 2552; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) 2553; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 2554; CHECK-NEXT: ret i1 [[CLASS]] 2555; 2556 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) 2557 ret i1 %class 2558} 2559 2560define i1 @test_class_is_normal_or_subnormal_noinf_src(float nofpclass(inf) %arg) { 2561; CHECK-LABEL: @test_class_is_normal_or_subnormal_noinf_src( 2562; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 408) 2563; CHECK-NEXT: ret i1 [[CLASS]] 2564; 2565 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 408) 2566 ret i1 %class 2567} 2568 2569define i1 @test_class_is_neginf_or_nopinf_src(float nofpclass(pinf) %arg) { 2570; CHECK-LABEL: @test_class_is_neginf_or_nopinf_src( 2571; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0xFFF0000000000000 2572; CHECK-NEXT: ret i1 [[CLASS]] 2573; 2574 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 4) 2575 ret i1 %class 2576} 2577 2578define i1 @test_class_is_neginf_noninf_src(float nofpclass(ninf) %arg) { 2579; CHECK-LABEL: @test_class_is_neginf_noninf_src( 2580; CHECK-NEXT: ret i1 false 2581; 2582 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 4) 2583 ret i1 %class 2584} 2585 2586define i1 @test_class_is_neginf_noinf_src(float nofpclass(inf) %arg) { 2587; CHECK-LABEL: @test_class_is_neginf_noinf_src( 2588; CHECK-NEXT: ret i1 false 2589; 2590 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 4) 2591 ret i1 %class 2592} 2593 2594define i1 @test_class_is_posinf_noninf_src(float nofpclass(ninf) %arg) { 2595; CHECK-LABEL: @test_class_is_posinf_noninf_src( 2596; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0x7FF0000000000000 2597; CHECK-NEXT: ret i1 [[CLASS]] 2598; 2599 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 512) 2600 ret i1 %class 2601} 2602 2603define i1 @test_class_is_posinf_nopinf_src(float nofpclass(pinf) %arg) { 2604; CHECK-LABEL: @test_class_is_posinf_nopinf_src( 2605; CHECK-NEXT: ret i1 false 2606; 2607 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 512) 2608 ret i1 %class 2609} 2610 2611define i1 @test_class_is_posinf_noinf_src(float nofpclass(inf) %arg) { 2612; CHECK-LABEL: @test_class_is_posinf_noinf_src( 2613; CHECK-NEXT: ret i1 false 2614; 2615 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 512) 2616 ret i1 %class 2617} 2618 2619define i1 @test_class_is_subnormal_nosub_src(float nofpclass(sub) %arg) { 2620; CHECK-LABEL: @test_class_is_subnormal_nosub_src( 2621; CHECK-NEXT: ret i1 false 2622; 2623 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 144) 2624 ret i1 %class 2625} 2626 2627define i1 @test_class_is_subnormal_nonsub_src(float nofpclass(nsub) %arg) { 2628; CHECK-LABEL: @test_class_is_subnormal_nonsub_src( 2629; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 128) 2630; CHECK-NEXT: ret i1 [[CLASS]] 2631; 2632 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 144) 2633 ret i1 %class 2634} 2635 2636define i1 @test_class_is_not_subnormal_nosub_src(float nofpclass(sub) %arg) { 2637; CHECK-LABEL: @test_class_is_not_subnormal_nosub_src( 2638; CHECK-NEXT: ret i1 true 2639; 2640 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 879) 2641 ret i1 %class 2642} 2643 2644define i1 @test_class_is_not_negsubnormal_nosub_src(float nofpclass(sub) %arg) { 2645; CHECK-LABEL: @test_class_is_not_negsubnormal_nosub_src( 2646; CHECK-NEXT: ret i1 true 2647; 2648 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1007) 2649 ret i1 %class 2650} 2651 2652define i1 @test_class_is_not_negsubnormal_nonegsub_src(float nofpclass(nsub) %arg) { 2653; CHECK-LABEL: @test_class_is_not_negsubnormal_nonegsub_src( 2654; CHECK-NEXT: ret i1 true 2655; 2656 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1007) 2657 ret i1 %class 2658} 2659 2660define i1 @test_class_is_nnormal_nonorm_src(float nofpclass(norm) %arg) { 2661; CHECK-LABEL: @test_class_is_nnormal_nonorm_src( 2662; CHECK-NEXT: ret i1 false 2663; 2664 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 264) 2665 ret i1 %class 2666} 2667 2668define i1 @test_class_is_not_nnormal_nonorm_src(float nofpclass(norm) %arg) { 2669; CHECK-LABEL: @test_class_is_not_nnormal_nonorm_src( 2670; CHECK-NEXT: ret i1 true 2671; 2672 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 759) 2673 ret i1 %class 2674} 2675 2676define i1 @test_class_is_not_nnormal_onlynorm_src(float nofpclass(nan inf zero sub) %arg) { 2677; CHECK-LABEL: @test_class_is_not_nnormal_onlynorm_src( 2678; CHECK-NEXT: ret i1 false 2679; 2680 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 759) 2681 ret i1 %class 2682} 2683 2684define i1 @test_class_is_nnormal_onlynorm_src(float nofpclass(nan inf zero sub) %arg) { 2685; CHECK-LABEL: @test_class_is_nnormal_onlynorm_src( 2686; CHECK-NEXT: ret i1 true 2687; 2688 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 264) 2689 ret i1 %class 2690} 2691 2692; Make sure assume works 2693define i1 @test_class_is_normal_assume_normal(float %x) { 2694; CHECK-LABEL: @test_class_is_normal_assume_normal( 2695; CHECK-NEXT: [[ASSUMED_IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 264) 2696; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUMED_IS_NORMAL]]) 2697; CHECK-NEXT: ret i1 true 2698; 2699 %assumed.is.normal = call i1 @llvm.is.fpclass.f32(float %x, i32 264) 2700 call void @llvm.assume(i1 %assumed.is.normal) 2701 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 264) 2702 ret i1 %class 2703} 2704 2705define i1 @test_class_is_normal_assume_not_normal(float %x) { 2706; CHECK-LABEL: @test_class_is_normal_assume_not_normal( 2707; CHECK-NEXT: [[ASSUMED_IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 264) 2708; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUMED_IS_NORMAL]]) 2709; CHECK-NEXT: ret i1 false 2710; 2711 %assumed.is.normal = call i1 @llvm.is.fpclass.f32(float %x, i32 264) 2712 call void @llvm.assume(i1 %assumed.is.normal) 2713 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 759) 2714 ret i1 %class 2715} 2716 2717define i1 @test_class_is_nan_assume_ord(float %x) { 2718; CHECK-LABEL: @test_class_is_nan_assume_ord( 2719; CHECK-NEXT: [[ORD:%.*]] = fcmp ord float [[X:%.*]], 0.000000e+00 2720; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]]) 2721; CHECK-NEXT: ret i1 false 2722; 2723 %ord = fcmp ord float %x, 0.0 2724 call void @llvm.assume(i1 %ord) 2725 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 2726 ret i1 %class 2727} 2728 2729define i1 @test_class_is_nan_assume_uno(float %x) { 2730; CHECK-LABEL: @test_class_is_nan_assume_uno( 2731; CHECK-NEXT: [[ORD:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00 2732; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]]) 2733; CHECK-NEXT: ret i1 true 2734; 2735 %ord = fcmp uno float %x, 0.0 2736 call void @llvm.assume(i1 %ord) 2737 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 2738 ret i1 %class 2739} 2740 2741define i1 @test_class_is_nan_assume_not_eq_pinf(float %x) { 2742; CHECK-LABEL: @test_class_is_nan_assume_not_eq_pinf( 2743; CHECK-NEXT: [[ORD:%.*]] = fcmp oeq float [[X:%.*]], 0x7FF0000000000000 2744; CHECK-NEXT: call void @llvm.assume(i1 [[ORD]]) 2745; CHECK-NEXT: ret i1 false 2746; 2747 %ord = fcmp oeq float %x, 0x7FF0000000000000 2748 call void @llvm.assume(i1 %ord) 2749 %class = call i1 @llvm.is.fpclass.f32(float %x, i32 3) 2750 ret i1 %class 2751} 2752 2753 2754; -------------------------------------------------------------------- 2755; fcmp ogt/oge/olt/ole 0 ieee 2756; -------------------------------------------------------------------- 2757 2758define i1 @test_class_is_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 2759; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf__ieee( 2760; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 2761; CHECK-NEXT: ret i1 [[CLASS]] 2762; 2763 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 2764 ret i1 %class 2765} 2766 2767define i1 @test_class_is_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2768; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_snan__ieee( 2769; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 961) 2770; CHECK-NEXT: ret i1 [[CLASS]] 2771; 2772 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 961) 2773 ret i1 %class 2774} 2775 2776define i1 @test_class_is_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 2777; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_qnan__ieee( 2778; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 962) 2779; CHECK-NEXT: ret i1 [[CLASS]] 2780; 2781 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 962) 2782 ret i1 %class 2783} 2784 2785define i1 @test_class_is_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 2786; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_nan__ieee( 2787; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 963) 2788; CHECK-NEXT: ret i1 [[CLASS]] 2789; 2790 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 963) 2791 ret i1 %class 2792} 2793 2794define i1 @test_class_is_psub_pnorm_pinf__ieee(float %arg) #0 { 2795; CHECK-LABEL: @test_class_is_psub_pnorm_pinf__ieee( 2796; CHECK-NEXT: [[CLASS:%.*]] = fcmp ogt float [[ARG:%.*]], 0.000000e+00 2797; CHECK-NEXT: ret i1 [[CLASS]] 2798; 2799 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 896) 2800 ret i1 %class 2801} 2802 2803define i1 @test_class_is_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2804; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_snan__ieee( 2805; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 897) 2806; CHECK-NEXT: ret i1 [[CLASS]] 2807; 2808 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 897) 2809 ret i1 %class 2810} 2811 2812define i1 @test_class_is_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 2813; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_qnan__ieee( 2814; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 898) 2815; CHECK-NEXT: ret i1 [[CLASS]] 2816; 2817 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 898) 2818 ret i1 %class 2819} 2820 2821define i1 @test_class_is_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 2822; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_nan__ieee( 2823; CHECK-NEXT: [[CLASS:%.*]] = fcmp ugt float [[ARG:%.*]], 0.000000e+00 2824; CHECK-NEXT: ret i1 [[CLASS]] 2825; 2826 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 899) 2827 ret i1 %class 2828} 2829 2830define i1 @test_class_is_pnorm_pinf__ieee(float %arg) #0 { 2831; CHECK-LABEL: @test_class_is_pnorm_pinf__ieee( 2832; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 768) 2833; CHECK-NEXT: ret i1 [[CLASS]] 2834; 2835 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 768) 2836 ret i1 %class 2837} 2838 2839define i1 @test_class_is_pzero_pnorm_pinf__ieee(float %arg) #0 { 2840; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf__ieee( 2841; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 704) 2842; CHECK-NEXT: ret i1 [[CLASS]] 2843; 2844 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 704) 2845 ret i1 %class 2846} 2847 2848define i1 @test_class_is_pzero_pnorm_pinf_nan__ieee(float %arg) #0 { 2849; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf_nan__ieee( 2850; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 707) 2851; CHECK-NEXT: ret i1 [[CLASS]] 2852; 2853 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 707) 2854 ret i1 %class 2855} 2856 2857define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 2858; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf__ieee( 2859; CHECK-NEXT: [[CLASS:%.*]] = fcmp oge float [[ARG:%.*]], 0.000000e+00 2860; CHECK-NEXT: ret i1 [[CLASS]] 2861; 2862 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 992) 2863 ret i1 %class 2864} 2865 2866define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2867; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__ieee( 2868; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 993) 2869; CHECK-NEXT: ret i1 [[CLASS]] 2870; 2871 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 993) 2872 ret i1 %class 2873} 2874 2875define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 2876; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__ieee( 2877; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 994) 2878; CHECK-NEXT: ret i1 [[CLASS]] 2879; 2880 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 994) 2881 ret i1 %class 2882} 2883 2884define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 2885; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__ieee( 2886; CHECK-NEXT: [[CLASS:%.*]] = fcmp uge float [[ARG:%.*]], 0.000000e+00 2887; CHECK-NEXT: ret i1 [[CLASS]] 2888; 2889 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 995) 2890 ret i1 %class 2891} 2892 2893define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 2894; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__ieee( 2895; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1017) 2896; CHECK-NEXT: ret i1 [[CLASS]] 2897; 2898 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1017) 2899 ret i1 %class 2900} 2901 2902define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2903; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__ieee( 2904; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1009) 2905; CHECK-NEXT: ret i1 [[CLASS]] 2906; 2907 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1009) 2908 ret i1 %class 2909} 2910 2911define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 2912; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__ieee( 2913; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1010) 2914; CHECK-NEXT: ret i1 [[CLASS]] 2915; 2916 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1010) 2917 ret i1 %class 2918} 2919 2920define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 2921; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__ieee( 2922; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1011) 2923; CHECK-NEXT: ret i1 [[CLASS]] 2924; 2925 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1011) 2926 ret i1 %class 2927} 2928 2929define i1 @test_class_is_nzero_psub_pnorm_pinf__ieee(float %arg) #0 { 2930; CHECK-LABEL: @test_class_is_nzero_psub_pnorm_pinf__ieee( 2931; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 928) 2932; CHECK-NEXT: ret i1 [[CLASS]] 2933; 2934 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 928) 2935 ret i1 %class 2936} 2937 2938define i1 @test_class_is_nzero_nsub_pnorm_pinf__ieee(float %arg) #0 { 2939; CHECK-LABEL: @test_class_is_nzero_nsub_pnorm_pinf__ieee( 2940; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 816) 2941; CHECK-NEXT: ret i1 [[CLASS]] 2942; 2943 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 816) 2944 ret i1 %class 2945} 2946 2947 2948define i1 @test_class_is_not_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 2949; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf__ieee( 2950; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 63) 2951; CHECK-NEXT: ret i1 [[CLASS]] 2952; 2953 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 63) 2954 ret i1 %class 2955} 2956 2957define i1 @test_class_is_not_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2958; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_snan__ieee( 2959; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 62) 2960; CHECK-NEXT: ret i1 [[CLASS]] 2961; 2962 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 62) 2963 ret i1 %class 2964} 2965 2966define i1 @test_class_is_not_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 2967; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_qnan__ieee( 2968; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 61) 2969; CHECK-NEXT: ret i1 [[CLASS]] 2970; 2971 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 61) 2972 ret i1 %class 2973} 2974 2975define i1 @test_class_is_not_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 2976; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_nan__ieee( 2977; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 2978; CHECK-NEXT: ret i1 [[CLASS]] 2979; 2980 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 2981 ret i1 %class 2982} 2983 2984define i1 @test_class_is_not_psub_pnorm_pinf__ieee(float %arg) #0 { 2985; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf__ieee( 2986; CHECK-NEXT: [[CLASS:%.*]] = fcmp ule float [[ARG:%.*]], 0.000000e+00 2987; CHECK-NEXT: ret i1 [[CLASS]] 2988; 2989 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 127) 2990 ret i1 %class 2991} 2992 2993define i1 @test_class_is_not_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 2994; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_snan__ieee( 2995; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 126) 2996; CHECK-NEXT: ret i1 [[CLASS]] 2997; 2998 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 126) 2999 ret i1 %class 3000} 3001 3002define i1 @test_class_is_not_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 3003; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_qnan__ieee( 3004; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 125) 3005; CHECK-NEXT: ret i1 [[CLASS]] 3006; 3007 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 125) 3008 ret i1 %class 3009} 3010 3011define i1 @test_class_is_not_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 3012; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_nan__ieee( 3013; CHECK-NEXT: [[CLASS:%.*]] = fcmp ole float [[ARG:%.*]], 0.000000e+00 3014; CHECK-NEXT: ret i1 [[CLASS]] 3015; 3016 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 124) 3017 ret i1 %class 3018} 3019 3020define i1 @test_class_is_not_pnorm_pinf__ieee(float %arg) #0 { 3021; CHECK-LABEL: @test_class_is_not_pnorm_pinf__ieee( 3022; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 255) 3023; CHECK-NEXT: ret i1 [[CLASS]] 3024; 3025 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 255) 3026 ret i1 %class 3027} 3028 3029define i1 @test_class_is_not_pzero_pnorm_pinf__ieee(float %arg) #0 { 3030; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf__ieee( 3031; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 319) 3032; CHECK-NEXT: ret i1 [[CLASS]] 3033; 3034 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 319) 3035 ret i1 %class 3036} 3037 3038define i1 @test_class_is_not_pzero_pnorm_pinf_nan__ieee(float %arg) #0 { 3039; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf_nan__ieee( 3040; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 316) 3041; CHECK-NEXT: ret i1 [[CLASS]] 3042; 3043 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 316) 3044 ret i1 %class 3045} 3046 3047define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 3048; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf__ieee( 3049; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 22) 3050; CHECK-NEXT: ret i1 [[CLASS]] 3051; 3052 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 22) 3053 ret i1 %class 3054} 3055 3056define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 3057; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__ieee( 3058; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 30) 3059; CHECK-NEXT: ret i1 [[CLASS]] 3060; 3061 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 30) 3062 ret i1 %class 3063} 3064 3065define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 3066; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__ieee( 3067; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 29) 3068; CHECK-NEXT: ret i1 [[CLASS]] 3069; 3070 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 29) 3071 ret i1 %class 3072} 3073 3074define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 3075; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__ieee( 3076; CHECK-NEXT: [[CLASS:%.*]] = fcmp olt float [[ARG:%.*]], 0.000000e+00 3077; CHECK-NEXT: ret i1 [[CLASS]] 3078; 3079 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 28) 3080 ret i1 %class 3081} 3082 3083define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__ieee(float %arg) #0 { 3084; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__ieee( 3085; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 6) 3086; CHECK-NEXT: ret i1 [[CLASS]] 3087; 3088 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 6) 3089 ret i1 %class 3090} 3091 3092define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__ieee(float %arg) #0 { 3093; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__ieee( 3094; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 14) 3095; CHECK-NEXT: ret i1 [[CLASS]] 3096; 3097 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 14) 3098 ret i1 %class 3099} 3100 3101define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__ieee(float %arg) #0 { 3102; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__ieee( 3103; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 13) 3104; CHECK-NEXT: ret i1 [[CLASS]] 3105; 3106 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 13) 3107 ret i1 %class 3108} 3109 3110define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__ieee(float %arg) #0 { 3111; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__ieee( 3112; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 12) 3113; CHECK-NEXT: ret i1 [[CLASS]] 3114; 3115 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 12) 3116 ret i1 %class 3117} 3118 3119define i1 @test_class_is_not_nzero_psub_pnorm_pinf__ieee(float %arg) #0 { 3120; CHECK-LABEL: @test_class_is_not_nzero_psub_pnorm_pinf__ieee( 3121; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 95) 3122; CHECK-NEXT: ret i1 [[CLASS]] 3123; 3124 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 95) 3125 ret i1 %class 3126} 3127 3128define i1 @test_class_is_not_nzero_nsub_pnorm_pinf__ieee(float %arg) #0 { 3129; CHECK-LABEL: @test_class_is_not_nzero_nsub_pnorm_pinf__ieee( 3130; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 207) 3131; CHECK-NEXT: ret i1 [[CLASS]] 3132; 3133 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 207) 3134 ret i1 %class 3135} 3136 3137; -------------------------------------------------------------------- 3138; fcmp ogt/oge/olt/ole 0 daz 3139; -------------------------------------------------------------------- 3140 3141define i1 @test_class_is_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3142; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf__daz( 3143; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 3144; CHECK-NEXT: ret i1 [[CLASS]] 3145; 3146 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 3147 ret i1 %class 3148} 3149 3150define i1 @test_class_is_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3151; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_snan__daz( 3152; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 961) 3153; CHECK-NEXT: ret i1 [[CLASS]] 3154; 3155 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 961) 3156 ret i1 %class 3157} 3158 3159define i1 @test_class_is_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3160; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_qnan__daz( 3161; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 962) 3162; CHECK-NEXT: ret i1 [[CLASS]] 3163; 3164 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 962) 3165 ret i1 %class 3166} 3167 3168define i1 @test_class_is_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3169; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_nan__daz( 3170; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 963) 3171; CHECK-NEXT: ret i1 [[CLASS]] 3172; 3173 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 963) 3174 ret i1 %class 3175} 3176 3177define i1 @test_class_is_psub_pnorm_pinf__daz(float %arg) #1 { 3178; CHECK-LABEL: @test_class_is_psub_pnorm_pinf__daz( 3179; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 896) 3180; CHECK-NEXT: ret i1 [[CLASS]] 3181; 3182 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 896) 3183 ret i1 %class 3184} 3185 3186define i1 @test_class_is_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3187; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_snan__daz( 3188; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 897) 3189; CHECK-NEXT: ret i1 [[CLASS]] 3190; 3191 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 897) 3192 ret i1 %class 3193} 3194 3195define i1 @test_class_is_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3196; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_qnan__daz( 3197; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 898) 3198; CHECK-NEXT: ret i1 [[CLASS]] 3199; 3200 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 898) 3201 ret i1 %class 3202} 3203 3204define i1 @test_class_is_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3205; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_nan__daz( 3206; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 899) 3207; CHECK-NEXT: ret i1 [[CLASS]] 3208; 3209 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 899) 3210 ret i1 %class 3211} 3212 3213define i1 @test_class_is_pnorm_pinf__daz(float %arg) #1 { 3214; CHECK-LABEL: @test_class_is_pnorm_pinf__daz( 3215; CHECK-NEXT: [[CLASS:%.*]] = fcmp ogt float [[ARG:%.*]], 0.000000e+00 3216; CHECK-NEXT: ret i1 [[CLASS]] 3217; 3218 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 768) 3219 ret i1 %class 3220} 3221 3222define i1 @test_class_is_pzero_pnorm_pinf__daz(float %arg) #1 { 3223; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf__daz( 3224; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 704) 3225; CHECK-NEXT: ret i1 [[CLASS]] 3226; 3227 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 704) 3228 ret i1 %class 3229} 3230 3231define i1 @test_class_is_pzero_pnorm_pinf_nan__daz(float %arg) #1 { 3232; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf_nan__daz( 3233; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 707) 3234; CHECK-NEXT: ret i1 [[CLASS]] 3235; 3236 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 707) 3237 ret i1 %class 3238} 3239 3240define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3241; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf__daz( 3242; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 992) 3243; CHECK-NEXT: ret i1 [[CLASS]] 3244; 3245 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 992) 3246 ret i1 %class 3247} 3248 3249define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3250; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__daz( 3251; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 993) 3252; CHECK-NEXT: ret i1 [[CLASS]] 3253; 3254 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 993) 3255 ret i1 %class 3256} 3257 3258define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3259; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__daz( 3260; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 994) 3261; CHECK-NEXT: ret i1 [[CLASS]] 3262; 3263 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 994) 3264 ret i1 %class 3265} 3266 3267define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3268; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__daz( 3269; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 995) 3270; CHECK-NEXT: ret i1 [[CLASS]] 3271; 3272 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 995) 3273 ret i1 %class 3274} 3275 3276define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3277; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__daz( 3278; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1017) 3279; CHECK-NEXT: ret i1 [[CLASS]] 3280; 3281 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1017) 3282 ret i1 %class 3283} 3284 3285define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3286; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__daz( 3287; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1009) 3288; CHECK-NEXT: ret i1 [[CLASS]] 3289; 3290 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1009) 3291 ret i1 %class 3292} 3293 3294define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3295; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__daz( 3296; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1010) 3297; CHECK-NEXT: ret i1 [[CLASS]] 3298; 3299 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1010) 3300 ret i1 %class 3301} 3302 3303define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3304; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__daz( 3305; CHECK-NEXT: [[CLASS:%.*]] = fcmp uge float [[ARG:%.*]], 0.000000e+00 3306; CHECK-NEXT: ret i1 [[CLASS]] 3307; 3308 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1011) 3309 ret i1 %class 3310} 3311 3312define i1 @test_class_is_nzero_psub_pnorm_pinf__daz(float %arg) #1 { 3313; CHECK-LABEL: @test_class_is_nzero_psub_pnorm_pinf__daz( 3314; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 928) 3315; CHECK-NEXT: ret i1 [[CLASS]] 3316; 3317 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 928) 3318 ret i1 %class 3319} 3320 3321define i1 @test_class_is_nzero_nsub_pnorm_pinf__daz(float %arg) #1 { 3322; CHECK-LABEL: @test_class_is_nzero_nsub_pnorm_pinf__daz( 3323; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 816) 3324; CHECK-NEXT: ret i1 [[CLASS]] 3325; 3326 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 816) 3327 ret i1 %class 3328} 3329 3330 3331define i1 @test_class_is_not_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3332; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf__daz( 3333; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 63) 3334; CHECK-NEXT: ret i1 [[CLASS]] 3335; 3336 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 63) 3337 ret i1 %class 3338} 3339 3340define i1 @test_class_is_not_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3341; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_snan__daz( 3342; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 62) 3343; CHECK-NEXT: ret i1 [[CLASS]] 3344; 3345 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 62) 3346 ret i1 %class 3347} 3348 3349define i1 @test_class_is_not_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3350; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_qnan__daz( 3351; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 61) 3352; CHECK-NEXT: ret i1 [[CLASS]] 3353; 3354 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 61) 3355 ret i1 %class 3356} 3357 3358define i1 @test_class_is_not_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3359; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_nan__daz( 3360; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 3361; CHECK-NEXT: ret i1 [[CLASS]] 3362; 3363 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 3364 ret i1 %class 3365} 3366 3367define i1 @test_class_is_not_psub_pnorm_pinf__daz(float %arg) #1 { 3368; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf__daz( 3369; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 127) 3370; CHECK-NEXT: ret i1 [[CLASS]] 3371; 3372 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 127) 3373 ret i1 %class 3374} 3375 3376define i1 @test_class_is_not_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3377; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_snan__daz( 3378; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 126) 3379; CHECK-NEXT: ret i1 [[CLASS]] 3380; 3381 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 126) 3382 ret i1 %class 3383} 3384 3385define i1 @test_class_is_not_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3386; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_qnan__daz( 3387; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 125) 3388; CHECK-NEXT: ret i1 [[CLASS]] 3389; 3390 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 125) 3391 ret i1 %class 3392} 3393 3394define i1 @test_class_is_not_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3395; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_nan__daz( 3396; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 124) 3397; CHECK-NEXT: ret i1 [[CLASS]] 3398; 3399 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 124) 3400 ret i1 %class 3401} 3402 3403define i1 @test_class_is_not_pnorm_pinf__daz(float %arg) #1 { 3404; CHECK-LABEL: @test_class_is_not_pnorm_pinf__daz( 3405; CHECK-NEXT: [[CLASS:%.*]] = fcmp ule float [[ARG:%.*]], 0.000000e+00 3406; CHECK-NEXT: ret i1 [[CLASS]] 3407; 3408 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 255) 3409 ret i1 %class 3410} 3411 3412define i1 @test_class_is_not_pzero_pnorm_pinf__daz(float %arg) #1 { 3413; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf__daz( 3414; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 319) 3415; CHECK-NEXT: ret i1 [[CLASS]] 3416; 3417 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 319) 3418 ret i1 %class 3419} 3420 3421define i1 @test_class_is_not_pzero_pnorm_pinf_nan__daz(float %arg) #1 { 3422; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf_nan__daz( 3423; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 316) 3424; CHECK-NEXT: ret i1 [[CLASS]] 3425; 3426 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 316) 3427 ret i1 %class 3428} 3429 3430define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3431; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf__daz( 3432; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 22) 3433; CHECK-NEXT: ret i1 [[CLASS]] 3434; 3435 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 22) 3436 ret i1 %class 3437} 3438 3439define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3440; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__daz( 3441; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 30) 3442; CHECK-NEXT: ret i1 [[CLASS]] 3443; 3444 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 30) 3445 ret i1 %class 3446} 3447 3448define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3449; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__daz( 3450; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 29) 3451; CHECK-NEXT: ret i1 [[CLASS]] 3452; 3453 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 29) 3454 ret i1 %class 3455} 3456 3457define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3458; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__daz( 3459; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 28) 3460; CHECK-NEXT: ret i1 [[CLASS]] 3461; 3462 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 28) 3463 ret i1 %class 3464} 3465 3466define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__daz(float %arg) #1 { 3467; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__daz( 3468; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 6) 3469; CHECK-NEXT: ret i1 [[CLASS]] 3470; 3471 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 6) 3472 ret i1 %class 3473} 3474 3475define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__daz(float %arg) #1 { 3476; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__daz( 3477; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 14) 3478; CHECK-NEXT: ret i1 [[CLASS]] 3479; 3480 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 14) 3481 ret i1 %class 3482} 3483 3484define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__daz(float %arg) #1 { 3485; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__daz( 3486; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 13) 3487; CHECK-NEXT: ret i1 [[CLASS]] 3488; 3489 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 13) 3490 ret i1 %class 3491} 3492 3493define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__daz(float %arg) #1 { 3494; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__daz( 3495; CHECK-NEXT: [[CLASS:%.*]] = fcmp olt float [[ARG:%.*]], 0.000000e+00 3496; CHECK-NEXT: ret i1 [[CLASS]] 3497; 3498 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 12) 3499 ret i1 %class 3500} 3501 3502define i1 @test_class_is_not_nzero_psub_pnorm_pinf__daz(float %arg) #1 { 3503; CHECK-LABEL: @test_class_is_not_nzero_psub_pnorm_pinf__daz( 3504; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 95) 3505; CHECK-NEXT: ret i1 [[CLASS]] 3506; 3507 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 95) 3508 ret i1 %class 3509} 3510 3511define i1 @test_class_is_not_nzero_nsub_pnorm_pinf__daz(float %arg) #1 { 3512; CHECK-LABEL: @test_class_is_not_nzero_nsub_pnorm_pinf__daz( 3513; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 207) 3514; CHECK-NEXT: ret i1 [[CLASS]] 3515; 3516 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 207) 3517 ret i1 %class 3518} 3519 3520; -------------------------------------------------------------------- 3521; fcmp ogt/oge/olt/ole 0 dapz 3522; -------------------------------------------------------------------- 3523 3524define i1 @test_class_is_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3525; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf__dapz( 3526; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 3527; CHECK-NEXT: ret i1 [[CLASS]] 3528; 3529 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 3530 ret i1 %class 3531} 3532 3533define i1 @test_class_is_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3534; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_snan__dapz( 3535; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 961) 3536; CHECK-NEXT: ret i1 [[CLASS]] 3537; 3538 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 961) 3539 ret i1 %class 3540} 3541 3542define i1 @test_class_is_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3543; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_qnan__dapz( 3544; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 962) 3545; CHECK-NEXT: ret i1 [[CLASS]] 3546; 3547 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 962) 3548 ret i1 %class 3549} 3550 3551define i1 @test_class_is_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3552; CHECK-LABEL: @test_class_is_pzero_psub_pnorm_pinf_nan__dapz( 3553; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 963) 3554; CHECK-NEXT: ret i1 [[CLASS]] 3555; 3556 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 963) 3557 ret i1 %class 3558} 3559 3560define i1 @test_class_is_psub_pnorm_pinf__dapz(float %arg) #2 { 3561; CHECK-LABEL: @test_class_is_psub_pnorm_pinf__dapz( 3562; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 896) 3563; CHECK-NEXT: ret i1 [[CLASS]] 3564; 3565 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 896) 3566 ret i1 %class 3567} 3568 3569define i1 @test_class_is_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3570; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_snan__dapz( 3571; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 897) 3572; CHECK-NEXT: ret i1 [[CLASS]] 3573; 3574 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 897) 3575 ret i1 %class 3576} 3577 3578define i1 @test_class_is_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3579; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_qnan__dapz( 3580; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 898) 3581; CHECK-NEXT: ret i1 [[CLASS]] 3582; 3583 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 898) 3584 ret i1 %class 3585} 3586 3587define i1 @test_class_is_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3588; CHECK-LABEL: @test_class_is_psub_pnorm_pinf_nan__dapz( 3589; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 899) 3590; CHECK-NEXT: ret i1 [[CLASS]] 3591; 3592 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 899) 3593 ret i1 %class 3594} 3595 3596define i1 @test_class_is_pnorm_pinf__dapz(float %arg) #2 { 3597; CHECK-LABEL: @test_class_is_pnorm_pinf__dapz( 3598; CHECK-NEXT: [[CLASS:%.*]] = fcmp ogt float [[ARG:%.*]], 0.000000e+00 3599; CHECK-NEXT: ret i1 [[CLASS]] 3600; 3601 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 768) 3602 ret i1 %class 3603} 3604 3605define i1 @test_class_is_pzero_pnorm_pinf__dapz(float %arg) #2 { 3606; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf__dapz( 3607; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 704) 3608; CHECK-NEXT: ret i1 [[CLASS]] 3609; 3610 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 704) 3611 ret i1 %class 3612} 3613 3614define i1 @test_class_is_pzero_pnorm_pinf_nan__dapz(float %arg) #2 { 3615; CHECK-LABEL: @test_class_is_pzero_pnorm_pinf_nan__dapz( 3616; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 707) 3617; CHECK-NEXT: ret i1 [[CLASS]] 3618; 3619 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 707) 3620 ret i1 %class 3621} 3622 3623define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3624; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf__dapz( 3625; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 992) 3626; CHECK-NEXT: ret i1 [[CLASS]] 3627; 3628 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 992) 3629 ret i1 %class 3630} 3631 3632define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3633; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_snan__dapz( 3634; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 993) 3635; CHECK-NEXT: ret i1 [[CLASS]] 3636; 3637 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 993) 3638 ret i1 %class 3639} 3640 3641define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3642; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_qnan__dapz( 3643; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 994) 3644; CHECK-NEXT: ret i1 [[CLASS]] 3645; 3646 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 994) 3647 ret i1 %class 3648} 3649 3650define i1 @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3651; CHECK-LABEL: @test_class_is_nzero_pzero_psub_pnorm_pinf_nan__dapz( 3652; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 995) 3653; CHECK-NEXT: ret i1 [[CLASS]] 3654; 3655 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 995) 3656 ret i1 %class 3657} 3658 3659define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3660; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf__dapz( 3661; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1017) 3662; CHECK-NEXT: ret i1 [[CLASS]] 3663; 3664 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1017) 3665 ret i1 %class 3666} 3667 3668define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3669; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_snan__dapz( 3670; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1009) 3671; CHECK-NEXT: ret i1 [[CLASS]] 3672; 3673 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1009) 3674 ret i1 %class 3675} 3676 3677define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3678; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_qnan__dapz( 3679; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 1010) 3680; CHECK-NEXT: ret i1 [[CLASS]] 3681; 3682 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1010) 3683 ret i1 %class 3684} 3685 3686define i1 @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3687; CHECK-LABEL: @test_class_is_nsub_nzero_pzero_psub_pnorm_pinf_nan__dapz( 3688; CHECK-NEXT: [[CLASS:%.*]] = fcmp uge float [[ARG:%.*]], 0.000000e+00 3689; CHECK-NEXT: ret i1 [[CLASS]] 3690; 3691 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 1011) 3692 ret i1 %class 3693} 3694 3695define i1 @test_class_is_nzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3696; CHECK-LABEL: @test_class_is_nzero_psub_pnorm_pinf__dapz( 3697; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 928) 3698; CHECK-NEXT: ret i1 [[CLASS]] 3699; 3700 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 928) 3701 ret i1 %class 3702} 3703 3704define i1 @test_class_is_nzero_nsub_pnorm_pinf__dapz(float %arg) #2 { 3705; CHECK-LABEL: @test_class_is_nzero_nsub_pnorm_pinf__dapz( 3706; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 816) 3707; CHECK-NEXT: ret i1 [[CLASS]] 3708; 3709 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 816) 3710 ret i1 %class 3711} 3712 3713 3714define i1 @test_class_is_not_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3715; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf__dapz( 3716; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 63) 3717; CHECK-NEXT: ret i1 [[CLASS]] 3718; 3719 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 63) 3720 ret i1 %class 3721} 3722 3723define i1 @test_class_is_not_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3724; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_snan__dapz( 3725; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 62) 3726; CHECK-NEXT: ret i1 [[CLASS]] 3727; 3728 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 62) 3729 ret i1 %class 3730} 3731 3732define i1 @test_class_is_not_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3733; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_qnan__dapz( 3734; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 61) 3735; CHECK-NEXT: ret i1 [[CLASS]] 3736; 3737 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 61) 3738 ret i1 %class 3739} 3740 3741define i1 @test_class_is_not_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3742; CHECK-LABEL: @test_class_is_not_pzero_psub_pnorm_pinf_nan__dapz( 3743; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 960) 3744; CHECK-NEXT: ret i1 [[CLASS]] 3745; 3746 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 960) 3747 ret i1 %class 3748} 3749 3750define i1 @test_class_is_not_psub_pnorm_pinf__dapz(float %arg) #2 { 3751; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf__dapz( 3752; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 127) 3753; CHECK-NEXT: ret i1 [[CLASS]] 3754; 3755 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 127) 3756 ret i1 %class 3757} 3758 3759define i1 @test_class_is_not_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3760; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_snan__dapz( 3761; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 126) 3762; CHECK-NEXT: ret i1 [[CLASS]] 3763; 3764 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 126) 3765 ret i1 %class 3766} 3767 3768define i1 @test_class_is_not_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3769; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_qnan__dapz( 3770; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 125) 3771; CHECK-NEXT: ret i1 [[CLASS]] 3772; 3773 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 125) 3774 ret i1 %class 3775} 3776 3777define i1 @test_class_is_not_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3778; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf_nan__dapz( 3779; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 124) 3780; CHECK-NEXT: ret i1 [[CLASS]] 3781; 3782 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 124) 3783 ret i1 %class 3784} 3785 3786define i1 @test_class_is_not_pnorm_pinf__dapz(float %arg) #2 { 3787; CHECK-LABEL: @test_class_is_not_pnorm_pinf__dapz( 3788; CHECK-NEXT: [[CLASS:%.*]] = fcmp ule float [[ARG:%.*]], 0.000000e+00 3789; CHECK-NEXT: ret i1 [[CLASS]] 3790; 3791 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 255) 3792 ret i1 %class 3793} 3794 3795define i1 @test_class_is_not_pzero_pnorm_pinf__dapz(float %arg) #2 { 3796; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf__dapz( 3797; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 319) 3798; CHECK-NEXT: ret i1 [[CLASS]] 3799; 3800 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 319) 3801 ret i1 %class 3802} 3803 3804define i1 @test_class_is_not_pzero_pnorm_pinf_nan__dapz(float %arg) #2 { 3805; CHECK-LABEL: @test_class_is_not_pzero_pnorm_pinf_nan__dapz( 3806; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 316) 3807; CHECK-NEXT: ret i1 [[CLASS]] 3808; 3809 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 316) 3810 ret i1 %class 3811} 3812 3813define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3814; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf__dapz( 3815; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 22) 3816; CHECK-NEXT: ret i1 [[CLASS]] 3817; 3818 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 22) 3819 ret i1 %class 3820} 3821 3822define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3823; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_snan__dapz( 3824; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 30) 3825; CHECK-NEXT: ret i1 [[CLASS]] 3826; 3827 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 30) 3828 ret i1 %class 3829} 3830 3831define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3832; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_qnan__dapz( 3833; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 29) 3834; CHECK-NEXT: ret i1 [[CLASS]] 3835; 3836 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 29) 3837 ret i1 %class 3838} 3839 3840define i1 @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3841; CHECK-LABEL: @test_class_is_not_nzero_pzero_psub_pnorm_pinf_nan__dapz( 3842; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 28) 3843; CHECK-NEXT: ret i1 [[CLASS]] 3844; 3845 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 28) 3846 ret i1 %class 3847} 3848 3849define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3850; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf__dapz( 3851; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 6) 3852; CHECK-NEXT: ret i1 [[CLASS]] 3853; 3854 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 6) 3855 ret i1 %class 3856} 3857 3858define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__dapz(float %arg) #2 { 3859; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_snan__dapz( 3860; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 14) 3861; CHECK-NEXT: ret i1 [[CLASS]] 3862; 3863 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 14) 3864 ret i1 %class 3865} 3866 3867define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__dapz(float %arg) #2 { 3868; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_qnan__dapz( 3869; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 13) 3870; CHECK-NEXT: ret i1 [[CLASS]] 3871; 3872 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 13) 3873 ret i1 %class 3874} 3875 3876define i1 @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__dapz(float %arg) #2 { 3877; CHECK-LABEL: @test_class_is_not_nsub_nzero_pzero_psub_pnorm_pinf_nan__dapz( 3878; CHECK-NEXT: [[CLASS:%.*]] = fcmp olt float [[ARG:%.*]], 0.000000e+00 3879; CHECK-NEXT: ret i1 [[CLASS]] 3880; 3881 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 12) 3882 ret i1 %class 3883} 3884 3885define i1 @test_class_is_not_nzero_psub_pnorm_pinf__dapz(float %arg) #2 { 3886; CHECK-LABEL: @test_class_is_not_nzero_psub_pnorm_pinf__dapz( 3887; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 95) 3888; CHECK-NEXT: ret i1 [[CLASS]] 3889; 3890 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 95) 3891 ret i1 %class 3892} 3893 3894define i1 @test_class_is_not_nzero_nsub_pnorm_pinf__dapz(float %arg) #2 { 3895; CHECK-LABEL: @test_class_is_not_nzero_nsub_pnorm_pinf__dapz( 3896; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 207) 3897; CHECK-NEXT: ret i1 [[CLASS]] 3898; 3899 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 207) 3900 ret i1 %class 3901} 3902 3903; -------------------------------------------------------------------- 3904; fcmp ogt/oge/olt/ole 0 dynamic 3905; -------------------------------------------------------------------- 3906 3907define i1 @test_class_is_psub_pnorm_pinf__dynamic(float %arg) #3 { 3908; CHECK-LABEL: @test_class_is_psub_pnorm_pinf__dynamic( 3909; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 896) 3910; CHECK-NEXT: ret i1 [[CLASS]] 3911; 3912 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 896) 3913 ret i1 %class 3914} 3915 3916define i1 @test_class_is_not_psub_pnorm_pinf__dynamic(float %arg) #3 { 3917; CHECK-LABEL: @test_class_is_not_psub_pnorm_pinf__dynamic( 3918; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 127) 3919; CHECK-NEXT: ret i1 [[CLASS]] 3920; 3921 %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 127) 3922 ret i1 %class 3923} 3924 3925declare i1 @llvm.is.fpclass.f32(float, i32 immarg) 3926declare i1 @llvm.is.fpclass.f64(double, i32 immarg) 3927declare <2 x i1> @llvm.is.fpclass.v2f32(<2 x float>, i32 immarg) 3928declare float @llvm.fabs.f32(float) 3929declare <2 x float> @llvm.fabs.v2f32(<2 x float>) 3930declare void @llvm.assume(i1 noundef) 3931 3932attributes #0 = { "denormal-fp-math"="dynamic,ieee" } 3933attributes #1 = { "denormal-fp-math"="dynamic,preserve-sign" } 3934attributes #2 = { "denormal-fp-math"="dynamic,positive-zero" } 3935attributes #3 = { "denormal-fp-math"="dynamic,dynamic" } 3936