xref: /llvm-project/llvm/test/Transforms/InstCombine/icmp-vscale.ll (revision 095d49da76be09143582e07a807c86d3b4334dec)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=instcombine -S < %s | FileCheck %s
3
4define i1 @ugt_vscale64_x_32() vscale_range(1,16) {
5; CHECK-LABEL: @ugt_vscale64_x_32(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    ret i1 false
8;
9entry:
10  %vscale = call i64 @llvm.vscale.i64()
11  %num_els = shl i64 %vscale, 5
12  %res = icmp ugt i64 %num_els, 1024
13  ret i1 %res
14}
15
16define i1 @ugt_vscale64_x_31() vscale_range(1,16) {
17; CHECK-LABEL: @ugt_vscale64_x_31(
18; CHECK-NEXT:  entry:
19; CHECK-NEXT:    ret i1 false
20;
21entry:
22  %vscale = call i64 @llvm.vscale.i64()
23  %num_els = mul i64 %vscale, 31
24  %res = icmp ugt i64 %num_els, 1024
25  ret i1 %res
26}
27
28define i1 @ugt_vscale16_x_32() vscale_range(1,16) {
29; CHECK-LABEL: @ugt_vscale16_x_32(
30; CHECK-NEXT:  entry:
31; CHECK-NEXT:    ret i1 false
32;
33entry:
34  %vscale = call i16 @llvm.vscale.i16()
35  %num_els = shl i16 %vscale, 5
36  %res = icmp ugt i16 %num_els, 1024
37  ret i1 %res
38}
39
40define i1 @ult_vscale16() vscale_range(1,16) {
41; CHECK-LABEL: @ult_vscale16(
42; CHECK-NEXT:  entry:
43; CHECK-NEXT:    ret i1 false
44;
45entry:
46  %vscale = call i16 @llvm.vscale.i16()
47  %res = icmp ult i16 1024, %vscale
48  ret i1 %res
49}
50
51define i1 @ule_vscale64() vscale_range(1,16) {
52; CHECK-LABEL: @ule_vscale64(
53; CHECK-NEXT:  entry:
54; CHECK-NEXT:    ret i1 false
55;
56entry:
57  %vscale = call i64 @llvm.vscale.i64()
58  %res = icmp ule i64 1024, %vscale
59  ret i1 %res
60}
61
62define i1 @ueq_vscale64_range4_4() vscale_range(4,4) {
63; CHECK-LABEL: @ueq_vscale64_range4_4(
64; CHECK-NEXT:  entry:
65; CHECK-NEXT:    ret i1 true
66;
67entry:
68  %vscale = call i64 @llvm.vscale.i64()
69  %res = icmp eq i64 %vscale, 4
70  ret i1 %res
71}
72
73define i1 @ne_vscale64_x_32() vscale_range(1,16) {
74; CHECK-LABEL: @ne_vscale64_x_32(
75; CHECK-NEXT:  entry:
76; CHECK-NEXT:    ret i1 true
77;
78entry:
79  %vscale = call i64 @llvm.vscale.i64()
80  %num_els = mul i64 %vscale, 32
81  %res = icmp ne i64 %num_els, 39488
82  ret i1 %res
83}
84
85define i1 @vscale_ule_max() vscale_range(4,8) {
86; CHECK-LABEL: @vscale_ule_max(
87; CHECK-NEXT:    ret i1 true
88;
89  %vscale = call i16 @llvm.vscale.i16()
90  %res = icmp ule i16 %vscale, 8
91  ret i1 %res
92}
93
94define i1 @vscale_ult_max() vscale_range(4,8) {
95; CHECK-LABEL: @vscale_ult_max(
96; CHECK-NEXT:    [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
97; CHECK-NEXT:    [[RES:%.*]] = icmp samesign ult i16 [[VSCALE]], 8
98; CHECK-NEXT:    ret i1 [[RES]]
99;
100  %vscale = call i16 @llvm.vscale.i16()
101  %res = icmp ult i16 %vscale, 8
102  ret i1 %res
103}
104
105define i1 @vscale_uge_min() vscale_range(4,8) {
106; CHECK-LABEL: @vscale_uge_min(
107; CHECK-NEXT:    ret i1 true
108;
109  %vscale = call i16 @llvm.vscale.i16()
110  %res = icmp uge i16 %vscale, 4
111  ret i1 %res
112}
113
114define i1 @vscale_ugt_min() vscale_range(4,8) {
115; CHECK-LABEL: @vscale_ugt_min(
116; CHECK-NEXT:    [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
117; CHECK-NEXT:    [[RES:%.*]] = icmp samesign ugt i16 [[VSCALE]], 4
118; CHECK-NEXT:    ret i1 [[RES]]
119;
120  %vscale = call i16 @llvm.vscale.i16()
121  %res = icmp ugt i16 %vscale, 4
122  ret i1 %res
123}
124
125define i1 @vscale_uge_no_max() vscale_range(4) {
126; CHECK-LABEL: @vscale_uge_no_max(
127; CHECK-NEXT:    ret i1 true
128;
129  %vscale = call i8 @llvm.vscale.i8()
130  %res = icmp uge i8 %vscale, 4
131  ret i1 %res
132}
133
134define i1 @vscale_ugt_no_max() vscale_range(4) {
135; CHECK-LABEL: @vscale_ugt_no_max(
136; CHECK-NEXT:    ret i1 false
137;
138  %vscale = call i8 @llvm.vscale.i8()
139  %res = icmp ugt i8 %vscale, 4
140  ret i1 %res
141}
142
143define i1 @vscale_uge_max_overflow() vscale_range(4,256) {
144; CHECK-LABEL: @vscale_uge_max_overflow(
145; CHECK-NEXT:    ret i1 true
146;
147  %vscale = call i8 @llvm.vscale.i8()
148  %res = icmp uge i8 %vscale, 4
149  ret i1 %res
150}
151
152define i1 @vscale_ugt_max_overflow() vscale_range(4,256) {
153; CHECK-LABEL: @vscale_ugt_max_overflow(
154; CHECK-NEXT:    [[VSCALE:%.*]] = call i8 @llvm.vscale.i8()
155; CHECK-NEXT:    [[RES:%.*]] = icmp ugt i8 [[VSCALE]], 4
156; CHECK-NEXT:    ret i1 [[RES]]
157;
158  %vscale = call i8 @llvm.vscale.i8()
159  %res = icmp ugt i8 %vscale, 4
160  ret i1 %res
161}
162
163define i1 @vscale_eq_min_overflow() vscale_range(256,512) {
164; CHECK-LABEL: @vscale_eq_min_overflow(
165; CHECK-NEXT:    ret i1 true
166;
167  %vscale = call i8 @llvm.vscale.i8()
168  %res = icmp eq i8 %vscale, 42
169  ret i1 %res
170}
171
172define i1 @vscale_ult_min_overflow() vscale_range(256,512) {
173; CHECK-LABEL: @vscale_ult_min_overflow(
174; CHECK-NEXT:    ret i1 true
175;
176  %vscale = call i8 @llvm.vscale.i8()
177  %res = icmp ult i8 %vscale, 42
178  ret i1 %res
179}
180
181define i1 @vscale_ugt_min_overflow() vscale_range(256,512) {
182; CHECK-LABEL: @vscale_ugt_min_overflow(
183; CHECK-NEXT:    ret i1 true
184;
185  %vscale = call i8 @llvm.vscale.i8()
186  %res = icmp ugt i8 %vscale, 42
187  ret i1 %res
188}
189
190declare i8 @llvm.vscale.i8()
191declare i16 @llvm.vscale.i16()
192declare i32 @llvm.vscale.i32()
193declare i64 @llvm.vscale.i64()
194