1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4define i1 @icmp_ugt_sremsmin_smin(i32 %x) { 5; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smin( 6; CHECK-SAME: i32 [[X:%.*]]) { 7; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -2147483648 8; CHECK-NEXT: ret i1 [[C]] 9; 10 %r = srem i32 %x, -2147483648 11 %c = icmp ugt i32 %r, -2147483648 12 ret i1 %c 13} 14 15define i1 @icmp_ugt_sremsmin_sminp1(i32 %x) { 16; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_sminp1( 17; CHECK-SAME: i32 [[X:%.*]]) { 18; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 19; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -2147483647 20; CHECK-NEXT: ret i1 [[C]] 21; 22 %r = srem i32 %x, -2147483648 23 %c = icmp ugt i32 %r, -2147483647 24 ret i1 %c 25} 26 27define i1 @icmp_ugt_sremsmin_smaxm1(i32 %x) { 28; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smaxm1( 29; CHECK-SAME: i32 [[X:%.*]]) { 30; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 31; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 2147483646 32; CHECK-NEXT: ret i1 [[C]] 33; 34 %r = srem i32 %x, -2147483648 35 %c = icmp ugt i32 %r, 2147483646 36 ret i1 %c 37} 38 39define i1 @icmp_ugt_sremsmin_smax(i32 %x) { 40; CHECK-LABEL: define i1 @icmp_ugt_sremsmin_smax( 41; CHECK-SAME: i32 [[X:%.*]]) { 42; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[X]], -2147483648 43; CHECK-NEXT: ret i1 [[C]] 44; 45 %r = srem i32 %x, -2147483648 46 %c = icmp ugt i32 %r, 2147483647 47 ret i1 %c 48} 49 50define i1 @icmp_ult_sremsmin_smin(i32 %x) { 51; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smin( 52; CHECK-SAME: i32 [[X:%.*]]) { 53; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 54; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 55; CHECK-NEXT: ret i1 [[C]] 56; 57 %r = srem i32 %x, -2147483648 58 %c = icmp ult i32 %r, -2147483648 59 ret i1 %c 60} 61 62define i1 @icmp_ult_sremsmin_sminp1(i32 %x) { 63; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp1( 64; CHECK-SAME: i32 [[X:%.*]]) { 65; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 66; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 67; CHECK-NEXT: ret i1 [[C]] 68; 69 %r = srem i32 %x, -2147483648 70 %c = icmp ult i32 %r, -2147483647 71 ret i1 %c 72} 73 74define i1 @icmp_ult_sremsmin_sminp2(i32 %x) { 75; CHECK-LABEL: define i1 @icmp_ult_sremsmin_sminp2( 76; CHECK-SAME: i32 [[X:%.*]]) { 77; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 78; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -2147483646 79; CHECK-NEXT: ret i1 [[C]] 80; 81 %r = srem i32 %x, -2147483648 82 %c = icmp ult i32 %r, -2147483646 83 ret i1 %c 84} 85 86define i1 @icmp_ult_sremsmin_smax(i32 %x) { 87; CHECK-LABEL: define i1 @icmp_ult_sremsmin_smax( 88; CHECK-SAME: i32 [[X:%.*]]) { 89; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], -2147483648 90; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 2147483647 91; CHECK-NEXT: ret i1 [[C]] 92; 93 %r = srem i32 %x, -2147483648 94 %c = icmp ult i32 %r, 2147483647 95 ret i1 %c 96} 97 98define i1 @icmp_ugt_srem5_smin(i32 %x) { 99; CHECK-LABEL: define i1 @icmp_ugt_srem5_smin( 100; CHECK-SAME: i32 [[X:%.*]]) { 101; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 102; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 103; CHECK-NEXT: ret i1 [[C]] 104; 105 %r = srem i32 %x, 5 106 %c = icmp ugt i32 %r, -2147483648 107 ret i1 %c 108} 109 110define i1 @icmp_ugt_srem5_m5(i32 %x) { 111; CHECK-LABEL: define i1 @icmp_ugt_srem5_m5( 112; CHECK-SAME: i32 [[X:%.*]]) { 113; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 114; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 115; CHECK-NEXT: ret i1 [[C]] 116; 117 %r = srem i32 %x, 5 118 %c = icmp ugt i32 %r, -5 119 ret i1 %c 120} 121 122define i1 @icmp_ugt_srem5_m4(i32 %x) { 123; CHECK-LABEL: define i1 @icmp_ugt_srem5_m4( 124; CHECK-SAME: i32 [[X:%.*]]) { 125; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 126; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -4 127; CHECK-NEXT: ret i1 [[C]] 128; 129 %r = srem i32 %x, 5 130 %c = icmp ugt i32 %r, -4 131 ret i1 %c 132} 133 134define i1 @icmp_ugt_srem5_3(i32 %x) { 135; CHECK-LABEL: define i1 @icmp_ugt_srem5_3( 136; CHECK-SAME: i32 [[X:%.*]]) { 137; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 138; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 3 139; CHECK-NEXT: ret i1 [[C]] 140; 141 %r = srem i32 %x, 5 142 %c = icmp ugt i32 %r, 3 143 ret i1 %c 144} 145 146define i1 @icmp_ugt_srem5_4(i32 %x) { 147; CHECK-LABEL: define i1 @icmp_ugt_srem5_4( 148; CHECK-SAME: i32 [[X:%.*]]) { 149; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 150; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 151; CHECK-NEXT: ret i1 [[C]] 152; 153 %r = srem i32 %x, 5 154 %c = icmp ugt i32 %r, 4 155 ret i1 %c 156} 157 158define i1 @icmp_ugt_srem5_smaxm1(i32 %x) { 159; CHECK-LABEL: define i1 @icmp_ugt_srem5_smaxm1( 160; CHECK-SAME: i32 [[X:%.*]]) { 161; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 162; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 163; CHECK-NEXT: ret i1 [[C]] 164; 165 %r = srem i32 %x, 5 166 %c = icmp ugt i32 %r, 2147483646 167 ret i1 %c 168} 169 170define i1 @icmp_ult_srem5_sminp1(i32 %x) { 171; CHECK-LABEL: define i1 @icmp_ult_srem5_sminp1( 172; CHECK-SAME: i32 [[X:%.*]]) { 173; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 174; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 175; CHECK-NEXT: ret i1 [[C]] 176; 177 %r = srem i32 %x, 5 178 %c = icmp ult i32 %r, -2147483647 179 ret i1 %c 180} 181 182define i1 @icmp_ult_srem5_m4(i32 %x) { 183; CHECK-LABEL: define i1 @icmp_ult_srem5_m4( 184; CHECK-SAME: i32 [[X:%.*]]) { 185; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 186; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 187; CHECK-NEXT: ret i1 [[C]] 188; 189 %r = srem i32 %x, 5 190 %c = icmp ult i32 %r, -4 191 ret i1 %c 192} 193 194define i1 @icmp_ult_srem5_m3(i32 %x) { 195; CHECK-LABEL: define i1 @icmp_ult_srem5_m3( 196; CHECK-SAME: i32 [[X:%.*]]) { 197; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 198; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -3 199; CHECK-NEXT: ret i1 [[C]] 200; 201 %r = srem i32 %x, 5 202 %c = icmp ult i32 %r, -3 203 ret i1 %c 204} 205 206define i1 @icmp_ult_srem5_4(i32 %x) { 207; CHECK-LABEL: define i1 @icmp_ult_srem5_4( 208; CHECK-SAME: i32 [[X:%.*]]) { 209; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 210; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 4 211; CHECK-NEXT: ret i1 [[C]] 212; 213 %r = srem i32 %x, 5 214 %c = icmp ult i32 %r, 4 215 ret i1 %c 216} 217 218define i1 @icmp_ult_srem5_5(i32 %x) { 219; CHECK-LABEL: define i1 @icmp_ult_srem5_5( 220; CHECK-SAME: i32 [[X:%.*]]) { 221; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 222; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 223; CHECK-NEXT: ret i1 [[C]] 224; 225 %r = srem i32 %x, 5 226 %c = icmp ult i32 %r, 5 227 ret i1 %c 228} 229 230define i1 @icmp_ult_srem5_smax(i32 %x) { 231; CHECK-LABEL: define i1 @icmp_ult_srem5_smax( 232; CHECK-SAME: i32 [[X:%.*]]) { 233; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 5 234; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 235; CHECK-NEXT: ret i1 [[C]] 236; 237 %r = srem i32 %x, 5 238 %c = icmp ult i32 %r, 2147483647 239 ret i1 %c 240} 241 242define i1 @icmp_ugt_sremsmax_smin(i32 %x) { 243; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smin( 244; CHECK-SAME: i32 [[X:%.*]]) { 245; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 246; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 247; CHECK-NEXT: ret i1 [[C]] 248; 249 %r = srem i32 %x, 2147483647 250 %c = icmp ugt i32 %r, -2147483648 251 ret i1 %c 252} 253 254define i1 @icmp_ugt_sremsmax_sminp1(i32 %x) { 255; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp1( 256; CHECK-SAME: i32 [[X:%.*]]) { 257; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 258; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 259; CHECK-NEXT: ret i1 [[C]] 260; 261 %r = srem i32 %x, 2147483647 262 %c = icmp ugt i32 %r, -2147483647 263 ret i1 %c 264} 265 266define i1 @icmp_ugt_sremsmax_sminp2(i32 %x) { 267; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_sminp2( 268; CHECK-SAME: i32 [[X:%.*]]) { 269; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 270; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], -2147483646 271; CHECK-NEXT: ret i1 [[C]] 272; 273 %r = srem i32 %x, 2147483647 274 %c = icmp ugt i32 %r, -2147483646 275 ret i1 %c 276} 277 278define i1 @icmp_ugt_sremsmax_smaxm2(i32 %x) { 279; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm2( 280; CHECK-SAME: i32 [[X:%.*]]) { 281; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 282; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[R]], 2147483645 283; CHECK-NEXT: ret i1 [[C]] 284; 285 %r = srem i32 %x, 2147483647 286 %c = icmp ugt i32 %r, 2147483645 287 ret i1 %c 288} 289 290define i1 @icmp_ugt_sremsmax_smaxm1(i32 %x) { 291; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smaxm1( 292; CHECK-SAME: i32 [[X:%.*]]) { 293; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 294; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 295; CHECK-NEXT: ret i1 [[C]] 296; 297 %r = srem i32 %x, 2147483647 298 %c = icmp ugt i32 %r, 2147483646 299 ret i1 %c 300} 301 302define i1 @icmp_ugt_sremsmax_smax(i32 %x) { 303; CHECK-LABEL: define i1 @icmp_ugt_sremsmax_smax( 304; CHECK-SAME: i32 [[X:%.*]]) { 305; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 306; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[R]], 0 307; CHECK-NEXT: ret i1 [[C]] 308; 309 %r = srem i32 %x, 2147483647 310 %c = icmp ugt i32 %r, 2147483647 311 ret i1 %c 312} 313 314define i1 @icmp_ult_sremsmax_smin(i32 %x) { 315; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smin( 316; CHECK-SAME: i32 [[X:%.*]]) { 317; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 318; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 319; CHECK-NEXT: ret i1 [[C]] 320; 321 %r = srem i32 %x, 2147483647 322 %c = icmp ult i32 %r, -2147483648 323 ret i1 %c 324} 325 326define i1 @icmp_ult_sremsmax_sminp1(i32 %x) { 327; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp1( 328; CHECK-SAME: i32 [[X:%.*]]) { 329; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 330; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 331; CHECK-NEXT: ret i1 [[C]] 332; 333 %r = srem i32 %x, 2147483647 334 %c = icmp ult i32 %r, -2147483647 335 ret i1 %c 336} 337 338define i1 @icmp_ult_sremsmax_sminp2(i32 %x) { 339; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp2( 340; CHECK-SAME: i32 [[X:%.*]]) { 341; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 342; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 343; CHECK-NEXT: ret i1 [[C]] 344; 345 %r = srem i32 %x, 2147483647 346 %c = icmp ult i32 %r, -2147483646 347 ret i1 %c 348} 349 350define i1 @icmp_ult_sremsmax_sminp3(i32 %x) { 351; CHECK-LABEL: define i1 @icmp_ult_sremsmax_sminp3( 352; CHECK-SAME: i32 [[X:%.*]]) { 353; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 354; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], -2147483645 355; CHECK-NEXT: ret i1 [[C]] 356; 357 %r = srem i32 %x, 2147483647 358 %c = icmp ult i32 %r, -2147483645 359 ret i1 %c 360} 361 362define i1 @icmp_ult_sremsmax_smaxm1(i32 %x) { 363; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smaxm1( 364; CHECK-SAME: i32 [[X:%.*]]) { 365; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 366; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[R]], 2147483646 367; CHECK-NEXT: ret i1 [[C]] 368; 369 %r = srem i32 %x, 2147483647 370 %c = icmp ult i32 %r, 2147483646 371 ret i1 %c 372} 373 374define i1 @icmp_ult_sremsmax_smax(i32 %x) { 375; CHECK-LABEL: define i1 @icmp_ult_sremsmax_smax( 376; CHECK-SAME: i32 [[X:%.*]]) { 377; CHECK-NEXT: [[R:%.*]] = srem i32 [[X]], 2147483647 378; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[R]], -1 379; CHECK-NEXT: ret i1 [[C]] 380; 381 %r = srem i32 %x, 2147483647 382 %c = icmp ult i32 %r, 2147483647 383 ret i1 %c 384} 385