xref: /llvm-project/llvm/test/Transforms/InstCombine/icmp-ext-ext.ll (revision a105877646d68e48cdeeeadd9d1e075dc3c5d68d) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=instcombine -S | FileCheck %s
3
4; PR1940
5
6define i1 @zext_zext_sgt(i8 %x, i8 %y) {
7; CHECK-LABEL: @zext_zext_sgt(
8; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]
9; CHECK-NEXT:    ret i1 [[C]]
10;
11  %a = zext i8 %x to i32
12  %b = zext i8 %y to i32
13  %c = icmp sgt i32 %a, %b
14  ret i1 %c
15}
16
17define <2 x i1> @zext_zext_ugt(<2 x i8> %x, <2 x i8> %y) {
18; CHECK-LABEL: @zext_zext_ugt(
19; CHECK-NEXT:    [[C:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
20; CHECK-NEXT:    ret <2 x i1> [[C]]
21;
22  %a = zext <2 x i8> %x to <2 x i32>
23  %b = zext <2 x i8> %y to <2 x i32>
24  %c = icmp ugt <2 x i32> %a, %b
25  ret <2 x i1> %c
26}
27
28define i1 @zext_zext_eq(i8 %x, i8 %y) {
29; CHECK-LABEL: @zext_zext_eq(
30; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]]
31; CHECK-NEXT:    ret i1 [[C]]
32;
33  %a = zext i8 %x to i32
34  %b = zext i8 %y to i32
35  %c = icmp eq i32 %a, %b
36  ret i1 %c
37}
38
39define i1 @zext_zext_sle_op0_narrow(i8 %x, i16 %y) {
40; CHECK-LABEL: @zext_zext_sle_op0_narrow(
41; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[X:%.*]] to i16
42; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[Y:%.*]], [[TMP1]]
43; CHECK-NEXT:    ret i1 [[C]]
44;
45  %a = zext i8 %x to i32
46  %b = zext i16 %y to i32
47  %c = icmp sle i32 %a, %b
48  ret i1 %c
49}
50
51define i1 @zext_zext_ule_op0_wide(i9 %x, i8 %y) {
52; CHECK-LABEL: @zext_zext_ule_op0_wide(
53; CHECK-NEXT:    [[TMP1:%.*]] = zext i8 [[Y:%.*]] to i9
54; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[X:%.*]], [[TMP1]]
55; CHECK-NEXT:    ret i1 [[C]]
56;
57  %a = zext i9 %x to i32
58  %b = zext i8 %y to i32
59  %c = icmp ule i32 %a, %b
60  ret i1 %c
61}
62
63define i1 @sext_sext_slt(i8 %x, i8 %y) {
64; CHECK-LABEL: @sext_sext_slt(
65; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]
66; CHECK-NEXT:    ret i1 [[C]]
67;
68  %a = sext i8 %x to i32
69  %b = sext i8 %y to i32
70  %c = icmp slt i32 %a, %b
71  ret i1 %c
72}
73
74define i1 @sext_sext_ult(i8 %x, i8 %y) {
75; CHECK-LABEL: @sext_sext_ult(
76; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]
77; CHECK-NEXT:    ret i1 [[C]]
78;
79  %a = sext i8 %x to i32
80  %b = sext i8 %y to i32
81  %c = icmp ult i32 %a, %b
82  ret i1 %c
83}
84
85define i1 @sext_sext_ne(i8 %x, i8 %y) {
86; CHECK-LABEL: @sext_sext_ne(
87; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], [[Y:%.*]]
88; CHECK-NEXT:    ret i1 [[C]]
89;
90  %a = sext i8 %x to i32
91  %b = sext i8 %y to i32
92  %c = icmp ne i32 %a, %b
93  ret i1 %c
94}
95
96define i1 @sext_sext_sge_op0_narrow(i5 %x, i8 %y) {
97; CHECK-LABEL: @sext_sext_sge_op0_narrow(
98; CHECK-NEXT:    [[TMP1:%.*]] = sext i5 [[X:%.*]] to i8
99; CHECK-NEXT:    [[C:%.*]] = icmp sle i8 [[Y:%.*]], [[TMP1]]
100; CHECK-NEXT:    ret i1 [[C]]
101;
102  %a = sext i5 %x to i32
103  %b = sext i8 %y to i32
104  %c = icmp sge i32 %a, %b
105  ret i1 %c
106}
107
108define <2 x i1> @sext_sext_uge_op0_wide(<2 x i16> %x, <2 x i8> %y) {
109; CHECK-LABEL: @sext_sext_uge_op0_wide(
110; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i8> [[Y:%.*]] to <2 x i16>
111; CHECK-NEXT:    [[C:%.*]] = icmp uge <2 x i16> [[X:%.*]], [[TMP1]]
112; CHECK-NEXT:    ret <2 x i1> [[C]]
113;
114  %a = sext <2 x i16> %x to <2 x i32>
115  %b = sext <2 x i8> %y to <2 x i32>
116  %c = icmp uge <2 x i32> %a, %b
117  ret <2 x i1> %c
118}
119
120define i1 @zext_sext_sgt(i8 %x, i8 %y) {
121; CHECK-LABEL: @zext_sext_sgt(
122; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32
123; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32
124; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[A]], [[B]]
125; CHECK-NEXT:    ret i1 [[C]]
126;
127  %a = zext i8 %x to i32
128  %b = sext i8 %y to i32
129  %c = icmp sgt i32 %a, %b
130  ret i1 %c
131}
132
133define i1 @zext_nneg_sext_sgt(i8 %x, i8 %y) {
134; CHECK-LABEL: @zext_nneg_sext_sgt(
135; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], [[Y:%.*]]
136; CHECK-NEXT:    ret i1 [[C]]
137;
138  %a = zext nneg i8 %x to i32
139  %b = sext i8 %y to i32
140  %c = icmp sgt i32 %a, %b
141  ret i1 %c
142}
143
144define i1 @zext_sext_ugt(i8 %x, i8 %y) {
145; CHECK-LABEL: @zext_sext_ugt(
146; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32
147; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32
148; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 [[A]], [[B]]
149; CHECK-NEXT:    ret i1 [[C]]
150;
151  %a = zext i8 %x to i32
152  %b = sext i8 %y to i32
153  %c = icmp ugt i32 %a, %b
154  ret i1 %c
155}
156
157
158define i1 @zext_nneg_sext_ugt(i8 %x, i8 %y) {
159; CHECK-LABEL: @zext_nneg_sext_ugt(
160; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]
161; CHECK-NEXT:    ret i1 [[C]]
162;
163  %a = zext nneg i8 %x to i32
164  %b = sext i8 %y to i32
165  %c = icmp ugt i32 %a, %b
166  ret i1 %c
167}
168
169define i1 @zext_sext_eq(i8 %x, i8 %y) {
170; CHECK-LABEL: @zext_sext_eq(
171; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32
172; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32
173; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[A]], [[B]]
174; CHECK-NEXT:    ret i1 [[C]]
175;
176  %a = zext i8 %x to i32
177  %b = sext i8 %y to i32
178  %c = icmp eq i32 %a, %b
179  ret i1 %c
180}
181
182define i1 @zext_nneg_sext_eq(i8 %x, i8 %y) {
183; CHECK-LABEL: @zext_nneg_sext_eq(
184; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], [[Y:%.*]]
185; CHECK-NEXT:    ret i1 [[C]]
186;
187  %a = zext nneg i8 %x to i32
188  %b = sext i8 %y to i32
189  %c = icmp eq i32 %a, %b
190  ret i1 %c
191}
192
193
194define i1 @zext_sext_sle_op0_narrow(i8 %x, i16 %y) {
195; CHECK-LABEL: @zext_sext_sle_op0_narrow(
196; CHECK-NEXT:    [[A:%.*]] = zext i8 [[X:%.*]] to i32
197; CHECK-NEXT:    [[B:%.*]] = sext i16 [[Y:%.*]] to i32
198; CHECK-NEXT:    [[C:%.*]] = icmp sle i32 [[A]], [[B]]
199; CHECK-NEXT:    ret i1 [[C]]
200;
201  %a = zext i8 %x to i32
202  %b = sext i16 %y to i32
203  %c = icmp sle i32 %a, %b
204  ret i1 %c
205}
206
207
208define i1 @zext_nneg_sext_sle_op0_narrow(i8 %x, i16 %y) {
209; CHECK-LABEL: @zext_nneg_sext_sle_op0_narrow(
210; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[X:%.*]] to i16
211; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[Y:%.*]], [[TMP1]]
212; CHECK-NEXT:    ret i1 [[C]]
213;
214  %a = zext nneg i8 %x to i32
215  %b = sext i16 %y to i32
216  %c = icmp sle i32 %a, %b
217  ret i1 %c
218}
219
220define i1 @zext_sext_ule_op0_wide(i9 %x, i8 %y) {
221; CHECK-LABEL: @zext_sext_ule_op0_wide(
222; CHECK-NEXT:    [[A:%.*]] = zext i9 [[X:%.*]] to i32
223; CHECK-NEXT:    [[B:%.*]] = sext i8 [[Y:%.*]] to i32
224; CHECK-NEXT:    [[C:%.*]] = icmp ule i32 [[A]], [[B]]
225; CHECK-NEXT:    ret i1 [[C]]
226;
227  %a = zext i9 %x to i32
228  %b = sext i8 %y to i32
229  %c = icmp ule i32 %a, %b
230  ret i1 %c
231}
232
233define i1 @zext_nneg_sext_ule_op0_wide(i9 %x, i8 %y) {
234; CHECK-LABEL: @zext_nneg_sext_ule_op0_wide(
235; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i9
236; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[X:%.*]], [[TMP1]]
237; CHECK-NEXT:    ret i1 [[C]]
238;
239  %a = zext nneg i9 %x to i32
240  %b = sext i8 %y to i32
241  %c = icmp ule i32 %a, %b
242  ret i1 %c
243}
244
245define i1 @sext_zext_slt(i8 %x, i8 %y) {
246; CHECK-LABEL: @sext_zext_slt(
247; CHECK-NEXT:    [[A:%.*]] = sext i8 [[X:%.*]] to i32
248; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32
249; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[A]], [[B]]
250; CHECK-NEXT:    ret i1 [[C]]
251;
252  %a = sext i8 %x to i32
253  %b = zext i8 %y to i32
254  %c = icmp slt i32 %a, %b
255  ret i1 %c
256}
257
258
259define i1 @sext_zext_nneg_slt(i8 %x, i8 %y) {
260; CHECK-LABEL: @sext_zext_nneg_slt(
261; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[Y:%.*]]
262; CHECK-NEXT:    ret i1 [[C]]
263;
264  %a = sext i8 %x to i32
265  %b = zext nneg i8 %y to i32
266  %c = icmp slt i32 %a, %b
267  ret i1 %c
268}
269
270define i1 @sext_zext_ult(i8 %x, i8 %y) {
271; CHECK-LABEL: @sext_zext_ult(
272; CHECK-NEXT:    [[A:%.*]] = sext i8 [[X:%.*]] to i32
273; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32
274; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[A]], [[B]]
275; CHECK-NEXT:    ret i1 [[C]]
276;
277  %a = sext i8 %x to i32
278  %b = zext i8 %y to i32
279  %c = icmp ult i32 %a, %b
280  ret i1 %c
281}
282
283define i1 @sext_zext_nneg_ult(i8 %x, i8 %y) {
284; CHECK-LABEL: @sext_zext_nneg_ult(
285; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]
286; CHECK-NEXT:    ret i1 [[C]]
287;
288  %a = sext i8 %x to i32
289  %b = zext nneg i8 %y to i32
290  %c = icmp ult i32 %a, %b
291  ret i1 %c
292}
293
294define <2 x i1> @sext_zext_ne(<2 x i8> %x, <2 x i8> %y) {
295; CHECK-LABEL: @sext_zext_ne(
296; CHECK-NEXT:    [[A:%.*]] = sext <2 x i8> [[X:%.*]] to <2 x i32>
297; CHECK-NEXT:    [[B:%.*]] = zext <2 x i8> [[Y:%.*]] to <2 x i32>
298; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i32> [[A]], [[B]]
299; CHECK-NEXT:    ret <2 x i1> [[C]]
300;
301  %a = sext <2 x i8> %x to <2 x i32>
302  %b = zext <2 x i8> %y to <2 x i32>
303  %c = icmp ne <2 x i32> %a, %b
304  ret <2 x i1> %c
305}
306
307
308define <2 x i1> @sext_zext_nneg_ne(<2 x i8> %x, <2 x i8> %y) {
309; CHECK-LABEL: @sext_zext_nneg_ne(
310; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i8> [[X:%.*]], [[Y:%.*]]
311; CHECK-NEXT:    ret <2 x i1> [[C]]
312;
313  %a = sext <2 x i8> %x to <2 x i32>
314  %b = zext nneg <2 x i8> %y to <2 x i32>
315  %c = icmp ne <2 x i32> %a, %b
316  ret <2 x i1> %c
317}
318
319define i1 @sext_zext_sge_op0_narrow(i5 %x, i8 %y) {
320; CHECK-LABEL: @sext_zext_sge_op0_narrow(
321; CHECK-NEXT:    [[A:%.*]] = sext i5 [[X:%.*]] to i32
322; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32
323; CHECK-NEXT:    [[C:%.*]] = icmp sge i32 [[A]], [[B]]
324; CHECK-NEXT:    ret i1 [[C]]
325;
326  %a = sext i5 %x to i32
327  %b = zext i8 %y to i32
328  %c = icmp sge i32 %a, %b
329  ret i1 %c
330}
331
332
333define i1 @sext_zext_nneg_sge_op0_narrow(i5 %x, i8 %y) {
334; CHECK-LABEL: @sext_zext_nneg_sge_op0_narrow(
335; CHECK-NEXT:    [[TMP1:%.*]] = sext i5 [[X:%.*]] to i8
336; CHECK-NEXT:    [[C:%.*]] = icmp sle i8 [[Y:%.*]], [[TMP1]]
337; CHECK-NEXT:    ret i1 [[C]]
338;
339  %a = sext i5 %x to i32
340  %b = zext nneg i8 %y to i32
341  %c = icmp sge i32 %a, %b
342  ret i1 %c
343}
344
345define i1 @sext_zext_uge_op0_wide(i16 %x, i8 %y) {
346; CHECK-LABEL: @sext_zext_uge_op0_wide(
347; CHECK-NEXT:    [[A:%.*]] = sext i16 [[X:%.*]] to i32
348; CHECK-NEXT:    [[B:%.*]] = zext i8 [[Y:%.*]] to i32
349; CHECK-NEXT:    [[C:%.*]] = icmp uge i32 [[A]], [[B]]
350; CHECK-NEXT:    ret i1 [[C]]
351;
352  %a = sext i16 %x to i32
353  %b = zext i8 %y to i32
354  %c = icmp uge i32 %a, %b
355  ret i1 %c
356}
357
358
359define i1 @sext_zext_nneg_uge_op0_wide(i16 %x, i8 %y) {
360; CHECK-LABEL: @sext_zext_nneg_uge_op0_wide(
361; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i16
362; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[X:%.*]], [[TMP1]]
363; CHECK-NEXT:    ret i1 [[C]]
364;
365  %a = sext i16 %x to i32
366  %b = zext nneg i8 %y to i32
367  %c = icmp uge i32 %a, %b
368  ret i1 %c
369}
370
371define i1 @zext_sext_sgt_known_nonneg(i8 %x, i8 %y) {
372; CHECK-LABEL: @zext_sext_sgt_known_nonneg(
373; CHECK-NEXT:    [[N:%.*]] = udiv i8 127, [[X:%.*]]
374; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[N]], [[Y:%.*]]
375; CHECK-NEXT:    ret i1 [[C]]
376;
377  %n = udiv i8 127, %x
378  %a = zext i8 %n to i32
379  %b = sext i8 %y to i32
380  %c = icmp sgt i32 %a, %b
381  ret i1 %c
382}
383
384define i1 @zext_sext_ugt_known_nonneg(i8 %x, i8 %y) {
385; CHECK-LABEL: @zext_sext_ugt_known_nonneg(
386; CHECK-NEXT:    [[N:%.*]] = and i8 [[X:%.*]], 127
387; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[N]], [[Y:%.*]]
388; CHECK-NEXT:    ret i1 [[C]]
389;
390  %n = and i8 %x, 127
391  %a = zext i8 %n to i32
392  %b = sext i8 %y to i32
393  %c = icmp ugt i32 %a, %b
394  ret i1 %c
395}
396
397define i1 @zext_sext_eq_known_nonneg(i8 %x, i8 %y) {
398; CHECK-LABEL: @zext_sext_eq_known_nonneg(
399; CHECK-NEXT:    [[N:%.*]] = lshr i8 [[X:%.*]], 1
400; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[N]], [[Y:%.*]]
401; CHECK-NEXT:    ret i1 [[C]]
402;
403  %n = lshr i8 %x, 1
404  %a = zext i8 %n to i32
405  %b = sext i8 %y to i32
406  %c = icmp eq i32 %a, %b
407  ret i1 %c
408}
409
410define i1 @zext_sext_sle_known_nonneg_op0_narrow(i8 %x, i16 %y) {
411; CHECK-LABEL: @zext_sext_sle_known_nonneg_op0_narrow(
412; CHECK-NEXT:    [[N:%.*]] = and i8 [[X:%.*]], 12
413; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i8 [[N]] to i16
414; CHECK-NEXT:    [[C:%.*]] = icmp sge i16 [[Y:%.*]], [[TMP1]]
415; CHECK-NEXT:    ret i1 [[C]]
416;
417  %n = and i8 %x, 12
418  %a = zext i8 %n to i32
419  %b = sext i16 %y to i32
420  %c = icmp sle i32 %a, %b
421  ret i1 %c
422}
423
424define i1 @zext_sext_ule_known_nonneg_op0_wide(i9 %x, i8 %y) {
425; CHECK-LABEL: @zext_sext_ule_known_nonneg_op0_wide(
426; CHECK-NEXT:    [[N:%.*]] = urem i9 [[X:%.*]], 254
427; CHECK-NEXT:    [[TMP1:%.*]] = sext i8 [[Y:%.*]] to i9
428; CHECK-NEXT:    [[C:%.*]] = icmp ule i9 [[N]], [[TMP1]]
429; CHECK-NEXT:    ret i1 [[C]]
430;
431  %n = urem i9 %x, 254
432  %a = zext i9 %n to i32
433  %b = sext i8 %y to i32
434  %c = icmp ule i32 %a, %b
435  ret i1 %c
436}
437
438define i1 @sext_zext_slt_known_nonneg(i8 %x, i8 %y) {
439; CHECK-LABEL: @sext_zext_slt_known_nonneg(
440; CHECK-NEXT:    [[N:%.*]] = and i8 [[Y:%.*]], 126
441; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], [[N]]
442; CHECK-NEXT:    ret i1 [[C]]
443;
444  %a = sext i8 %x to i32
445  %n = and i8 %y, 126
446  %b = zext i8 %n to i32
447  %c = icmp slt i32 %a, %b
448  ret i1 %c
449}
450
451define i1 @sext_zext_ult_known_nonneg(i8 %x, i8 %y) {
452; CHECK-LABEL: @sext_zext_ult_known_nonneg(
453; CHECK-NEXT:    [[N:%.*]] = lshr i8 [[Y:%.*]], 6
454; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], [[N]]
455; CHECK-NEXT:    ret i1 [[C]]
456;
457  %a = sext i8 %x to i32
458  %n = lshr i8 %y, 6
459  %b = zext i8 %n to i32
460  %c = icmp ult i32 %a, %b
461  ret i1 %c
462}
463
464define i1 @sext_zext_ne_known_nonneg(i8 %x, i8 %y) {
465; CHECK-LABEL: @sext_zext_ne_known_nonneg(
466; CHECK-NEXT:    [[N:%.*]] = udiv i8 [[Y:%.*]], 6
467; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], [[N]]
468; CHECK-NEXT:    ret i1 [[C]]
469;
470  %a = sext i8 %x to i32
471  %n = udiv i8 %y, 6
472  %b = zext i8 %n to i32
473  %c = icmp ne i32 %a, %b
474  ret i1 %c
475}
476
477define <2 x i1> @sext_zext_sge_known_nonneg_op0_narrow(<2 x i5> %x, <2 x i8> %y) {
478; CHECK-LABEL: @sext_zext_sge_known_nonneg_op0_narrow(
479; CHECK-NEXT:    [[N:%.*]] = mul nsw <2 x i8> [[Y:%.*]], [[Y]]
480; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i5> [[X:%.*]] to <2 x i8>
481; CHECK-NEXT:    [[C:%.*]] = icmp sle <2 x i8> [[N]], [[TMP1]]
482; CHECK-NEXT:    ret <2 x i1> [[C]]
483;
484  %a = sext <2 x i5> %x to <2 x i32>
485  %n = mul nsw <2 x i8> %y, %y
486  %b = zext <2 x i8> %n to <2 x i32>
487  %c = icmp sge <2 x i32> %a, %b
488  ret <2 x i1> %c
489}
490
491define i1 @sext_zext_uge_known_nonneg_op0_wide(i16 %x, i8 %y) {
492; CHECK-LABEL: @sext_zext_uge_known_nonneg_op0_wide(
493; CHECK-NEXT:    [[N:%.*]] = and i8 [[Y:%.*]], 12
494; CHECK-NEXT:    [[TMP1:%.*]] = zext nneg i8 [[N]] to i16
495; CHECK-NEXT:    [[C:%.*]] = icmp uge i16 [[X:%.*]], [[TMP1]]
496; CHECK-NEXT:    ret i1 [[C]]
497;
498  %a = sext i16 %x to i32
499  %n = and i8 %y, 12
500  %b = zext i8 %n to i32
501  %c = icmp uge i32 %a, %b
502  ret i1 %c
503}
504
505
506define i1 @zext_eq_sext(i1 %a, i1 %b) {
507; CHECK-LABEL: @zext_eq_sext(
508; CHECK-NEXT:    [[TMP1:%.*]] = or i1 [[A:%.*]], [[B:%.*]]
509; CHECK-NEXT:    [[TOBOOL4:%.*]] = xor i1 [[TMP1]], true
510; CHECK-NEXT:    ret i1 [[TOBOOL4]]
511;
512  %conv = zext i1 %a to i32
513  %conv3.neg = sext i1 %b to i32
514  %tobool4 = icmp eq i32 %conv, %conv3.neg
515  ret i1 %tobool4
516}
517
518define i1 @zext_eq_sext_fail_not_i1(i1 %a, i8 %b) {
519; CHECK-LABEL: @zext_eq_sext_fail_not_i1(
520; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[A:%.*]] to i32
521; CHECK-NEXT:    [[CONV3_NEG:%.*]] = sext i8 [[B:%.*]] to i32
522; CHECK-NEXT:    [[TOBOOL4:%.*]] = icmp eq i32 [[CONV]], [[CONV3_NEG]]
523; CHECK-NEXT:    ret i1 [[TOBOOL4]]
524;
525  %conv = zext i1 %a to i32
526  %conv3.neg = sext i8 %b to i32
527  %tobool4 = icmp eq i32 %conv, %conv3.neg
528  ret i1 %tobool4
529}
530
531define <2 x i1> @zext_ne_sext(<2 x i1> %a, <2 x i1> %b) {
532; CHECK-LABEL: @zext_ne_sext(
533; CHECK-NEXT:    [[TMP1:%.*]] = or <2 x i1> [[B:%.*]], [[A:%.*]]
534; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
535;
536  %conv = zext <2 x i1> %a to <2 x i8>
537  %conv3.neg = sext <2 x i1> %b to <2 x i8>
538  %tobool4 = icmp ne <2 x i8> %conv3.neg, %conv
539  ret <2 x i1> %tobool4
540}
541