1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" 4 5define i1 @f(i1 %x) { 6; CHECK-LABEL: @f( 7; CHECK-NEXT: ret i1 false 8; 9 %c = icmp eq ptr inttoptr (i32 1 to ptr), inttoptr (i32 2 to ptr) 10 %b = and i1 %x, %c 11 ret i1 %b 12} 13 14define i1 @f_logical(i1 %x) { 15; CHECK-LABEL: @f_logical( 16; CHECK-NEXT: ret i1 false 17; 18 %c = icmp eq ptr inttoptr (i32 1 to ptr), inttoptr (i32 2 to ptr) 19 %b = select i1 %x, i1 %c, i1 false 20 ret i1 %b 21} 22 23define i32 @g(i32 %x) { 24; CHECK-LABEL: @g( 25; CHECK-NEXT: ret i32 [[X:%.*]] 26; 27 %c = icmp eq ptr inttoptr (i32 1 to ptr), inttoptr (i32 2 to ptr) 28 %ext = zext i1 %c to i32 29 %b = add i32 %x, %ext 30 ret i32 %b 31} 32 33define i32 @h(i1 %A, i32 %B) { 34; CHECK-LABEL: @h( 35; CHECK-NEXT: EntryBlock: 36; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[B:%.*]], 2 37; CHECK-NEXT: [[OP:%.*]] = select i1 [[A:%.*]], i32 3, i32 [[TMP0]] 38; CHECK-NEXT: ret i32 [[OP]] 39; 40EntryBlock: 41 %cf = select i1 %A, i32 1, i32 %B 42 %op = add i32 2, %cf 43 ret i32 %op 44} 45 46define <4 x float> @h1(i1 %A, <4 x i32> %B) { 47; CHECK-LABEL: @h1( 48; CHECK-NEXT: EntryBlock: 49; CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[B:%.*]] to <4 x float> 50; CHECK-NEXT: [[BC:%.*]] = select i1 [[A:%.*]], <4 x float> splat (float 0x36A0000000000000), <4 x float> [[TMP0]] 51; CHECK-NEXT: ret <4 x float> [[BC]] 52; 53EntryBlock: 54 %cf = select i1 %A, <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> %B 55 %bc = bitcast <4 x i32> %cf to <4 x float> 56 ret <4 x float> %bc 57} 58 59define <vscale x 4 x float> @h2(i1 %A, <vscale x 4 x i32> %B) { 60; CHECK-LABEL: @h2( 61; CHECK-NEXT: EntryBlock: 62; CHECK-NEXT: [[TMP0:%.*]] = bitcast <vscale x 4 x i32> [[B:%.*]] to <vscale x 4 x float> 63; CHECK-NEXT: [[BC:%.*]] = select i1 [[A:%.*]], <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> [[TMP0]] 64; CHECK-NEXT: ret <vscale x 4 x float> [[BC]] 65; 66EntryBlock: 67 %cf = select i1 %A, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %B 68 %bc = bitcast <vscale x 4 x i32> %cf to <vscale x 4 x float> 69 ret <vscale x 4 x float> %bc 70} 71 72define <vscale x 2 x i64> @h3(i1 %A, <vscale x 4 x i32> %B) { 73; CHECK-LABEL: @h3( 74; CHECK-NEXT: EntryBlock: 75; CHECK-NEXT: [[CF:%.*]] = select i1 [[A:%.*]], <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> [[B:%.*]] 76; CHECK-NEXT: [[BC:%.*]] = bitcast <vscale x 4 x i32> [[CF]] to <vscale x 2 x i64> 77; CHECK-NEXT: ret <vscale x 2 x i64> [[BC]] 78; 79EntryBlock: 80 %cf = select i1 %A, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %B 81 %bc = bitcast <vscale x 4 x i32> %cf to <vscale x 2 x i64> 82 ret <vscale x 2 x i64> %bc 83 84} 85 86