xref: /llvm-project/llvm/test/Transforms/InstCombine/ctpop.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -S -passes=instcombine | FileCheck %s
3
4declare i32 @llvm.ctpop.i32(i32)
5declare i64 @llvm.ctpop.i64(i64)
6declare i8 @llvm.ctpop.i8(i8)
7declare i7 @llvm.ctpop.i7(i7)
8declare i1 @llvm.ctpop.i1(i1)
9declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
10declare void @llvm.assume(i1)
11declare void @use(i32)
12
13define i1 @test1(i32 %arg) {
14; CHECK-LABEL: @test1(
15; CHECK-NEXT:    ret i1 false
16;
17  %and = and i32 %arg, 15
18  %cnt = call i32 @llvm.ctpop.i32(i32 %and)
19  %res = icmp eq i32 %cnt, 9
20  ret i1 %res
21}
22
23define i1 @test2(i32 %arg) {
24; CHECK-LABEL: @test2(
25; CHECK-NEXT:    ret i1 false
26;
27  %and = and i32 %arg, 1
28  %cnt = call i32 @llvm.ctpop.i32(i32 %and)
29  %res = icmp eq i32 %cnt, 2
30  ret i1 %res
31}
32
33define i1 @test3(i32 %arg) {
34; CHECK-LABEL: @test3(
35; CHECK-NEXT:    [[ASSUME:%.*]] = icmp eq i32 [[ARG:%.*]], 0
36; CHECK-NEXT:    call void @llvm.assume(i1 [[ASSUME]])
37; CHECK-NEXT:    ret i1 false
38;
39  ;; Use an assume to make all the bits known without triggering constant
40  ;; folding.  This is trying to hit a corner case where we have to avoid
41  ;; taking the log of 0.
42  %assume = icmp eq i32 %arg, 0
43  call void @llvm.assume(i1 %assume)
44  %cnt = call i32 @llvm.ctpop.i32(i32 %arg)
45  %res = icmp eq i32 %cnt, 2
46  ret i1 %res
47}
48
49; Negative test for when we know nothing
50define i1 @test4(i8 %arg) {
51; CHECK-LABEL: @test4(
52; CHECK-NEXT:    [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[ARG:%.*]])
53; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[CNT]], 2
54; CHECK-NEXT:    ret i1 [[RES]]
55;
56  %cnt = call i8 @llvm.ctpop.i8(i8 %arg)
57  %res = icmp eq i8 %cnt, 2
58  ret i1 %res
59}
60
61; Test when the number of possible known bits isn't one less than a power of 2
62; and the compare value is greater but less than the next power of 2.
63define i1 @test5(i32 %arg) {
64; CHECK-LABEL: @test5(
65; CHECK-NEXT:    ret i1 false
66;
67  %and = and i32 %arg, 3
68  %cnt = call i32 @llvm.ctpop.i32(i32 %and)
69  %res = icmp eq i32 %cnt, 3
70  ret i1 %res
71}
72
73; Test when the number of possible known bits isn't one less than a power of 2
74; and the compare value is greater but less than the next power of 2.
75define <2 x i1> @test5vec(<2 x i32> %arg) {
76; CHECK-LABEL: @test5vec(
77; CHECK-NEXT:    ret <2 x i1> zeroinitializer
78;
79  %and = and <2 x i32> %arg, <i32 3, i32 3>
80  %cnt = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %and)
81  %res = icmp eq <2 x i32> %cnt, <i32 3, i32 3>
82  ret <2 x i1> %res
83}
84
85; No intrinsic or range needed - ctpop of bool bit is the bit itself.
86
87define i1 @test6(i1 %arg) {
88; CHECK-LABEL: @test6(
89; CHECK-NEXT:    ret i1 [[ARG:%.*]]
90;
91  %cnt = call i1 @llvm.ctpop.i1(i1 %arg)
92  ret i1 %cnt
93}
94
95define i8 @mask_one_bit(i8 %x) {
96; CHECK-LABEL: @mask_one_bit(
97; CHECK-NEXT:    [[A:%.*]] = lshr i8 [[X:%.*]], 4
98; CHECK-NEXT:    [[R:%.*]] = and i8 [[A]], 1
99; CHECK-NEXT:    ret i8 [[R]]
100;
101  %a = and i8 %x, 16
102  %r = call i8 @llvm.ctpop.i8(i8 %a)
103  ret i8 %r
104}
105
106define <2 x i32> @mask_one_bit_splat(<2 x i32> %x, ptr %p) {
107; CHECK-LABEL: @mask_one_bit_splat(
108; CHECK-NEXT:    [[A:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 2048)
109; CHECK-NEXT:    store <2 x i32> [[A]], ptr [[P:%.*]], align 8
110; CHECK-NEXT:    [[R:%.*]] = lshr exact <2 x i32> [[A]], splat (i32 11)
111; CHECK-NEXT:    ret <2 x i32> [[R]]
112;
113  %a = and <2 x i32> %x, <i32 2048, i32 2048>
114  store <2 x i32> %a, ptr %p
115  %r = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
116  ret <2 x i32> %r
117}
118
119define i32 @_parity_of_not(i32 %x) {
120; CHECK-LABEL: @_parity_of_not(
121; CHECK-NEXT:    [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
122; CHECK-NEXT:    [[R:%.*]] = and i32 [[TMP1]], 1
123; CHECK-NEXT:    ret i32 [[R]]
124;
125  %neg = xor i32 %x, -1
126  %cnt = tail call i32 @llvm.ctpop.i32(i32 %neg)
127  %r = and i32 %cnt, 1
128  ret i32 %r
129}
130
131; Negative test - need even # of bits in type.
132
133define i7 @_parity_of_not_odd_type(i7 %x) {
134; CHECK-LABEL: @_parity_of_not_odd_type(
135; CHECK-NEXT:    [[NEG:%.*]] = xor i7 [[X:%.*]], -1
136; CHECK-NEXT:    [[CNT:%.*]] = tail call range(i7 0, 8) i7 @llvm.ctpop.i7(i7 [[NEG]])
137; CHECK-NEXT:    [[R:%.*]] = and i7 [[CNT]], 1
138; CHECK-NEXT:    ret i7 [[R]]
139;
140  %neg = xor i7 %x, -1
141  %cnt = tail call i7 @llvm.ctpop.i7(i7 %neg)
142  %r = and i7 %cnt, 1
143  ret i7 %r
144}
145
146define <2 x i32> @_parity_of_not_vec(<2 x i32> %x) {
147; CHECK-LABEL: @_parity_of_not_vec(
148; CHECK-NEXT:    [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
149; CHECK-NEXT:    [[R:%.*]] = and <2 x i32> [[TMP1]], splat (i32 1)
150; CHECK-NEXT:    ret <2 x i32> [[R]]
151;
152  %neg = xor <2 x i32> %x, <i32 -1 ,i32 -1>
153  %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
154  %r = and <2 x i32> %cnt, <i32 1 ,i32 1>
155  ret <2 x i32> %r
156}
157
158define <2 x i32> @_parity_of_not_poison(<2 x i32> %x) {
159; CHECK-LABEL: @_parity_of_not_poison(
160; CHECK-NEXT:    [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
161; CHECK-NEXT:    [[R:%.*]] = and <2 x i32> [[TMP1]], splat (i32 1)
162; CHECK-NEXT:    ret <2 x i32> [[R]]
163;
164  %neg = xor <2 x i32> %x, <i32 poison ,i32 -1>
165  %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
166  %r = and <2 x i32> %cnt, <i32 1 ,i32 1>
167  ret <2 x i32> %r
168}
169
170define <2 x i32> @_parity_of_not_poison2(<2 x i32> %x) {
171; CHECK-LABEL: @_parity_of_not_poison2(
172; CHECK-NEXT:    [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
173; CHECK-NEXT:    [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 poison>
174; CHECK-NEXT:    ret <2 x i32> [[R]]
175;
176  %neg = xor <2 x i32> %x, <i32 -1 ,i32 -1>
177  %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %neg)
178  %r = and <2 x i32> %cnt, <i32 1 ,i32 poison>
179  ret <2 x i32> %r
180}
181
182; PR48999
183define i32 @ctpop_add(i32 %a, i32 %b) {
184; CHECK-LABEL: @ctpop_add(
185; CHECK-NEXT:    [[AND8:%.*]] = lshr i32 [[A:%.*]], 3
186; CHECK-NEXT:    [[CTPOP1:%.*]] = and i32 [[AND8]], 1
187; CHECK-NEXT:    [[AND2:%.*]] = lshr i32 [[B:%.*]], 1
188; CHECK-NEXT:    [[CTPOP2:%.*]] = and i32 [[AND2]], 1
189; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw i32 [[CTPOP1]], [[CTPOP2]]
190; CHECK-NEXT:    ret i32 [[RES]]
191;
192  %and8 = and i32 %a, 8
193  %ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %and8)
194  %and2 = and i32 %b, 2
195  %ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %and2)
196  %res = add i32 %ctpop1, %ctpop2
197  ret i32 %res
198}
199
200define i32 @ctpop_add_no_common_bits(i32 %a, i32 %b) {
201; CHECK-LABEL: @ctpop_add_no_common_bits(
202; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[B:%.*]], i32 16)
203; CHECK-NEXT:    [[RES:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
204; CHECK-NEXT:    ret i32 [[RES]]
205;
206  %shl16 = shl i32 %a, 16
207  %ctpop1 = tail call i32 @llvm.ctpop.i32(i32 %shl16)
208  %lshl16 = lshr i32 %b, 16
209  %ctpop2 = tail call i32 @llvm.ctpop.i32(i32 %lshl16)
210  %res = add i32 %ctpop1, %ctpop2
211  ret i32 %res
212}
213
214define <2 x i32> @ctpop_add_no_common_bits_vec(<2 x i32> %a, <2 x i32> %b) {
215; CHECK-LABEL: @ctpop_add_no_common_bits_vec(
216; CHECK-NEXT:    [[TMP1:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]], <2 x i32> splat (i32 16))
217; CHECK-NEXT:    [[RES:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
218; CHECK-NEXT:    ret <2 x i32> [[RES]]
219;
220  %shl16 = shl <2 x i32> %a, <i32 16, i32 16>
221  %ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
222  %lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
223  %ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
224  %res = add <2 x i32> %ctpop1, %ctpop2
225  ret <2 x i32> %res
226}
227
228define <2 x i32> @ctpop_add_no_common_bits_vec_use(<2 x i32> %a, <2 x i32> %b, ptr %p) {
229; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use(
230; CHECK-NEXT:    [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], splat (i32 16)
231; CHECK-NEXT:    [[CTPOP1:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]])
232; CHECK-NEXT:    [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], splat (i32 16)
233; CHECK-NEXT:    [[CTPOP2:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]])
234; CHECK-NEXT:    store <2 x i32> [[CTPOP2]], ptr [[P:%.*]], align 8
235; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
236; CHECK-NEXT:    ret <2 x i32> [[RES]]
237;
238  %shl16 = shl <2 x i32> %a, <i32 16, i32 16>
239  %ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
240  %lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
241  %ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
242  store <2 x i32> %ctpop2, ptr %p
243  %res = add <2 x i32> %ctpop1, %ctpop2
244  ret <2 x i32> %res
245}
246
247define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b, ptr %p) {
248; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use2(
249; CHECK-NEXT:    [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], splat (i32 16)
250; CHECK-NEXT:    [[CTPOP1:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]])
251; CHECK-NEXT:    store <2 x i32> [[CTPOP1]], ptr [[P:%.*]], align 8
252; CHECK-NEXT:    [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], splat (i32 16)
253; CHECK-NEXT:    [[CTPOP2:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]])
254; CHECK-NEXT:    [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
255; CHECK-NEXT:    ret <2 x i32> [[RES]]
256;
257  %shl16 = shl <2 x i32> %a, <i32 16, i32 16>
258  %ctpop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %shl16)
259  store <2 x i32> %ctpop1, ptr %p
260  %lshl16 = lshr <2 x i32> %b, <i32 16, i32 16>
261  %ctpop2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %lshl16)
262  %res = add <2 x i32> %ctpop1, %ctpop2
263  ret <2 x i32> %res
264}
265
266define i8 @ctpop_rotate_left(i8 %a, i8 %amt)  {
267; CHECK-LABEL: @ctpop_rotate_left(
268; CHECK-NEXT:    [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
269; CHECK-NEXT:    ret i8 [[RES]]
270;
271  %rotl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 %amt)
272  %res = tail call i8 @llvm.ctpop.i8(i8 %rotl)
273  ret i8 %res
274}
275
276define i8 @ctpop_rotate_right(i8 %a, i8 %amt)  {
277; CHECK-LABEL: @ctpop_rotate_right(
278; CHECK-NEXT:    [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
279; CHECK-NEXT:    ret i8 [[RES]]
280;
281  %rotr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 %amt)
282  %res = tail call i8 @llvm.ctpop.i8(i8 %rotr)
283  ret i8 %res
284}
285
286declare i8 @llvm.fshl.i8(i8, i8, i8)
287declare i8 @llvm.fshr.i8(i8, i8, i8)
288
289define i8 @sub_ctpop(i8 %a)  {
290; CHECK-LABEL: @sub_ctpop(
291; CHECK-NEXT:    [[TMP1:%.*]] = xor i8 [[A:%.*]], -1
292; CHECK-NEXT:    [[RES:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
293; CHECK-NEXT:    ret i8 [[RES]]
294;
295  %cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
296  %res = sub i8 8, %cnt
297  ret i8 %res
298}
299
300define i8 @sub_ctpop_wrong_cst(i8 %a)  {
301; CHECK-LABEL: @sub_ctpop_wrong_cst(
302; CHECK-NEXT:    [[CNT:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
303; CHECK-NEXT:    [[RES:%.*]] = sub nsw i8 5, [[CNT]]
304; CHECK-NEXT:    ret i8 [[RES]]
305;
306  %cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
307  %res = sub i8 5, %cnt
308  ret i8 %res
309}
310
311define i8 @sub_ctpop_unknown(i8 %a, i8 %b)  {
312; CHECK-LABEL: @sub_ctpop_unknown(
313; CHECK-NEXT:    [[CNT:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
314; CHECK-NEXT:    [[RES:%.*]] = sub i8 [[B:%.*]], [[CNT]]
315; CHECK-NEXT:    ret i8 [[RES]]
316;
317  %cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
318  %res = sub i8 %b, %cnt
319  ret i8 %res
320}
321
322define <2 x i32> @sub_ctpop_vec(<2 x i32> %a) {
323; CHECK-LABEL: @sub_ctpop_vec(
324; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], splat (i32 -1)
325; CHECK-NEXT:    [[RES:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
326; CHECK-NEXT:    ret <2 x i32> [[RES]]
327;
328  %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
329  %res = sub <2 x i32> <i32 32, i32 32>, %cnt
330  ret <2 x i32> %res
331}
332
333define <2 x i32> @sub_ctpop_vec_extra_use(<2 x i32> %a, ptr %p) {
334; CHECK-LABEL: @sub_ctpop_vec_extra_use(
335; CHECK-NEXT:    [[CNT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[A:%.*]])
336; CHECK-NEXT:    store <2 x i32> [[CNT]], ptr [[P:%.*]], align 8
337; CHECK-NEXT:    [[RES:%.*]] = sub nuw nsw <2 x i32> splat (i32 32), [[CNT]]
338; CHECK-NEXT:    ret <2 x i32> [[RES]]
339;
340  %cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
341  store <2 x i32> %cnt, ptr %p
342  %res = sub <2 x i32> <i32 32, i32 32>, %cnt
343  ret <2 x i32> %res
344}
345
346define i32 @zext_ctpop(i16 %x) {
347; CHECK-LABEL: @zext_ctpop(
348; CHECK-NEXT:    [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.ctpop.i16(i16 [[X:%.*]])
349; CHECK-NEXT:    [[P:%.*]] = zext nneg i16 [[TMP1]] to i32
350; CHECK-NEXT:    ret i32 [[P]]
351;
352  %z = zext i16 %x to i32
353  %p = call i32 @llvm.ctpop.i32(i32 %z)
354  ret i32 %p
355}
356
357define <2 x i32> @zext_ctpop_vec(<2 x i7> %x) {
358; CHECK-LABEL: @zext_ctpop_vec(
359; CHECK-NEXT:    [[TMP1:%.*]] = call range(i7 0, 8) <2 x i7> @llvm.ctpop.v2i7(<2 x i7> [[X:%.*]])
360; CHECK-NEXT:    [[P:%.*]] = zext nneg <2 x i7> [[TMP1]] to <2 x i32>
361; CHECK-NEXT:    ret <2 x i32> [[P]]
362;
363  %z = zext <2 x i7> %x to <2 x i32>
364  %p = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %z)
365  ret <2 x i32> %p
366}
367
368define i32 @zext_ctpop_extra_use(i16 %x, ptr %q) {
369; CHECK-LABEL: @zext_ctpop_extra_use(
370; CHECK-NEXT:    [[Z:%.*]] = zext i16 [[X:%.*]] to i32
371; CHECK-NEXT:    store i32 [[Z]], ptr [[Q:%.*]], align 4
372; CHECK-NEXT:    [[P:%.*]] = call range(i32 0, 17) i32 @llvm.ctpop.i32(i32 [[Z]])
373; CHECK-NEXT:    ret i32 [[P]]
374;
375  %z = zext i16 %x to i32
376  store i32 %z, ptr %q
377  %p = call i32 @llvm.ctpop.i32(i32 %z)
378  ret i32 %p
379}
380
381define i32 @parity_xor(i32 %arg, i32 %arg1) {
382; CHECK-LABEL: @parity_xor(
383; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG:%.*]]
384; CHECK-NEXT:    [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
385; CHECK-NEXT:    [[I4:%.*]] = and i32 [[TMP2]], 1
386; CHECK-NEXT:    ret i32 [[I4]]
387;
388  %i = tail call i32 @llvm.ctpop.i32(i32 %arg)
389  %i2 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
390  %i3 = xor i32 %i2, %i
391  %i4 = and i32 %i3, 1
392  ret i32 %i4
393}
394
395define i32 @parity_xor_trunc(i64 %arg, i64 %arg1) {
396; CHECK-LABEL: @parity_xor_trunc(
397; CHECK-NEXT:    [[TMP1:%.*]] = xor i64 [[ARG1:%.*]], [[ARG:%.*]]
398; CHECK-NEXT:    [[TMP2:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[TMP1]])
399; CHECK-NEXT:    [[I4:%.*]] = trunc nuw nsw i64 [[TMP2]] to i32
400; CHECK-NEXT:    [[I5:%.*]] = and i32 [[I4]], 1
401; CHECK-NEXT:    ret i32 [[I5]]
402;
403  %i = tail call i64 @llvm.ctpop.i64(i64 %arg)
404  %i2 = tail call i64 @llvm.ctpop.i64(i64 %arg1)
405  %i3 = xor i64 %i2, %i
406  %i4 = trunc i64 %i3 to i32
407  %i5 = and i32 %i4, 1
408  ret i32 %i5
409}
410
411define <2 x i32> @parity_xor_vec(<2 x i32> %arg, <2 x i32> %arg1) {
412; CHECK-LABEL: @parity_xor_vec(
413; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i32> [[ARG1:%.*]], [[ARG:%.*]]
414; CHECK-NEXT:    [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
415; CHECK-NEXT:    [[I4:%.*]] = and <2 x i32> [[TMP2]], splat (i32 1)
416; CHECK-NEXT:    ret <2 x i32> [[I4]]
417;
418  %i = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %arg)
419  %i2 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %arg1)
420  %i3 = xor <2 x i32> %i2, %i
421  %i4 = and <2 x i32> %i3, <i32 1, i32 1>
422  ret <2 x i32> %i4
423}
424
425define i32 @parity_xor_wrong_cst(i32 %arg, i32 %arg1) {
426; CHECK-LABEL: @parity_xor_wrong_cst(
427; CHECK-NEXT:    [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG:%.*]])
428; CHECK-NEXT:    [[I2:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]])
429; CHECK-NEXT:    [[I3:%.*]] = xor i32 [[I2]], [[I]]
430; CHECK-NEXT:    [[I4:%.*]] = and i32 [[I3]], 3
431; CHECK-NEXT:    ret i32 [[I4]]
432;
433  %i = tail call i32 @llvm.ctpop.i32(i32 %arg)
434  %i2 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
435  %i3 = xor i32 %i2, %i
436  %i4 = and i32 %i3, 3
437  ret i32 %i4
438}
439
440define i32 @parity_xor_extra_use(i32 %arg, i32 %arg1) {
441; CHECK-LABEL: @parity_xor_extra_use(
442; CHECK-NEXT:    [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG:%.*]])
443; CHECK-NEXT:    [[I2:%.*]] = and i32 [[I]], 1
444; CHECK-NEXT:    tail call void @use(i32 [[I2]])
445; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG]]
446; CHECK-NEXT:    [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
447; CHECK-NEXT:    [[I5:%.*]] = and i32 [[TMP2]], 1
448; CHECK-NEXT:    ret i32 [[I5]]
449;
450  %i = tail call i32 @llvm.ctpop.i32(i32 %arg)
451  %i2 = and i32 %i, 1
452  tail call void @use(i32 %i2)
453  %i3 = tail call i32 @llvm.ctpop.i32(i32 %arg1)
454  %i4 = and i32 %i3, 1
455  %i5 = xor i32 %i4, %i2
456  ret i32 %i5
457}
458
459define i32 @parity_xor_extra_use2(i32 %arg, i32 %arg1) {
460; CHECK-LABEL: @parity_xor_extra_use2(
461; CHECK-NEXT:    [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]])
462; CHECK-NEXT:    [[I2:%.*]] = and i32 [[I]], 1
463; CHECK-NEXT:    tail call void @use(i32 [[I2]])
464; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[ARG1]], [[ARG:%.*]]
465; CHECK-NEXT:    [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
466; CHECK-NEXT:    [[I5:%.*]] = and i32 [[TMP2]], 1
467; CHECK-NEXT:    ret i32 [[I5]]
468;
469  %i = tail call i32 @llvm.ctpop.i32(i32 %arg1)
470  %i2 = and i32 %i, 1
471  tail call void @use(i32 %i2)
472  %i3 = tail call i32 @llvm.ctpop.i32(i32 %arg)
473  %i4 = and i32 %i3, 1
474  %i5 = xor i32 %i2, %i4
475  ret i32 %i5
476}
477
478define i32 @select_ctpop_zero(i32 %x) {
479; CHECK-LABEL: @select_ctpop_zero(
480; CHECK-NEXT:    [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
481; CHECK-NEXT:    ret i32 [[CTPOP]]
482;
483  %ctpop = call i32 @llvm.ctpop.i32(i32 %x)
484  %cmp = icmp eq i32 %x, 0
485  %res = select i1 %cmp, i32 0, i32 %ctpop
486  ret i32 %res
487}
488
489define i32 @ctpop_non_zero(i32 range(i32 1, 255) %x) {
490; CHECK-LABEL: @ctpop_non_zero(
491; CHECK-NEXT:    [[CTPOP:%.*]] = call range(i32 1, 9) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
492; CHECK-NEXT:    ret i32 [[CTPOP]]
493;
494  %ctpop = call i32 @llvm.ctpop.i32(i32 %x)
495  ret i32 %ctpop
496}
497
498define i32 @ctpop_non_zero_with_existing_range_attr(i32 range(i32 1, 255) %x) {
499; CHECK-LABEL: @ctpop_non_zero_with_existing_range_attr(
500; CHECK-NEXT:    [[CTPOP:%.*]] = call range(i32 1, 9) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
501; CHECK-NEXT:    ret i32 [[CTPOP]]
502;
503  %ctpop = call range(i32 0, 9) i32 @llvm.ctpop.i32(i32 %x)
504  ret i32 %ctpop
505}
506