1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s 3 4define void @non_pow2_size(i177 %X) { 5; CHECK-LABEL: define void @non_pow2_size 6; CHECK-SAME: (i177 [[X:%.*]]) { 7; CHECK-NEXT: [[A:%.*]] = alloca i177, align 8 8; CHECK-NEXT: [[L1:%.*]] = load i177, ptr [[A]], align 8 9; CHECK-NEXT: store i177 [[X]], ptr [[A]], align 8 10; CHECK-NEXT: ret void 11; 12 %A = alloca i177, align 1 13 %L1 = load i177, ptr %A, align 1 14 store i177 %X, ptr %A, align 1 15 ret void 16} 17 18; TODO: For non-byte-sized vectors, current implementation assumes there is 19; padding to the next byte boundary between elements. 20@vector_i4 = constant [16 x <2 x i4>] zeroinitializer, align 8 21 22define void @load_vector_i4(i4 %X) { 23; CHECK-LABEL: define void @load_vector_i4 24; CHECK-SAME: (i4 [[X:%.*]]) { 25; CHECK-NEXT: [[PTR_0:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 1 26; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 2 27; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 4 28; CHECK-NEXT: [[PTR_3:%.*]] = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 8 29; CHECK-NEXT: [[RES_0:%.*]] = load i4, ptr [[PTR_0]], align 1 30; CHECK-NEXT: [[RES_1:%.*]] = load i4, ptr [[PTR_1]], align 2 31; CHECK-NEXT: [[RES_2:%.*]] = load i4, ptr [[PTR_2]], align 4 32; CHECK-NEXT: [[RES_3:%.*]] = load i4, ptr [[PTR_3]], align 8 33; CHECK-NEXT: store i4 [[X]], ptr [[PTR_0]], align 1 34; CHECK-NEXT: store i4 [[X]], ptr [[PTR_1]], align 2 35; CHECK-NEXT: store i4 [[X]], ptr [[PTR_2]], align 4 36; CHECK-NEXT: store i4 [[X]], ptr [[PTR_3]], align 8 37; CHECK-NEXT: ret void 38; 39 %ptr.0 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 1 40 %ptr.1 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 2 41 %ptr.2 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 4 42 %ptr.3 = getelementptr [16 x <2 x i4>], ptr @vector_i4, i64 0, i64 8 43 44 %res.0 = load i4, ptr %ptr.0, align 1 45 %res.1 = load i4, ptr %ptr.1, align 1 46 %res.2 = load i4, ptr %ptr.2, align 1 47 %res.3 = load i4, ptr %ptr.3, align 1 48 49 store i4 %X, ptr %ptr.0, align 1 50 store i4 %X, ptr %ptr.1, align 1 51 store i4 %X, ptr %ptr.2, align 1 52 store i4 %X, ptr %ptr.3, align 1 53 54 ret void 55} 56