xref: /llvm-project/llvm/test/Transforms/InferAddressSpaces/AMDGPU/intrinsics.ll (revision 92ee60b66f581fdd919315da5c6ae631e581b021)
1; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
2
3; CHECK-LABEL: @objectsize_group_to_flat_i32(
4; CHECK: %val = call i32 @llvm.objectsize.i32.p3(ptr addrspace(3) %group.ptr, i1 true, i1 false, i1 false)
5define i32 @objectsize_group_to_flat_i32(ptr addrspace(3) %group.ptr) #0 {
6  %cast = addrspacecast ptr addrspace(3) %group.ptr to ptr
7  %val = call i32 @llvm.objectsize.i32.p0(ptr %cast, i1 true, i1 false, i1 false)
8  ret i32 %val
9}
10
11; CHECK-LABEL: @objectsize_global_to_flat_i64(
12; CHECK: %val = call i64 @llvm.objectsize.i64.p3(ptr addrspace(3) %global.ptr, i1 true, i1 false, i1 false)
13define i64 @objectsize_global_to_flat_i64(ptr addrspace(3) %global.ptr) #0 {
14  %cast = addrspacecast ptr addrspace(3) %global.ptr to ptr
15  %val = call i64 @llvm.objectsize.i64.p0(ptr %cast, i1 true, i1 false, i1 false)
16  ret i64 %val
17}
18
19declare i32 @llvm.objectsize.i32.p0(ptr, i1, i1, i1) #1
20declare i64 @llvm.objectsize.i64.p0(ptr, i1, i1, i1) #1
21
22attributes #0 = { nounwind }
23attributes #1 = { nounwind readnone }
24attributes #2 = { nounwind argmemonly }
25