xref: /llvm-project/llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll (revision 2d69827c5c754f0eca98e497ecf0e52ed54b4fd3)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
3
4; Addrspacecasts or bitcasts must be inserted after the instructions that define their uses.
5
6%struct.s0 = type { ptr, i32 }
7%struct.s1 = type { %struct.s0 }
8
9@global0 = protected addrspace(4) externally_initialized global %struct.s1 zeroinitializer
10
11declare i32 @func(ptr %arg)
12
13define i32 @addrspacecast_insert_pos_assert() {
14; CHECK-LABEL: @addrspacecast_insert_pos_assert(
15; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
16; CHECK-NEXT:    [[LOAD0:%.*]] = load ptr, ptr addrspace(4) @global0, align 8
17; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[LOAD0]] to ptr addrspace(1)
18; CHECK-NEXT:    [[TMP2:%.*]] = addrspacecast ptr addrspace(1) [[TMP1]] to ptr
19; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, ptr addrspace(5) [[ALLOCA]], align 4
20; CHECK-NEXT:    [[SEXT:%.*]] = sext i32 [[LOAD1]] to i64
21; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[SEXT]]
22; CHECK-NEXT:    [[CALL:%.*]] = call i32 @func(ptr [[GEP]])
23; CHECK-NEXT:    ret i32 [[CALL]]
24;
25  %alloca = alloca i32, align 4, addrspace(5)
26  %cast = addrspacecast ptr addrspace(5) %alloca to ptr
27  %load0 = load ptr, ptr addrspace(4) @global0
28  %load1 = load i32, ptr %cast
29  %sext = sext i32 %load1 to i64
30  %gep = getelementptr inbounds i32, ptr %load0, i64 %sext
31  %call = call i32 @func(ptr %gep)
32  ret i32 %call
33}
34
35define void @bitcast_insert_pos_assert_1() {
36; CHECK-LABEL: @bitcast_insert_pos_assert_1(
37; CHECK-NEXT:  bb.0:
38; CHECK-NEXT:    [[ASC0:%.*]] = addrspacecast ptr addrspace(5) undef to ptr
39; CHECK-NEXT:    [[PTI0:%.*]] = ptrtoint ptr [[ASC0]] to i64
40; CHECK-NEXT:    br label [[BB_1:%.*]]
41; CHECK:       bb.1:
42; CHECK-NEXT:    br i1 undef, label [[BB_2:%.*]], label [[BB_3:%.*]]
43; CHECK:       bb.2:
44; CHECK-NEXT:    [[LOAD0:%.*]] = load ptr, ptr addrspace(5) undef, align 8
45; CHECK-NEXT:    br label [[BB_3]]
46; CHECK:       bb.3:
47; CHECK-NEXT:    ret void
48;
49bb.0:
50  %asc0 = addrspacecast ptr addrspace(5) undef to ptr
51  %pti0 = ptrtoint ptr %asc0 to i64
52  br label %bb.1
53
54bb.1:
55  br i1 undef, label %bb.2, label %bb.3
56
57bb.2:
58  %pti1 = ptrtoint ptr %asc0 to i64
59  %itp0 = inttoptr i64 %pti1 to ptr
60  %load0 = load ptr, ptr %itp0, align 8
61  br label %bb.3
62
63bb.3:
64  ret void
65}
66
67define void @bitcast_insert_pos_assert_2() {
68; CHECK-LABEL: @bitcast_insert_pos_assert_2(
69; CHECK-NEXT:    [[ALLOCA0:%.*]] = alloca [[STRUCT_S1:%.*]], align 16, addrspace(5)
70; CHECK-NEXT:    [[ASC0:%.*]] = addrspacecast ptr addrspace(5) [[ALLOCA0]] to ptr
71; CHECK-NEXT:    [[PTI0:%.*]] = ptrtoint ptr [[ASC0]] to i64
72; CHECK-NEXT:    [[ITP0:%.*]] = inttoptr i64 [[PTI0]] to ptr
73; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr addrspace(5) [[ALLOCA0]] to ptr
74; CHECK-NEXT:    [[GEP0:%.*]] = getelementptr i64, ptr [[TMP1]], i64 1
75; CHECK-NEXT:    ret void
76;
77  %alloca0 = alloca %struct.s1, align 16, addrspace(5)
78  %asc0 = addrspacecast ptr addrspace(5) %alloca0 to ptr
79  %pti0 = ptrtoint ptr %asc0 to i64
80  %itp0 = inttoptr i64 %pti0 to ptr
81  %itp1 = ptrtoint ptr %asc0 to i64
82  %itp2 = inttoptr i64 %itp1 to ptr
83  %gep0 = getelementptr i64, ptr %itp2, i64 1
84  ret void
85}
86