xref: /llvm-project/llvm/test/Transforms/IndVarSimplify/negative_ranges.ll (revision 864bb84a427de367528d15270790dd152871daf2) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -passes=indvars -S < %s | FileCheck %s
3
4declare i1 @cond()
5
6define i32 @test_01(ptr %p, ptr %s) {
7; CHECK-LABEL: @test_01(
8; CHECK-NEXT:  entry:
9; CHECK-NEXT:    [[START:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG0:![0-9]+]]
10; CHECK-NEXT:    [[END:%.*]] = load i32, ptr [[S:%.*]], align 4, !range [[RNG0]]
11; CHECK-NEXT:    br label [[LOOP:%.*]]
12; CHECK:       loop:
13; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
14; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[IV]], [[END]]
15; CHECK-NEXT:    br i1 [[C1]], label [[GUARDED:%.*]], label [[SIDE_EXIT:%.*]]
16; CHECK:       guarded:
17; CHECK-NEXT:    br i1 true, label [[BACKEDGE]], label [[SIDE_EXIT]]
18; CHECK:       backedge:
19; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
20; CHECK-NEXT:    [[LOOP_COND:%.*]] = call i1 @cond()
21; CHECK-NEXT:    br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
22; CHECK:       exit:
23; CHECK-NEXT:    ret i32 1
24; CHECK:       side_exit:
25; CHECK-NEXT:    ret i32 0
26;
27entry:
28  %start = load i32, ptr %p, !range !0
29  %end = load i32, ptr %s, !range !0
30  br label %loop
31
32loop:
33  %iv = phi i32 [%start, %entry], [%iv.next, %backedge]
34  %c1 = icmp slt i32 %iv, %end
35  br i1 %c1, label %guarded, label %side_exit
36
37guarded:
38  %c2 = icmp ult i32 %iv, %end
39  br i1 %c2, label %backedge, label %side_exit
40
41backedge:
42  %iv.next = add nuw nsw i32 %iv, 1
43  %loop.cond = call i1 @cond()
44  br i1 %loop.cond, label %loop, label %exit
45
46exit:
47  ret i32 1
48
49side_exit:
50  ret i32 0
51}
52
53define i32 @test_02(ptr %p, ptr %s) {
54; CHECK-LABEL: @test_02(
55; CHECK-NEXT:  entry:
56; CHECK-NEXT:    [[START:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG0]]
57; CHECK-NEXT:    [[END:%.*]] = load i32, ptr [[S:%.*]], align 4, !range [[RNG0]]
58; CHECK-NEXT:    br label [[LOOP:%.*]]
59; CHECK:       loop:
60; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ [[START]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
61; CHECK-NEXT:    [[C1:%.*]] = icmp ult i32 [[IV]], [[END]]
62; CHECK-NEXT:    br i1 [[C1]], label [[GUARDED:%.*]], label [[SIDE_EXIT:%.*]]
63; CHECK:       guarded:
64; CHECK-NEXT:    br i1 true, label [[BACKEDGE]], label [[SIDE_EXIT]]
65; CHECK:       backedge:
66; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
67; CHECK-NEXT:    [[LOOP_COND:%.*]] = call i1 @cond()
68; CHECK-NEXT:    br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
69; CHECK:       exit:
70; CHECK-NEXT:    ret i32 1
71; CHECK:       side_exit:
72; CHECK-NEXT:    ret i32 0
73;
74entry:
75  %start = load i32, ptr %p, !range !0
76  %end = load i32, ptr %s, !range !0
77  br label %loop
78
79loop:
80  %iv = phi i32 [%start, %entry], [%iv.next, %backedge]
81  %c1 = icmp ult i32 %iv, %end
82  br i1 %c1, label %guarded, label %side_exit
83
84guarded:
85  %c2 = icmp slt i32 %iv, %end
86  br i1 %c2, label %backedge, label %side_exit
87
88backedge:
89  %iv.next = add nuw nsw i32 %iv, 1
90  %loop.cond = call i1 @cond()
91  br i1 %loop.cond, label %loop, label %exit
92
93exit:
94  ret i32 1
95
96side_exit:
97  ret i32 0
98}
99
100!0 = !{i32 -1000, i32 0}
101