1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes='loop(indvars,loop-deletion)' -verify-scev -S %s | FileCheck %s 3 4; Make sure indvarsimplify properly forgets the exit value %p.2.lcssa phi after 5; modifying it. Loop deletion is required to show the incorrect use of the cached 6; SCEV value. 7 8define void @test(i1 %c) { 9; CHECK-LABEL: @test( 10; CHECK-NEXT: entry: 11; CHECK-NEXT: br label [[HEADER_1:%.*]] 12; CHECK: header.1.loopexit: 13; CHECK-NEXT: br label [[HEADER_1_BACKEDGE:%.*]] 14; CHECK: header.1: 15; CHECK-NEXT: br label [[HEADER_2:%.*]] 16; CHECK: header.2: 17; CHECK-NEXT: br i1 [[C:%.*]], label [[LATCH_1:%.*]], label [[LATCH_2:%.*]] 18; CHECK: latch.1: 19; CHECK-NEXT: br label [[HEADER_1_LOOPEXIT:%.*]] 20; CHECK: latch.2: 21; CHECK-NEXT: br label [[HEADER_1_BACKEDGE]] 22; CHECK: header.1.backedge: 23; CHECK-NEXT: br label [[HEADER_1]] 24; 25entry: 26 br label %header.1 27 28header.1: 29 %p.1 = phi i32 [ 0, %entry ], [ %p.2.lcssa, %latch.2 ], [ 0, %latch.1 ] 30 br label %header.2 31 32header.2: 33 %p.2 = phi i32 [ %p.1, %header.1 ], [ %p.2.next, %latch.1 ] 34 br i1 %c, label %latch.1, label %latch.2 35 36latch.1: 37 %p.2.next = add i32 %p.2, 1 38 br i1 false, label %header.2, label %header.1 39 40latch.2: 41 %p.2.lcssa = phi i32 [ %p.2, %header.2 ] 42 br label %header.1 43} 44 45define i8 @test_pr52023(i1 %c.1, i1 %c.2) { 46; CHECK-LABEL: @test_pr52023( 47; CHECK-NEXT: entry: 48; CHECK-NEXT: br label [[LOOP_1:%.*]] 49; CHECK: loop.1: 50; CHECK-NEXT: [[INC79:%.*]] = phi i8 [ [[TMP0:%.*]], [[LOOP_1_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ] 51; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[INC79]], 1 52; CHECK-NEXT: br label [[LOOP_2:%.*]] 53; CHECK: loop.2: 54; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP_2_LATCH:%.*]], label [[LOOP_1_LATCH]] 55; CHECK: loop.2.latch: 56; CHECK-NEXT: br label [[LOOP_1_LATCH]] 57; CHECK: loop.1.latch: 58; CHECK-NEXT: [[TMP0]] = phi i8 [ [[TMP1]], [[LOOP_2_LATCH]] ], [ undef, [[LOOP_2]] ] 59; CHECK-NEXT: br i1 [[C_2:%.*]], label [[EXIT:%.*]], label [[LOOP_1]] 60; CHECK: exit: 61; CHECK-NEXT: [[INC_LCSSA_LCSSA:%.*]] = phi i8 [ [[TMP0]], [[LOOP_1_LATCH]] ] 62; CHECK-NEXT: ret i8 [[INC_LCSSA_LCSSA]] 63; 64entry: 65 br label %loop.1 66 67loop.1: 68 %inc79 = phi i8 [ %inc.lcssa, %loop.1.latch ], [ 0, %entry ] 69 br label %loop.2 70 71loop.2: 72 %inc6 = phi i8 [ %inc79, %loop.1 ], [ %inc, %loop.2.latch ] 73 %inc = add i8 %inc6, 1 74 br i1 %c.1, label %loop.2.latch , label %loop.1.latch 75 76loop.2.latch: 77 br i1 false, label %loop.2, label %loop.1.latch 78 79loop.1.latch: 80 %inc.lcssa = phi i8 [ %inc, %loop.2.latch ], [ undef, %loop.2 ] 81 br i1 %c.2, label %exit, label %loop.1 82 83exit: 84 %inc.lcssa.lcssa = phi i8 [ %inc.lcssa, %loop.1.latch ] 85 ret i8 %inc.lcssa.lcssa 86} 87 88define i32 @test_pr58440(i1 %c.0) { 89; CHECK-LABEL: @test_pr58440( 90; CHECK-NEXT: entry: 91; CHECK-NEXT: [[TMP0:%.*]] = or i32 0, 1 92; CHECK-NEXT: br label [[LOOP_1_HEADER:%.*]] 93; CHECK: loop.1.header.loopexit: 94; CHECK-NEXT: br label [[LOOP_1_HEADER]] 95; CHECK: loop.1.header: 96; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]] 97; CHECK: loop.2.header: 98; CHECK-NEXT: br i1 [[C_0:%.*]], label [[LOOP_2_LATCH:%.*]], label [[LOOP_1_HEADER_LOOPEXIT:%.*]] 99; CHECK: loop.2.latch: 100; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[LOOP_2_HEADER]] 101; CHECK: exit: 102; CHECK-NEXT: [[LCSSA:%.*]] = phi i32 [ [[TMP0]], [[LOOP_2_LATCH]] ] 103; CHECK-NEXT: ret i32 [[LCSSA]] 104; 105entry: 106 br label %loop.1.header 107 108loop.1.header: 109 %p.1 = phi i32 [ 0, %entry ], [ %p.2, %loop.2.header ] 110 br label %loop.2.header 111 112loop.2.header: 113 %p.2 = phi i32 [ %p.1, %loop.1.header ], [ %0, %loop.2.latch ] 114 br i1 %c.0, label %loop.2.latch, label %loop.1.header 115 116loop.2.latch: 117 %0 = or i32 %p.1, 1 118 br i1 false, label %exit, label %loop.2.header 119 120exit: 121 %lcssa = phi i32 [ %0, %loop.2.latch ] 122 ret i32 %lcssa 123} 124 125 126define i16 @test_pr58515_invalidate_loop_disposition(ptr %a) { 127; CHECK-LABEL: @test_pr58515_invalidate_loop_disposition( 128; CHECK-NEXT: entry: 129; CHECK-NEXT: [[SEL:%.*]] = select i1 true, i16 2, i16 0 130; CHECK-NEXT: br label [[LOOP:%.*]] 131; CHECK: loop: 132; CHECK-NEXT: [[IV:%.*]] = phi i16 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 133; CHECK-NEXT: [[SUM:%.*]] = phi i16 [ 0, [[ENTRY]] ], [ [[SUM_NEXT:%.*]], [[LOOP]] ] 134; CHECK-NEXT: [[SUM_NEXT]] = add i16 [[SEL]], [[SUM]] 135; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i16 [[IV]], 1 136; CHECK-NEXT: [[C_2:%.*]] = icmp ult i16 [[IV]], 9 137; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT:%.*]] 138; CHECK: exit: 139; CHECK-NEXT: [[LCSSA:%.*]] = phi i16 [ [[SUM_NEXT]], [[LOOP]] ] 140; CHECK-NEXT: ret i16 0 141; 142entry: 143 br label %loop 144 145loop: 146 %iv = phi i16 [ 1, %entry ], [ %iv.next, %loop ] 147 %sum = phi i16 [ 0, %entry ], [ %sum.next, %loop ] 148 %gep = getelementptr inbounds i16, ptr %a, i16 %iv 149 %c.1 = icmp ne ptr %a, %gep 150 %sel = select i1 %c.1, i16 2, i16 0 151 %sum.next = add i16 %sel, %sum 152 %iv.next = add nuw nsw i16 %iv, 1 153 %c.2 = icmp ult i16 %iv, 9 154 br i1 %c.2, label %loop, label %exit 155 156exit: 157 %lcssa = phi i16 [ %sum.next, %loop ] 158 ret i16 0 159} 160 161define i32 @pr58750(i16 %a, ptr %dst, i1 %c.0) { 162; CHECK-LABEL: @pr58750( 163; CHECK-NEXT: entry: 164; CHECK-NEXT: [[CMP186_NOT:%.*]] = icmp eq i16 [[A:%.*]], 0 165; CHECK-NEXT: call void @llvm.assume(i1 [[CMP186_NOT]]) 166; CHECK-NEXT: br label [[OUTER_HEADER:%.*]] 167; CHECK: outer.header: 168; CHECK-NEXT: [[P_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[LCSSA:%.*]], [[OUTER_LATCH:%.*]] ] 169; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[P_0]], 0 170; CHECK-NEXT: br label [[INNER:%.*]] 171; CHECK: inner: 172; CHECK-NEXT: store i16 0, ptr [[DST:%.*]], align 1 173; CHECK-NEXT: br i1 false, label [[INNER]], label [[OUTER_LATCH]] 174; CHECK: outer.latch: 175; CHECK-NEXT: [[LCSSA]] = phi i32 [ [[XOR]], [[INNER]] ] 176; CHECK-NEXT: br i1 [[C_0:%.*]], label [[OUTER_HEADER]], label [[EXIT:%.*]] 177; CHECK: exit: 178; CHECK-NEXT: [[LCSSA_LCSSA:%.*]] = phi i32 [ [[LCSSA]], [[OUTER_LATCH]] ] 179; CHECK-NEXT: ret i32 [[LCSSA_LCSSA]] 180; 181entry: 182 %cmp186.not = icmp eq i16 %a, 0 183 call void @llvm.assume(i1 %cmp186.not) 184 br label %outer.header 185 186outer.header: 187 %p.0 = phi i32 [ 0, %entry ], [ %lcssa, %outer.latch ] 188 br label %inner 189 190inner: 191 %inner.iv = phi i16 [ 0, %outer.header ], [ %inner.iv.next, %inner ] 192 %p.1 = phi i32 [ %p.0, %outer.header ], [ %xor, %inner ] 193 store i16 %inner.iv, ptr %dst, align 1 194 %conv = sext i16 %inner.iv to i32 195 %xor = xor i32 %p.1, %conv 196 %inner.iv.next = add nuw i16 %inner.iv, 1 197 %c.1 = icmp ult i16 %inner.iv.next, %a 198 br i1 %c.1, label %inner, label %outer.latch 199 200outer.latch: 201 %lcssa = phi i32 [ %xor, %inner ] 202 br i1 %c.0, label %outer.header, label %exit 203 204exit: 205 ret i32 %lcssa 206} 207 208; Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind willreturn 209declare void @llvm.assume(i1 noundef) #1 210 211 212