1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 2; RUN: opt < %s -passes=indvars -S | FileCheck %s 3; 4; PR1301 5 6; Do a bunch of analysis and prove that the loops can use an i32 trip 7; count without casting. 8; 9; Note that all four functions should actually be converted to 10; memset. However, this test case validates indvars behavior. We 11; don't check that phis are "folded together" because that is a job 12; for loop strength reduction. But indvars must remove sext, zext, and add i8. 13; 14 15; ModuleID = 'ada.bc' 16target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32" 17target triple = "i686-pc-linux-gnu" 18 19define void @kinds__sbytezero(ptr nocapture %a) nounwind { 20; CHECK-LABEL: define void @kinds__sbytezero( 21; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0:[0-9]+]] { 22; CHECK-NEXT: bb.thread: 23; CHECK-NEXT: [[TMP46:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 0 24; CHECK-NEXT: store i32 0, ptr [[TMP46]], align 4 25; CHECK-NEXT: br label [[BB:%.*]] 26; CHECK: bb: 27; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ -128, [[BB_THREAD:%.*]] ] 28; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], 1 29; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[INDVARS_IV_NEXT]], 128 30; CHECK-NEXT: [[TMP4:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 [[TMP3]] 31; CHECK-NEXT: store i32 0, ptr [[TMP4]], align 4 32; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 127 33; CHECK-NEXT: br i1 [[TMP0]], label [[RETURN:%.*]], label [[BB]] 34; CHECK: return: 35; CHECK-NEXT: ret void 36; 37bb.thread: 38 %tmp46 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1] 39 store i32 0, ptr %tmp46 40 br label %bb 41 42bb: ; preds = %bb, %bb.thread 43 %i.0.reg2mem.0 = phi i8 [ -128, %bb.thread ], [ %tmp8, %bb ] ; <i8> [#uses=1] 44 %tmp8 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3] 45 %tmp1 = sext i8 %tmp8 to i32 ; <i32> [#uses=1] 46 %tmp3 = add i32 %tmp1, 128 ; <i32> [#uses=1] 47 %tmp4 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp3 ; <ptr> [#uses=1] 48 store i32 0, ptr %tmp4 49 %0 = icmp eq i8 %tmp8, 127 ; <i1> [#uses=1] 50 br i1 %0, label %return, label %bb 51 52return: ; preds = %bb 53 ret void 54} 55 56 57define void @kinds__ubytezero(ptr nocapture %a) nounwind { 58; CHECK-LABEL: define void @kinds__ubytezero( 59; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] { 60; CHECK-NEXT: bb.thread: 61; CHECK-NEXT: [[TMP35:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 0 62; CHECK-NEXT: store i32 0, ptr [[TMP35]], align 4 63; CHECK-NEXT: br label [[BB:%.*]] 64; CHECK: bb: 65; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ 0, [[BB_THREAD:%.*]] ] 66; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1 67; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 [[INDVARS_IV_NEXT]] 68; CHECK-NEXT: store i32 0, ptr [[TMP3]], align 4 69; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 255 70; CHECK-NEXT: br i1 [[TMP0]], label [[RETURN:%.*]], label [[BB]] 71; CHECK: return: 72; CHECK-NEXT: ret void 73; 74bb.thread: 75 %tmp35 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1] 76 store i32 0, ptr %tmp35 77 br label %bb 78 79bb: ; preds = %bb, %bb.thread 80 %i.0.reg2mem.0 = phi i8 [ 0, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=1] 81 %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3] 82 %tmp1 = zext i8 %tmp7 to i32 ; <i32> [#uses=1] 83 %tmp3 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp1 ; <ptr> [#uses=1] 84 store i32 0, ptr %tmp3 85 %0 = icmp eq i8 %tmp7, -1 ; <i1> [#uses=1] 86 br i1 %0, label %return, label %bb 87 88return: ; preds = %bb 89 ret void 90} 91 92define void @kinds__srangezero(ptr nocapture %a) nounwind { 93; CHECK-LABEL: define void @kinds__srangezero( 94; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] { 95; CHECK-NEXT: bb.thread: 96; CHECK-NEXT: br label [[BB:%.*]] 97; CHECK: bb: 98; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ -10, [[BB_THREAD:%.*]] ] 99; CHECK-NEXT: [[TMP4:%.*]] = add nsw i32 [[INDVARS_IV]], 10 100; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [21 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 101; CHECK-NEXT: store i32 0, ptr [[TMP5]], align 4 102; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], 1 103; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 11 104; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN:%.*]], label [[BB]] 105; CHECK: return: 106; CHECK-NEXT: ret void 107; 108bb.thread: 109 br label %bb 110 111bb: ; preds = %bb, %bb.thread 112 %i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2] 113 %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1] 114 %tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1] 115 %tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1] 116 store i32 0, ptr %tmp5 117 %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2] 118 %0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1] 119 br i1 %0, label %return, label %bb 120 121return: ; preds = %bb 122 ret void 123} 124 125define void @kinds__urangezero(ptr nocapture %a) nounwind { 126; CHECK-LABEL: define void @kinds__urangezero( 127; CHECK-SAME: ptr captures(none) [[A:%.*]]) #[[ATTR0]] { 128; CHECK-NEXT: bb.thread: 129; CHECK-NEXT: br label [[BB:%.*]] 130; CHECK: bb: 131; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ 10, [[BB_THREAD:%.*]] ] 132; CHECK-NEXT: [[TMP4:%.*]] = add nsw i32 [[INDVARS_IV]], -10 133; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [21 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 134; CHECK-NEXT: store i32 0, ptr [[TMP5]], align 4 135; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1 136; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 31 137; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN:%.*]], label [[BB]] 138; CHECK: return: 139; CHECK-NEXT: ret void 140; 141bb.thread: 142 br label %bb 143 144bb: ; preds = %bb, %bb.thread 145 %i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2] 146 %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1] 147 %tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1] 148 %tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1] 149 store i32 0, ptr %tmp5 150 %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2] 151 %0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1] 152 br i1 %0, label %return, label %bb 153 154return: ; preds = %bb 155 ret void 156} 157