1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt < %s -passes=float2int -S | FileCheck %s -check-prefixes=CHECK,NONE 3; RUN: opt < %s -passes=float2int -S --data-layout="n64" | FileCheck %s -check-prefixes=CHECK,ONLY64 4; RUN: opt < %s -passes=float2int -S --data-layout="n8:16:32:64"| FileCheck %s -check-prefixes=CHECK,MULTIPLE 5; RUN: opt < %s -passes=float2int -S --data-layout="e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"| FileCheck %s -check-prefixes=CHECK,PR-79158 6 7define i32 @pr79158(i32 %x) { 8; CHECK-LABEL: define i32 @pr79158( 9; CHECK-SAME: i32 [[X:%.*]]) { 10; CHECK-NEXT: entry: 11; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 12; CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[CMP]] to i64 13; CHECK-NEXT: [[MUL1:%.*]] = mul i64 [[TMP0]], 4294967295 14; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[MUL1]] to i32 15; CHECK-NEXT: ret i32 [[TMP1]] 16; 17entry: 18 %cmp = icmp sgt i32 %x, 0 19 %conv = uitofp i1 %cmp to double 20 %mul = fmul double %conv, 0x41EFFFFFFFE00000 21 %conv1 = fptoui double %mul to i32 22 ret i32 %conv1 23} 24 25define i32 @pr79158_2(i32 %x) { 26; NONE-LABEL: define i32 @pr79158_2( 27; NONE-SAME: i32 [[X:%.*]]) { 28; NONE-NEXT: entry: 29; NONE-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 30; NONE-NEXT: [[TMP0:%.*]] = zext i1 [[CMP]] to i32 31; NONE-NEXT: [[MUL1:%.*]] = mul i32 [[TMP0]], 255 32; NONE-NEXT: [[TMP1:%.*]] = trunc i32 [[MUL1]] to i8 33; NONE-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32 34; NONE-NEXT: ret i32 [[CONV2]] 35; 36; ONLY64-LABEL: define i32 @pr79158_2( 37; ONLY64-SAME: i32 [[X:%.*]]) { 38; ONLY64-NEXT: entry: 39; ONLY64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 40; ONLY64-NEXT: [[TMP0:%.*]] = zext i1 [[CMP]] to i64 41; ONLY64-NEXT: [[MUL1:%.*]] = mul i64 [[TMP0]], 255 42; ONLY64-NEXT: [[TMP1:%.*]] = trunc i64 [[MUL1]] to i8 43; ONLY64-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32 44; ONLY64-NEXT: ret i32 [[CONV2]] 45; 46; MULTIPLE-LABEL: define i32 @pr79158_2( 47; MULTIPLE-SAME: i32 [[X:%.*]]) { 48; MULTIPLE-NEXT: entry: 49; MULTIPLE-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 50; MULTIPLE-NEXT: [[TMP0:%.*]] = zext i1 [[CMP]] to i16 51; MULTIPLE-NEXT: [[MUL1:%.*]] = mul i16 [[TMP0]], 255 52; MULTIPLE-NEXT: [[TMP1:%.*]] = trunc i16 [[MUL1]] to i8 53; MULTIPLE-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32 54; MULTIPLE-NEXT: ret i32 [[CONV2]] 55; 56; PR-79158-LABEL: define i32 @pr79158_2( 57; PR-79158-SAME: i32 [[X:%.*]]) { 58; PR-79158-NEXT: entry: 59; PR-79158-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X]], 0 60; PR-79158-NEXT: [[TMP0:%.*]] = zext i1 [[CMP]] to i16 61; PR-79158-NEXT: [[MUL1:%.*]] = mul i16 [[TMP0]], 255 62; PR-79158-NEXT: [[TMP1:%.*]] = trunc i16 [[MUL1]] to i8 63; PR-79158-NEXT: [[CONV2:%.*]] = zext i8 [[TMP1]] to i32 64; PR-79158-NEXT: ret i32 [[CONV2]] 65; 66entry: 67 %cmp = icmp sgt i32 %x, 0 68 %conv = uitofp i1 %cmp to float 69 %mul = fmul float %conv, 2.550000e+02 70 %conv1 = fptoui float %mul to i8 71 %conv2 = zext i8 %conv1 to i32 72 ret i32 %conv2 73} 74