xref: /llvm-project/llvm/test/Transforms/CorrelatedValuePropagation/sub.ll (revision 2d69827c5c754f0eca98e497ecf0e52ed54b4fd3)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
3
4define void @test0(i32 %a) {
5; CHECK-LABEL: @test0(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
8; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
9; CHECK:       bb:
10; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
11; CHECK-NEXT:    br label [[EXIT]]
12; CHECK:       exit:
13; CHECK-NEXT:    ret void
14;
15entry:
16  %cmp = icmp sgt i32 %a, 100
17  br i1 %cmp, label %bb, label %exit
18
19bb:
20  %sub = sub i32 %a, 1
21  br label %exit
22
23exit:
24  ret void
25}
26
27define void @test1(i32 %a) {
28; CHECK-LABEL: @test1(
29; CHECK-NEXT:  entry:
30; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 100
31; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
32; CHECK:       bb:
33; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
34; CHECK-NEXT:    br label [[EXIT]]
35; CHECK:       exit:
36; CHECK-NEXT:    ret void
37;
38entry:
39  %cmp = icmp ugt i32 %a, 100
40  br i1 %cmp, label %bb, label %exit
41
42bb:
43  %sub = sub i32 %a, 1
44  br label %exit
45
46exit:
47  ret void
48}
49
50define void @test2(i32 %a) {
51; CHECK-LABEL: @test2(
52; CHECK-NEXT:  entry:
53; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], -1
54; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
55; CHECK:       bb:
56; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
57; CHECK-NEXT:    br label [[EXIT]]
58; CHECK:       exit:
59; CHECK-NEXT:    ret void
60;
61entry:
62  %cmp = icmp ugt i32 %a, -1
63  br i1 %cmp, label %bb, label %exit
64
65bb:
66  %sub = sub i32 %a, 1
67  br label %exit
68
69exit:
70  ret void
71}
72
73define void @test3(i32 %a) {
74; CHECK-LABEL: @test3(
75; CHECK-NEXT:  entry:
76; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
77; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
78; CHECK:       bb:
79; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
80; CHECK-NEXT:    br label [[EXIT]]
81; CHECK:       exit:
82; CHECK-NEXT:    ret void
83;
84entry:
85  %cmp = icmp sgt i32 %a, -1
86  br i1 %cmp, label %bb, label %exit
87
88bb:
89  %sub = sub i32 %a, 1
90  br label %exit
91
92exit:
93  ret void
94}
95
96define void @test4(i32 %a) {
97; CHECK-LABEL: @test4(
98; CHECK-NEXT:  entry:
99; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 2147483647
100; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
101; CHECK:       bb:
102; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
103; CHECK-NEXT:    br label [[EXIT]]
104; CHECK:       exit:
105; CHECK-NEXT:    ret void
106;
107entry:
108  %cmp = icmp ugt i32 %a, 2147483647
109  br i1 %cmp, label %bb, label %exit
110
111bb:
112  %sub = sub i32 %a, 1
113  br label %exit
114
115exit:
116  ret void
117}
118
119define void @test5(i32 %a) {
120; CHECK-LABEL: @test5(
121; CHECK-NEXT:  entry:
122; CHECK-NEXT:    [[CMP:%.*]] = icmp sle i32 [[A:%.*]], 2147483647
123; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
124; CHECK:       bb:
125; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
126; CHECK-NEXT:    br label [[EXIT]]
127; CHECK:       exit:
128; CHECK-NEXT:    ret void
129;
130entry:
131  %cmp = icmp sle i32 %a, 2147483647
132  br i1 %cmp, label %bb, label %exit
133
134bb:
135  %sub = sub i32 %a, 1
136  br label %exit
137
138exit:
139  ret void
140}
141
142; Check for a corner case where an integer value is represented with a constant
143; LVILatticeValue instead of constantrange. Check that we don't fail with an
144; assertion in this case.
145@b = global i32 0, align 4
146define void @test6(i32 %a) {
147; CHECK-LABEL: @test6(
148; CHECK-NEXT:  bb:
149; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A:%.*]], ptrtoint (ptr @b to i32)
150; CHECK-NEXT:    ret void
151;
152bb:
153  %sub = sub i32 %a, ptrtoint (ptr @b to i32)
154  ret void
155}
156
157; Check that we can gather information for conditions in the form of
158;   and ( i s< 100, Unknown )
159define void @test7(i32 %a, i1 %flag) {
160; CHECK-LABEL: @test7(
161; CHECK-NEXT:  entry:
162; CHECK-NEXT:    [[CMP_1:%.*]] = icmp ugt i32 [[A:%.*]], 100
163; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
164; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
165; CHECK:       bb:
166; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 [[A]], 1
167; CHECK-NEXT:    br label [[EXIT]]
168; CHECK:       exit:
169; CHECK-NEXT:    ret void
170;
171entry:
172  %cmp.1 = icmp ugt i32 %a, 100
173  %cmp = and i1 %cmp.1, %flag
174  br i1 %cmp, label %bb, label %exit
175
176bb:
177  %sub = sub i32 %a, 1
178  br label %exit
179
180exit:
181  ret void
182}
183
184; Check that we can gather information for conditions in the form of
185;   and ( i s< 100, i s> 0 )
186define void @test8(i32 %a) {
187; CHECK-LABEL: @test8(
188; CHECK-NEXT:  entry:
189; CHECK-NEXT:    [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
190; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
191; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
192; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
193; CHECK:       bb:
194; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
195; CHECK-NEXT:    br label [[EXIT]]
196; CHECK:       exit:
197; CHECK-NEXT:    ret void
198;
199entry:
200  %cmp.1 = icmp slt i32 %a, 100
201  %cmp.2 = icmp sgt i32 %a, 0
202  %cmp = and i1 %cmp.1, %cmp.2
203  br i1 %cmp, label %bb, label %exit
204
205bb:
206  %sub = sub i32 %a, 1
207  br label %exit
208
209exit:
210  ret void
211}
212
213; Check that for conditions in the form of cond1 && cond2 we don't mistakenly
214; assume that !cond1 && !cond2 holds down to false path.
215define void @test8_neg(i32 %a) {
216; CHECK-LABEL: @test8_neg(
217; CHECK-NEXT:  entry:
218; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
219; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
220; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_2]]
221; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
222; CHECK:       bb:
223; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
224; CHECK-NEXT:    br label [[EXIT]]
225; CHECK:       exit:
226; CHECK-NEXT:    ret void
227;
228entry:
229  %cmp.1 = icmp sge i32 %a, 100
230  %cmp.2 = icmp sle i32 %a, 0
231  %cmp = and i1 %cmp.1, %cmp.2
232  br i1 %cmp, label %exit, label %bb
233
234bb:
235  %sub = sub i32 %a, 1
236  br label %exit
237
238exit:
239  ret void
240}
241
242; Check that we can gather information for conditions in the form of
243;   and ( i s< 100, and (i s> 0, Unknown )
244define void @test9(i32 %a, i1 %flag) {
245; CHECK-LABEL: @test9(
246; CHECK-NEXT:  entry:
247; CHECK-NEXT:    [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
248; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
249; CHECK-NEXT:    [[CMP_3:%.*]] = and i1 [[CMP_2]], [[FLAG:%.*]]
250; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[CMP_3]]
251; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
252; CHECK:       bb:
253; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
254; CHECK-NEXT:    br label [[EXIT]]
255; CHECK:       exit:
256; CHECK-NEXT:    ret void
257;
258entry:
259  %cmp.1 = icmp slt i32 %a, 100
260  %cmp.2 = icmp sgt i32 %a, 0
261  %cmp.3 = and i1 %cmp.2, %flag
262  %cmp = and i1 %cmp.1, %cmp.3
263  br i1 %cmp, label %bb, label %exit
264
265bb:
266  %sub = sub i32 %a, 1
267  br label %exit
268
269exit:
270  ret void
271}
272
273; Check that we can gather information for conditions in the form of
274;   and ( i s> Unknown, ... )
275define void @test10(i32 %a, i32 %b, i1 %flag) {
276; CHECK-LABEL: @test10(
277; CHECK-NEXT:  entry:
278; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
279; CHECK-NEXT:    [[CMP:%.*]] = and i1 [[CMP_1]], [[FLAG:%.*]]
280; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
281; CHECK:       bb:
282; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
283; CHECK-NEXT:    br label [[EXIT]]
284; CHECK:       exit:
285; CHECK-NEXT:    ret void
286;
287entry:
288  %cmp.1 = icmp sgt i32 %a, %b
289  %cmp = and i1 %cmp.1, %flag
290  br i1 %cmp, label %bb, label %exit
291
292bb:
293  %sub = sub i32 %a, 1
294  br label %exit
295
296exit:
297  ret void
298}
299
300@limit = external global i32
301define i32 @test11(ptr %p, i32 %i) {
302; CHECK-LABEL: @test11(
303; CHECK-NEXT:    [[LIMIT:%.*]] = load i32, ptr [[P:%.*]], !range !0
304; CHECK-NEXT:    [[WITHIN_1:%.*]] = icmp slt i32 [[LIMIT]], [[I:%.*]]
305; CHECK-NEXT:    [[I_MINUS_7:%.*]] = add i32 [[I]], -7
306; CHECK-NEXT:    [[WITHIN_2:%.*]] = icmp slt i32 [[LIMIT]], [[I_MINUS_7]]
307; CHECK-NEXT:    [[WITHIN:%.*]] = and i1 [[WITHIN_1]], [[WITHIN_2]]
308; CHECK-NEXT:    br i1 [[WITHIN]], label [[THEN:%.*]], label [[ELSE:%.*]]
309; CHECK:       then:
310; CHECK-NEXT:    [[I_MINUS_6:%.*]] = sub nuw nsw i32 [[I]], 6
311; CHECK-NEXT:    ret i32 [[I_MINUS_6]]
312; CHECK:       else:
313; CHECK-NEXT:    ret i32 0
314;
315  %limit = load i32, ptr %p, !range !{i32 0, i32 2147483647}
316  %within.1 = icmp slt i32 %limit, %i
317  %i.minus.7 = add i32 %i, -7
318  %within.2 = icmp slt i32 %limit, %i.minus.7
319  %within = and i1 %within.1, %within.2
320  br i1 %within, label %then, label %else
321
322then:
323  %i.minus.6 = sub i32 %i, 6
324  ret i32 %i.minus.6
325
326else:
327  ret i32 0
328}
329
330; Check that we can gather information for conditions is the form of
331;   or ( i s<= -100, Unknown )
332define void @test12(i32 %a, i1 %flag) {
333; CHECK-LABEL: @test12(
334; CHECK-NEXT:  entry:
335; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], -100
336; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
337; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
338; CHECK:       bb:
339; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
340; CHECK-NEXT:    br label [[EXIT]]
341; CHECK:       exit:
342; CHECK-NEXT:    ret void
343;
344entry:
345  %cmp.1 = icmp sle i32 %a, -100
346  %cmp = or i1 %cmp.1, %flag
347  br i1 %cmp, label %exit, label %bb
348
349bb:
350  %sub = sub i32 %a, 1
351  br label %exit
352
353exit:
354  ret void
355}
356
357; Check that we can gather information for conditions is the form of
358;   or ( i s>= 100, i s<= 0 )
359define void @test13(i32 %a) {
360; CHECK-LABEL: @test13(
361; CHECK-NEXT:  entry:
362; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
363; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
364; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
365; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
366; CHECK:       bb:
367; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
368; CHECK-NEXT:    br label [[EXIT]]
369; CHECK:       exit:
370; CHECK-NEXT:    ret void
371;
372entry:
373  %cmp.1 = icmp sge i32 %a, 100
374  %cmp.2 = icmp sle i32 %a, 0
375  %cmp = or i1 %cmp.1, %cmp.2
376  br i1 %cmp, label %exit, label %bb
377
378bb:
379  %sub = sub i32 %a, 1
380  br label %exit
381
382exit:
383  ret void
384}
385
386; Check that for conditions is the form of cond1 || cond2 we don't mistakenly
387; assume that cond1 || cond2 holds down to true path.
388define void @test13_neg(i32 %a) {
389; CHECK-LABEL: @test13_neg(
390; CHECK-NEXT:  entry:
391; CHECK-NEXT:    [[CMP_1:%.*]] = icmp slt i32 [[A:%.*]], 100
392; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sgt i32 [[A]], 0
393; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_2]]
394; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
395; CHECK:       bb:
396; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[A]], 1
397; CHECK-NEXT:    br label [[EXIT]]
398; CHECK:       exit:
399; CHECK-NEXT:    ret void
400;
401entry:
402  %cmp.1 = icmp slt i32 %a, 100
403  %cmp.2 = icmp sgt i32 %a, 0
404  %cmp = or i1 %cmp.1, %cmp.2
405  br i1 %cmp, label %bb, label %exit
406
407bb:
408  %sub = sub i32 %a, 1
409  br label %exit
410
411exit:
412  ret void
413}
414
415; Check that we can gather information for conditions is the form of
416;   or ( i s>=100, or (i s<= 0, Unknown )
417define void @test14(i32 %a, i1 %flag) {
418; CHECK-LABEL: @test14(
419; CHECK-NEXT:  entry:
420; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sge i32 [[A:%.*]], 100
421; CHECK-NEXT:    [[CMP_2:%.*]] = icmp sle i32 [[A]], 0
422; CHECK-NEXT:    [[CMP_3:%.*]] = or i1 [[CMP_2]], [[FLAG:%.*]]
423; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[CMP_3]]
424; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
425; CHECK:       bb:
426; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 [[A]], 1
427; CHECK-NEXT:    br label [[EXIT]]
428; CHECK:       exit:
429; CHECK-NEXT:    ret void
430;
431entry:
432  %cmp.1 = icmp sge i32 %a, 100
433  %cmp.2 = icmp sle i32 %a, 0
434  %cmp.3 = or i1 %cmp.2, %flag
435  %cmp = or i1 %cmp.1, %cmp.3
436  br i1 %cmp, label %exit, label %bb
437
438bb:
439  %sub = sub i32 %a, 1
440  br label %exit
441
442exit:
443  ret void
444}
445
446; Check that we can gather information for conditions is the form of
447;   or ( i s<= Unknown, ... )
448define void @test15(i32 %a, i32 %b, i1 %flag) {
449; CHECK-LABEL: @test15(
450; CHECK-NEXT:  entry:
451; CHECK-NEXT:    [[CMP_1:%.*]] = icmp sle i32 [[A:%.*]], [[B:%.*]]
452; CHECK-NEXT:    [[CMP:%.*]] = or i1 [[CMP_1]], [[FLAG:%.*]]
453; CHECK-NEXT:    br i1 [[CMP]], label [[EXIT:%.*]], label [[BB:%.*]]
454; CHECK:       bb:
455; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[A]], 1
456; CHECK-NEXT:    br label [[EXIT]]
457; CHECK:       exit:
458; CHECK-NEXT:    ret void
459;
460entry:
461  %cmp.1 = icmp sle i32 %a, %b
462  %cmp = or i1 %cmp.1, %flag
463  br i1 %cmp, label %exit, label %bb
464
465bb:
466  %sub = sub i32 %a, 1
467  br label %exit
468
469exit:
470  ret void
471}
472
473; single basic block loop
474; because the loop exit condition is SLT, we can supplement the iv sub
475; (iv.next def) with an nsw.
476define i32 @test16(ptr %n, ptr %a) {
477; CHECK-LABEL: @test16(
478; CHECK-NEXT:  preheader:
479; CHECK-NEXT:    br label [[LOOP:%.*]]
480; CHECK:       loop:
481; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
482; CHECK-NEXT:    [[ACC:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[ACC_CURR:%.*]], [[LOOP]] ]
483; CHECK-NEXT:    [[X:%.*]] = load atomic i32, ptr [[A:%.*]] unordered, align 8
484; CHECK-NEXT:    fence acquire
485; CHECK-NEXT:    [[ACC_CURR]] = sub i32 [[ACC]], [[X]]
486; CHECK-NEXT:    [[IV_NEXT]] = sub nsw i32 [[IV]], -1
487; CHECK-NEXT:    [[NVAL:%.*]] = load atomic i32, ptr [[N:%.*]] unordered, align 8
488; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[IV_NEXT]], [[NVAL]]
489; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
490; CHECK:       exit:
491; CHECK-NEXT:    ret i32 [[ACC_CURR]]
492;
493preheader:
494  br label %loop
495
496loop:
497  %iv = phi i32 [ 0, %preheader ], [ %iv.next, %loop ]
498  %acc = phi i32 [ 0, %preheader ], [ %acc.curr, %loop ]
499  %x = load atomic i32, ptr %a unordered, align 8
500  fence acquire
501  %acc.curr = sub i32 %acc, %x
502  %iv.next = sub i32 %iv, -1
503  %nval = load atomic i32, ptr %n unordered, align 8
504  %cmp = icmp slt i32 %iv.next, %nval
505  br i1 %cmp, label %loop, label %exit
506
507exit:
508  ret i32 %acc.curr
509}
510
511define void @test17(i32 %a) {
512; CHECK-LABEL: @test17(
513; CHECK-NEXT:  entry:
514; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 100
515; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
516; CHECK:       bb:
517; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 1, [[A]]
518; CHECK-NEXT:    br label [[EXIT]]
519; CHECK:       exit:
520; CHECK-NEXT:    ret void
521;
522entry:
523  %cmp = icmp sgt i32 %a, 100
524  br i1 %cmp, label %bb, label %exit
525
526bb:
527  %sub = sub i32 1, %a
528  br label %exit
529
530exit:
531  ret void
532}
533
534define void @test18(i32 %a) {
535; CHECK-LABEL: @test18(
536; CHECK-NEXT:  entry:
537; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 10000
538; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
539; CHECK:       bb:
540; CHECK-NEXT:    [[SUB:%.*]] = sub nuw i32 -2, [[A]]
541; CHECK-NEXT:    br label [[EXIT]]
542; CHECK:       exit:
543; CHECK-NEXT:    ret void
544;
545entry:
546  %cmp = icmp sgt i32 %a, 10000
547  br i1 %cmp, label %bb, label %exit
548
549bb:
550  %sub = sub i32 -2, %a
551  br label %exit
552
553exit:
554  ret void
555}
556
557define void @test19(i32 %a) {
558; CHECK-LABEL: @test19(
559; CHECK-NEXT:  entry:
560; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 100
561; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
562; CHECK:       bb:
563; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i32 -1, [[A]]
564; CHECK-NEXT:    br label [[EXIT]]
565; CHECK:       exit:
566; CHECK-NEXT:    ret void
567;
568entry:
569  %cmp = icmp ult i32 %a, 100
570  br i1 %cmp, label %bb, label %exit
571
572bb:
573  %sub = sub i32 -1, %a
574  br label %exit
575
576exit:
577  ret void
578}
579
580define void @test20(i32 %a) {
581; CHECK-LABEL: @test20(
582; CHECK-NEXT:  entry:
583; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 2147483647
584; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
585; CHECK:       bb:
586; CHECK-NEXT:    [[SUB:%.*]] = sub i32 0, [[A]]
587; CHECK-NEXT:    br label [[EXIT]]
588; CHECK:       exit:
589; CHECK-NEXT:    ret void
590;
591entry:
592  %cmp = icmp ugt i32 %a, 2147483647
593  br i1 %cmp, label %bb, label %exit
594
595bb:
596  %sub = sub i32 0, %a
597  br label %exit
598
599exit:
600  ret void
601}
602