xref: /llvm-project/llvm/test/Transforms/CorrelatedValuePropagation/mul.ll (revision ca00cec997c2a22dd6603cddb8bab789e1b01d34) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=correlated-propagation -S | FileCheck %s
3
4define i8 @test0(i8 %a) {
5; CHECK-LABEL: @test0(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 3
8; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
9; CHECK:       bb:
10; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i8 [[A]], 50
11; CHECK-NEXT:    ret i8 [[MUL]]
12; CHECK:       exit:
13; CHECK-NEXT:    ret i8 0
14;
15entry:
16  %cmp = icmp ult i8 %a, 3
17  br i1 %cmp, label %bb, label %exit
18
19bb:
20  %mul = mul i8 %a, 50
21  ret i8 %mul
22
23exit:
24  ret i8 0
25}
26
27define i8 @test1(i8 %a) {
28; CHECK-LABEL: @test1(
29; CHECK-NEXT:  entry:
30; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 4
31; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
32; CHECK:       bb:
33; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i8 [[A]], 50
34; CHECK-NEXT:    ret i8 [[MUL]]
35; CHECK:       exit:
36; CHECK-NEXT:    ret i8 0
37;
38entry:
39  %cmp = icmp ult i8 %a, 4
40  br i1 %cmp, label %bb, label %exit
41
42bb:
43  %mul = mul i8 %a, 50
44  ret i8 %mul
45
46exit:
47  ret i8 0
48}
49
50define i8 @test2(i8 %a) {
51; CHECK-LABEL: @test2(
52; CHECK-NEXT:  entry:
53; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 6
54; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
55; CHECK:       bb:
56; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i8 [[A]], 50
57; CHECK-NEXT:    ret i8 [[MUL]]
58; CHECK:       exit:
59; CHECK-NEXT:    ret i8 0
60;
61entry:
62  %cmp = icmp ult i8 %a, 6
63  br i1 %cmp, label %bb, label %exit
64
65bb:
66  %mul = mul i8 %a, 50
67  ret i8 %mul
68
69exit:
70  ret i8 0
71}
72
73define i8 @test3(i8 %a) {
74; CHECK-LABEL: @test3(
75; CHECK-NEXT:  entry:
76; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[A:%.*]], 7
77; CHECK-NEXT:    br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]]
78; CHECK:       bb:
79; CHECK-NEXT:    [[MUL:%.*]] = mul i8 [[A]], 50
80; CHECK-NEXT:    ret i8 [[MUL]]
81; CHECK:       exit:
82; CHECK-NEXT:    ret i8 0
83;
84entry:
85  %cmp = icmp ult i8 %a, 7
86  br i1 %cmp, label %bb, label %exit
87
88bb:
89  %mul = mul i8 %a, 50
90  ret i8 %mul
91
92exit:
93  ret i8 0
94}
95
96define i8 @test4(i8 %a) {
97; CHECK-LABEL: @test4(
98; CHECK-NEXT:  entry:
99; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[A:%.*]], 3
100; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i8 [[A]], -3
101; CHECK-NEXT:    [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
102; CHECK-NEXT:    br i1 [[COND]], label [[BB:%.*]], label [[EXIT:%.*]]
103; CHECK:       bb:
104; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i8 [[A]], 50
105; CHECK-NEXT:    ret i8 [[MUL]]
106; CHECK:       exit:
107; CHECK-NEXT:    ret i8 0
108;
109entry:
110  %cmp1 = icmp slt i8 %a, 3
111  %cmp2 = icmp sgt i8 %a, -3
112  %cond = and i1 %cmp1, %cmp2
113  br i1 %cond, label %bb, label %exit
114
115bb:
116  %mul = mul i8 %a, 50
117  ret i8 %mul
118
119exit:
120  ret i8 0
121}
122
123define i8 @test5(i8 %a) {
124; CHECK-LABEL: @test5(
125; CHECK-NEXT:  entry:
126; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[A:%.*]], 3
127; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i8 [[A]], -4
128; CHECK-NEXT:    [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
129; CHECK-NEXT:    br i1 [[COND]], label [[BB:%.*]], label [[EXIT:%.*]]
130; CHECK:       bb:
131; CHECK-NEXT:    [[MUL:%.*]] = mul i8 [[A]], 50
132; CHECK-NEXT:    ret i8 [[MUL]]
133; CHECK:       exit:
134; CHECK-NEXT:    ret i8 0
135;
136entry:
137  %cmp1 = icmp slt i8 %a, 3
138  %cmp2 = icmp sgt i8 %a, -4
139  %cond = and i1 %cmp1, %cmp2
140  br i1 %cond, label %bb, label %exit
141
142bb:
143  %mul = mul i8 %a, 50
144  ret i8 %mul
145
146exit:
147  ret i8 0
148}
149
150define i8 @test6(i8 %a) {
151; CHECK-LABEL: @test6(
152; CHECK-NEXT:  entry:
153; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[A:%.*]], 4
154; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i8 [[A]], -3
155; CHECK-NEXT:    [[COND:%.*]] = and i1 [[CMP1]], [[CMP2]]
156; CHECK-NEXT:    br i1 [[COND]], label [[BB:%.*]], label [[EXIT:%.*]]
157; CHECK:       bb:
158; CHECK-NEXT:    [[MUL:%.*]] = mul i8 [[A]], 50
159; CHECK-NEXT:    ret i8 [[MUL]]
160; CHECK:       exit:
161; CHECK-NEXT:    ret i8 0
162;
163entry:
164  %cmp1 = icmp slt i8 %a, 4
165  %cmp2 = icmp sgt i8 %a, -3
166  %cond = and i1 %cmp1, %cmp2
167  br i1 %cond, label %bb, label %exit
168
169bb:
170  %mul = mul i8 %a, 50
171  ret i8 %mul
172
173exit:
174  ret i8 0
175}
176
177define i1 @nuw_range1(i8 %b) {
178; CHECK-LABEL: @nuw_range1(
179; CHECK-NEXT:  entry:
180; CHECK-NEXT:    [[C:%.*]] = add nuw nsw i8 [[B:%.*]], 1
181; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i8 [[C]], 4
182; CHECK-NEXT:    ret i1 false
183;
184entry:
185  %c = add nuw nsw i8 %b, 1
186  %mul = mul nuw i8 %c, 4
187  %cmp = icmp eq i8 %mul, 0
188  ret i1 %cmp
189}
190
191define i1 @nuw_range2(i8 %b) {
192; CHECK-LABEL: @nuw_range2(
193; CHECK-NEXT:  entry:
194; CHECK-NEXT:    [[C:%.*]] = add nuw nsw i8 [[B:%.*]], 3
195; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i8 [[C]], 4
196; CHECK-NEXT:    ret i1 false
197;
198entry:
199  %c = add nuw nsw i8 %b, 3
200  %mul = mul nuw i8 %c, 4
201  %cmp = icmp ult i8 %mul, 2
202  ret i1 %cmp
203}
204
205define i1 @nsw_range1(i8 %b) {
206; CHECK-LABEL: @nsw_range1(
207; CHECK-NEXT:  entry:
208; CHECK-NEXT:    [[C:%.*]] = add nuw nsw i8 [[B:%.*]], -3
209; CHECK-NEXT:    [[MUL:%.*]] = mul nsw i8 [[C]], 4
210; CHECK-NEXT:    ret i1 false
211;
212entry:
213  %c = add nuw nsw i8 %b, -3
214  %mul = mul nsw i8 %c, 4
215  %cmp = icmp slt i8 %c, %mul
216  ret i1 %cmp
217}
218
219define i1 @one_bit(i1 %a, i1 %b) {
220; CHECK-LABEL: @one_bit(
221; CHECK-NEXT:    [[MUL:%.*]] = mul nuw i1 [[A:%.*]], [[B:%.*]]
222; CHECK-NEXT:    ret i1 [[MUL]]
223;
224  %mul = mul i1 %a, %b
225  ret i1 %mul
226}
227
228define i1 @test_mul_nuw_nsw_nneg(i32 %x, i32 range(i32 3, 2147483648) %y) {
229; CHECK-LABEL: @test_mul_nuw_nsw_nneg(
230; CHECK-NEXT:  entry:
231; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i32 [[X:%.*]], [[Y:%.*]]
232; CHECK-NEXT:    ret i1 true
233;
234entry:
235  %mul = mul nuw nsw i32 %x, %y
236  %cmp = icmp sgt i32 %mul, -1
237  ret i1 %cmp
238}
239
240define i1 @test_mul_nuw_nsw_nneg_complex(i32 %x, i32 noundef %y, i32 %z) {
241; CHECK-LABEL: @test_mul_nuw_nsw_nneg_complex(
242; CHECK-NEXT:  entry:
243; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[Y:%.*]], 2
244; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[X:%.*]], 0
245; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[CMP2]], i32 3, i32 4
246; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[CMP1]], i32 [[Y]], i32 [[SEL1]]
247; CHECK-NEXT:    [[MUL:%.*]] = mul nuw nsw i32 [[X]], [[SEL2]]
248; CHECK-NEXT:    ret i1 true
249;
250entry:
251  %cmp1 = icmp sgt i32 %y, 2
252  %cmp2 = icmp eq i32 %x, 0
253  %sel1 = select i1 %cmp2, i32 3, i32 4
254  %sel2 = select i1 %cmp1, i32 %y, i32 %sel1
255  %mul = mul nuw nsw i32 %x, %sel2
256  %cmp3 = icmp sgt i32 %mul, -1
257  ret i1 %cmp3
258}
259