1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s 3 4declare void @llvm.assume(i1) 5 6define i1 @test_shl_const_nuw_unsigned_1(i8 %start, i8 %high) { 7; CHECK-LABEL: @test_shl_const_nuw_unsigned_1( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 10; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 11; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 12; CHECK-NEXT: ret i1 true 13; 14entry: 15 %start.shl.4 = shl nuw i8 %start, 4 16 %c.1 = icmp ult i8 %start.shl.4, %high 17 call void @llvm.assume(i1 %c.1) 18 19 %t.1 = icmp ult i8 %start, %high 20 ret i1 %t.1 21} 22 23define i1 @test_shl_const_nuw_unsigned_2(i8 %start, i8 %high) { 24; CHECK-LABEL: @test_shl_const_nuw_unsigned_2( 25; CHECK-NEXT: entry: 26; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 27; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 28; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 29; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 30; CHECK-NEXT: ret i1 true 31; 32entry: 33 %start.shl.4 = shl nuw i8 %start, 4 34 %c.1 = icmp ult i8 %start.shl.4, %high 35 call void @llvm.assume(i1 %c.1) 36 37 %start.shl.2 = shl nuw i8 %start, 2 38 %t = icmp ult i8 %start.shl.2, %high 39 ret i1 %t 40} 41 42define i1 @test_shl_const_nuw_unsigned_3(i8 %start, i8 %high) { 43; CHECK-LABEL: @test_shl_const_nuw_unsigned_3( 44; CHECK-NEXT: entry: 45; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 46; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 47; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 48; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 49; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 50; CHECK-NEXT: ret i1 true 51; 52entry: 53 %start.shl.4 = shl nuw i8 %start, 4 54 %c.1 = icmp ult i8 %start.shl.4, %high 55 call void @llvm.assume(i1 %c.1) 56 57 %start.shl.2 = shl nuw i8 %start, 2 58 %start.add.1 = add nuw i8 %start, %start 59 %t = icmp ule i8 %start.add.1, %start.shl.2 60 ret i1 %t 61} 62 63define i1 @test_shl_const_nuw_unsigned_4(i8 %start, i8 %high) { 64; CHECK-LABEL: @test_shl_const_nuw_unsigned_4( 65; CHECK-NEXT: entry: 66; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 67; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 68; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 69; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 70; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 71; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]] 72; CHECK-NEXT: ret i1 [[F]] 73; 74entry: 75 %start.shl.4 = shl nuw i8 %start, 4 76 %c.1 = icmp ult i8 %start.shl.4, %high 77 call void @llvm.assume(i1 %c.1) 78 79 %start.shl.2 = shl nuw i8 %start, 2 80 %start.add.1 = add nuw i8 %start, %start 81 %f = icmp ult i8 %start.add.1, %start.shl.2 82 ret i1 %f 83} 84 85 86define i1 @test_shl_const_nuw_unsigned_5(i8 %start, i8 %high) { 87; CHECK-LABEL: @test_shl_const_nuw_unsigned_5( 88; CHECK-NEXT: entry: 89; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 90; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 91; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 92; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 93; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 94; CHECK-NEXT: ret i1 true 95; 96entry: 97 %start.shl.4 = shl nuw i8 %start, 4 98 %c.1 = icmp ult i8 %start.shl.4, %high 99 call void @llvm.assume(i1 %c.1) 100 101 %start.add.1 = add nuw i8 %start, %start 102 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 103 %t.4 = icmp ule i8 %start.add.2, %start.shl.4 104 ret i1 %t.4 105} 106 107define i1 @test_shl_const_nuw_unsigned_6(i8 %start, i8 %high) { 108; CHECK-LABEL: @test_shl_const_nuw_unsigned_6( 109; CHECK-NEXT: entry: 110; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 111; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 112; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 113; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 114; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 115; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]] 116; CHECK-NEXT: ret i1 [[F_2]] 117; 118entry: 119 %start.shl.4 = shl nuw i8 %start, 4 120 %c.1 = icmp ult i8 %start.shl.4, %high 121 call void @llvm.assume(i1 %c.1) 122 123 %start.add.1 = add nuw i8 %start, %start 124 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 125 %f.2 = icmp ult i8 %start.add.2, %start.shl.4 126 ret i1 %f.2 127} 128 129define i1 @test_shl_const_nuw_unsigned_7(i8 %start, i8 %high) { 130; CHECK-LABEL: @test_shl_const_nuw_unsigned_7( 131; CHECK-NEXT: entry: 132; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 133; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 134; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 135; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 136; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 137; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 138; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1 139; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]] 140; CHECK-NEXT: ret i1 [[F_3]] 141; 142entry: 143 %start.shl.4 = shl nuw i8 %start, 4 144 %c.1 = icmp ult i8 %start.shl.4, %high 145 call void @llvm.assume(i1 %c.1) 146 147 %start.shl.2 = shl nuw i8 %start, 2 148 %start.add.1 = add nuw i8 %start, %start 149 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 150 %start.add.2.1 = add nuw i8 %start.add.2, 1 151 %f.3 = icmp ule i8 %start.add.2.1, %start.shl.4 152 ret i1 %f.3 153} 154 155define i1 @test_shl_const_nuw_unsigned_8(i8 %start, i8 %high) { 156; CHECK-LABEL: @test_shl_const_nuw_unsigned_8( 157; CHECK-NEXT: entry: 158; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 159; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 160; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 161; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 162; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 163; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 164; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1 165; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3 166; CHECK-NEXT: ret i1 true 167; 168entry: 169 %start.shl.4 = shl nuw i8 %start, 4 170 %c.1 = icmp ult i8 %start.shl.4, %high 171 call void @llvm.assume(i1 %c.1) 172 173 %start.shl.2 = shl nuw i8 %start, 2 174 %start.add.1 = add nuw i8 %start, %start 175 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 176 %start.add.2.1 = add nuw i8 %start.add.2, 1 177 %start.shl.3 = shl nuw i8 %start, 3 178 %t.5 = icmp ule i8 %start.add.1, %start.shl.3 179 ret i1 %t.5 180} 181 182define i1 @test_shl_const_nuw_unsigned_9(i8 %start, i8 %high) { 183; CHECK-LABEL: @test_shl_const_nuw_unsigned_9( 184; CHECK-NEXT: entry: 185; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[START:%.*]], 4 186; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 187; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 188; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 189; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 190; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 191; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1 192; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3 193; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]] 194; CHECK-NEXT: ret i1 [[F_5]] 195; 196entry: 197 %start.shl.4 = shl nuw i8 %start, 4 198 %c.1 = icmp ult i8 %start.shl.4, %high 199 call void @llvm.assume(i1 %c.1) 200 201 %start.shl.2 = shl nuw i8 %start, 2 202 %start.add.1 = add nuw i8 %start, %start 203 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 204 %start.add.2.1 = add nuw i8 %start.add.2, 1 205 %start.shl.3 = shl nuw i8 %start, 3 206 %f.5 = icmp ult i8 %start.add.2, %start.shl.3 207 ret i1 %f.5 208} 209 210define i1 @test_shl_const_nuw_unsigned_10(i8 %start, i8 %high) { 211; CHECK-LABEL: @test_shl_const_nuw_unsigned_10( 212; CHECK-NEXT: entry: 213; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START:%.*]], 5 214; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 215; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 216; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3 217; CHECK-NEXT: ret i1 true 218; 219entry: 220 %start.shl.5 = shl nuw i8 %start, 5 221 %c.0 = icmp ult i8 %start, %start.shl.5 222 call void @llvm.assume(i1 %c.0) 223 224 %start.shl.3 = shl nuw i8 %start, 3 225 %t.1 = icmp ule i8 %start.shl.3, %start.shl.5 226 ret i1 %t.1 227} 228 229define i1 @test_shl_const_nuw_unsigned_11(i8 %start, i8 %high) { 230; CHECK-LABEL: @test_shl_const_nuw_unsigned_11( 231; CHECK-NEXT: entry: 232; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START:%.*]], 5 233; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 234; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 235; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3 236; CHECK-NEXT: ret i1 false 237; 238entry: 239 %start.shl.5 = shl nuw i8 %start, 5 240 %c.0 = icmp ult i8 %start, %start.shl.5 241 call void @llvm.assume(i1 %c.0) 242 243 %start.shl.3 = shl nuw i8 %start, 3 244 %c.1 = icmp ule i8 %start.shl.5, %start.shl.3 245 ret i1 %c.1 246} 247 248define i1 @test_shl_const_nuw_unsigned_12(i8 %start) { 249; CHECK-LABEL: @test_shl_const_nuw_unsigned_12( 250; CHECK-NEXT: entry: 251; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START:%.*]], 3 252; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_SHL_3]] 253; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 254; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START]], 5 255; CHECK-NEXT: ret i1 true 256; 257entry: 258 %start.shl.3 = shl nuw i8 %start, 3 259 %c.1 = icmp ult i8 %start, %start.shl.3 260 call void @llvm.assume(i1 %c.1) 261 262 %start.shl.5 = shl nuw i8 %start, 5 263 %t.1 = icmp ule i8 %start.shl.3, %start.shl.5 264 ret i1 %t.1 265} 266 267define i1 @test_shl_const_nuw_unsigned_13(i8 %start) { 268; CHECK-LABEL: @test_shl_const_nuw_unsigned_13( 269; CHECK-NEXT: entry: 270; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START:%.*]], 3 271; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START]], [[START_SHL_3]] 272; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 273; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START]], 5 274; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]] 275; CHECK-NEXT: ret i1 [[F_1]] 276; 277entry: 278 %start.shl.3 = shl i8 %start, 3 279 %c.1 = icmp ult i8 %start, %start.shl.3 280 call void @llvm.assume(i1 %c.1) 281 282 %start.shl.5 = shl i8 %start, 5 283 %f.1 = icmp ule i8 %start.shl.5, %start.shl.3 284 ret i1 %f.1 285} 286 287define i1 @test_shl_add_const_nuw_unsigned_1(i8 %start, i8 %high) { 288; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_1( 289; CHECK-NEXT: entry: 290; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 291; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 292; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 293; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 294; CHECK-NEXT: ret i1 true 295; 296entry: 297 %add = add nuw i8 %start, 3 298 %start.shl.4 = shl nuw i8 %add, 4 299 %c.1 = icmp ult i8 %start.shl.4, %high 300 call void @llvm.assume(i1 %c.1) 301 302 %t.1 = icmp ult i8 %start, %high 303 ret i1 %t.1 304} 305 306define i1 @test_shl_add_const_nuw_unsigned_2(i8 %start, i8 %high) { 307; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_2( 308; CHECK-NEXT: entry: 309; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 310; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 311; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 312; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 313; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 314; CHECK-NEXT: ret i1 true 315; 316entry: 317 %add = add nuw i8 %start, 3 318 %start.shl.4 = shl nuw i8 %add, 4 319 %c.1 = icmp ult i8 %start.shl.4, %high 320 call void @llvm.assume(i1 %c.1) 321 322 %start.shl.2 = shl nuw i8 %start, 2 323 %t.2 = icmp ult i8 %start.shl.2, %high 324 ret i1 %t.2 325} 326 327define i1 @test_shl_add_const_nuw_unsigned_3(i8 %start, i8 %high) { 328; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_3( 329; CHECK-NEXT: entry: 330; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 331; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 332; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 333; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 334; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 335; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 336; CHECK-NEXT: ret i1 true 337; 338entry: 339 %add = add nuw i8 %start, 3 340 %start.shl.4 = shl nuw i8 %add, 4 341 %c.1 = icmp ult i8 %start.shl.4, %high 342 call void @llvm.assume(i1 %c.1) 343 344 %start.add.1 = add nuw i8 %start, %start 345 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 346 %t.3 = icmp ule i8 %start.add.2, %start.shl.4 347 ret i1 %t.3 348} 349 350define i1 @test_shl_add_const_nuw_unsigned_4(i8 %start, i8 %high) { 351; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_4( 352; CHECK-NEXT: entry: 353; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 354; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 355; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 356; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 357; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nuw i8 [[START]], 2 358; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 359; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 360; CHECK-NEXT: ret i1 true 361; 362entry: 363 %add = add nuw i8 %start, 3 364 %start.shl.4 = shl nuw i8 %add, 4 365 %c.1 = icmp ult i8 %start.shl.4, %high 366 call void @llvm.assume(i1 %c.1) 367 368 %start.shl.2 = shl nuw i8 %start, 2 369 %start.add.1 = add nuw i8 %start, %start 370 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 371 %t.4 = icmp ult i8 %start.add.2, %start.shl.4 372 ret i1 %t.4 373} 374 375define i1 @test_shl_add_const_nuw_unsigned_5(i8 %start, i8 %high) { 376; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_5( 377; CHECK-NEXT: entry: 378; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 379; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 380; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 381; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 382; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 383; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 384; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nuw i8 [[START_ADD_2]], 12 385; CHECK-NEXT: ret i1 true 386; 387entry: 388 %add = add nuw i8 %start, 3 389 %start.shl.4 = shl nuw i8 %add, 4 390 %c.1 = icmp ult i8 %start.shl.4, %high 391 call void @llvm.assume(i1 %c.1) 392 393 %start.add.1 = add nuw i8 %start, %start 394 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 395 %start.add.2.12 = add nuw i8 %start.add.2, 12 396 %t.5 = icmp ule i8 %start.add.2.12, %start.shl.4 397 ret i1 %t.5 398} 399 400define i1 @test_shl_add_const_nuw_unsigned_6(i8 %start, i8 %high) { 401; CHECK-LABEL: @test_shl_add_const_nuw_unsigned_6( 402; CHECK-NEXT: entry: 403; CHECK-NEXT: [[ADD:%.*]] = add nuw i8 [[START:%.*]], 3 404; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nuw i8 [[ADD]], 4 405; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 406; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 407; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]] 408; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]] 409; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nuw i8 [[START_ADD_2]], 13 410; CHECK-NEXT: ret i1 true 411; 412entry: 413 %add = add nuw i8 %start, 3 414 %start.shl.4 = shl nuw i8 %add, 4 415 %c.1 = icmp ult i8 %start.shl.4, %high 416 call void @llvm.assume(i1 %c.1) 417 418 %start.add.1 = add nuw i8 %start, %start 419 %start.add.2 = add nuw i8 %start.add.1, %start.add.1 420 %start.add.2.13 = add nuw i8 %start.add.2, 13 421 %f.1 = icmp ule i8 %start.add.2.13, %start.shl.4 422 ret i1 %f.1 423} 424 425define i1 @test_shl_const_nsw_unsigned_1(i8 %start, i8 %high) { 426; CHECK-LABEL: @test_shl_const_nsw_unsigned_1( 427; CHECK-NEXT: entry: 428; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 429; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 430; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 431; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]] 432; CHECK-NEXT: ret i1 [[T_1]] 433; 434entry: 435 %start.shl.4 = shl nsw i8 %start, 4 436 %c.1 = icmp ult i8 %start.shl.4, %high 437 call void @llvm.assume(i1 %c.1) 438 439 %t.1 = icmp ult i8 %start, %high 440 ret i1 %t.1 441} 442 443define i1 @test_shl_const_nsw_unsigned_2(i8 %start, i8 %high) { 444; CHECK-LABEL: @test_shl_const_nsw_unsigned_2( 445; CHECK-NEXT: entry: 446; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 447; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 448; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 449; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 450; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]] 451; CHECK-NEXT: ret i1 [[T]] 452; 453entry: 454 %start.shl.4 = shl nsw i8 %start, 4 455 %c.1 = icmp ult i8 %start.shl.4, %high 456 call void @llvm.assume(i1 %c.1) 457 458 %start.shl.2 = shl nsw i8 %start, 2 459 %t = icmp ult i8 %start.shl.2, %high 460 ret i1 %t 461} 462 463define i1 @test_shl_const_nsw_unsigned_3(i8 %start, i8 %high) { 464; CHECK-LABEL: @test_shl_const_nsw_unsigned_3( 465; CHECK-NEXT: entry: 466; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 467; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 468; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 469; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 470; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 471; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_2]] 472; CHECK-NEXT: ret i1 [[T]] 473; 474entry: 475 %start.shl.4 = shl nsw i8 %start, 4 476 %c.1 = icmp ult i8 %start.shl.4, %high 477 call void @llvm.assume(i1 %c.1) 478 479 %start.shl.2 = shl nsw i8 %start, 2 480 %start.add.1 = add nsw i8 %start, %start 481 %t = icmp ule i8 %start.add.1, %start.shl.2 482 ret i1 %t 483} 484 485 486define i1 @test_shl_const_nsw_unsigned_4(i8 %start, i8 %high) { 487; CHECK-LABEL: @test_shl_const_nsw_unsigned_4( 488; CHECK-NEXT: entry: 489; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 490; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 491; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 492; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 493; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 494; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]] 495; CHECK-NEXT: ret i1 [[F]] 496; 497entry: 498 %start.shl.4 = shl nsw i8 %start, 4 499 %c.1 = icmp ult i8 %start.shl.4, %high 500 call void @llvm.assume(i1 %c.1) 501 502 %start.shl.2 = shl nsw i8 %start, 2 503 %start.add.1 = add nsw i8 %start, %start 504 %f = icmp ult i8 %start.add.1, %start.shl.2 505 ret i1 %f 506} 507 508 509define i1 @test_shl_const_nsw_unsigned_5(i8 %start, i8 %high) { 510; CHECK-LABEL: @test_shl_const_nsw_unsigned_5( 511; CHECK-NEXT: entry: 512; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 513; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 514; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 515; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 516; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 517; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]] 518; CHECK-NEXT: ret i1 [[T_4]] 519; 520entry: 521 %start.shl.4 = shl nsw i8 %start, 4 522 %c.1 = icmp ult i8 %start.shl.4, %high 523 call void @llvm.assume(i1 %c.1) 524 525 %start.add.1 = add nsw i8 %start, %start 526 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 527 %t.4 = icmp ule i8 %start.add.2, %start.shl.4 528 ret i1 %t.4 529} 530 531define i1 @test_shl_const_nsw_unsigned_6(i8 %start, i8 %high) { 532; CHECK-LABEL: @test_shl_const_nsw_unsigned_6( 533; CHECK-NEXT: entry: 534; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 535; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 536; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 537; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 538; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 539; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]] 540; CHECK-NEXT: ret i1 [[F_2]] 541; 542entry: 543 %start.shl.4 = shl nsw i8 %start, 4 544 %c.1 = icmp ult i8 %start.shl.4, %high 545 call void @llvm.assume(i1 %c.1) 546 547 %start.add.1 = add nsw i8 %start, %start 548 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 549 %f.2 = icmp ult i8 %start.add.2, %start.shl.4 550 ret i1 %f.2 551} 552 553define i1 @test_shl_const_nsw_unsigned_7(i8 %start, i8 %high) { 554; CHECK-LABEL: @test_shl_const_nsw_unsigned_7( 555; CHECK-NEXT: entry: 556; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 557; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 558; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 559; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 560; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 561; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 562; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1 563; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]] 564; CHECK-NEXT: ret i1 [[F_3]] 565; 566entry: 567 %start.shl.4 = shl nsw i8 %start, 4 568 %c.1 = icmp ult i8 %start.shl.4, %high 569 call void @llvm.assume(i1 %c.1) 570 571 %start.shl.2 = shl nsw i8 %start, 2 572 %start.add.1 = add nsw i8 %start, %start 573 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 574 %start.add.2.1 = add nsw i8 %start.add.2, 1 575 %f.3 = icmp ule i8 %start.add.2.1, %start.shl.4 576 ret i1 %f.3 577} 578 579define i1 @test_shl_const_nsw_unsigned_8(i8 %start, i8 %high) { 580; CHECK-LABEL: @test_shl_const_nsw_unsigned_8( 581; CHECK-NEXT: entry: 582; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 583; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 584; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 585; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 586; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 587; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 588; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1 589; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3 590; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_3]] 591; CHECK-NEXT: ret i1 [[T_5]] 592; 593entry: 594 %start.shl.4 = shl nsw i8 %start, 4 595 %c.1 = icmp ult i8 %start.shl.4, %high 596 call void @llvm.assume(i1 %c.1) 597 598 %start.shl.2 = shl nsw i8 %start, 2 599 %start.add.1 = add nsw i8 %start, %start 600 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 601 %start.add.2.1 = add nsw i8 %start.add.2, 1 602 %start.shl.3 = shl nsw i8 %start, 3 603 %t.5 = icmp ule i8 %start.add.1, %start.shl.3 604 ret i1 %t.5 605} 606 607define i1 @test_shl_const_nsw_unsigned_9(i8 %start, i8 %high) { 608; CHECK-LABEL: @test_shl_const_nsw_unsigned_9( 609; CHECK-NEXT: entry: 610; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[START:%.*]], 4 611; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 612; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 613; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 614; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 615; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 616; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nsw i8 [[START_ADD_2]], 1 617; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3 618; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]] 619; CHECK-NEXT: ret i1 [[F_5]] 620; 621entry: 622 %start.shl.4 = shl nsw i8 %start, 4 623 %c.1 = icmp ult i8 %start.shl.4, %high 624 call void @llvm.assume(i1 %c.1) 625 626 %start.shl.2 = shl nsw i8 %start, 2 627 %start.add.1 = add nsw i8 %start, %start 628 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 629 %start.add.2.1 = add nsw i8 %start.add.2, 1 630 %start.shl.3 = shl nsw i8 %start, 3 631 %f.5 = icmp ult i8 %start.add.2, %start.shl.3 632 ret i1 %f.5 633} 634 635define i1 @test_shl_const_nsw_unsigned_10(i8 %start, i8 %high) { 636; CHECK-LABEL: @test_shl_const_nsw_unsigned_10( 637; CHECK-NEXT: entry: 638; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nsw i8 [[START:%.*]], 5 639; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 640; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 641; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3 642; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]] 643; CHECK-NEXT: ret i1 [[T_1]] 644; 645entry: 646 %start.shl.5 = shl nsw i8 %start, 5 647 %c.0 = icmp ult i8 %start, %start.shl.5 648 call void @llvm.assume(i1 %c.0) 649 650 %start.shl.3 = shl nsw i8 %start, 3 651 %t.1 = icmp ule i8 %start.shl.3, %start.shl.5 652 ret i1 %t.1 653} 654 655define i1 @test_shl_const_nsw_unsigned_11(i8 %start, i8 %high) { 656; CHECK-LABEL: @test_shl_const_nsw_unsigned_11( 657; CHECK-NEXT: entry: 658; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nsw i8 [[START:%.*]], 5 659; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 660; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 661; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START]], 3 662; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]] 663; CHECK-NEXT: ret i1 [[C_1]] 664; 665entry: 666 %start.shl.5 = shl nsw i8 %start, 5 667 %c.0 = icmp ult i8 %start, %start.shl.5 668 call void @llvm.assume(i1 %c.0) 669 670 %start.shl.3 = shl nsw i8 %start, 3 671 %c.1 = icmp ule i8 %start.shl.5, %start.shl.3 672 ret i1 %c.1 673} 674 675define i1 @test_shl_add_const_nsw_unsigned_1(i8 %start, i8 %high) { 676; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_1( 677; CHECK-NEXT: entry: 678; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 679; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 680; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 681; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 682; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]] 683; CHECK-NEXT: ret i1 [[T_1]] 684; 685entry: 686 %add = add nsw i8 %start, 3 687 %start.shl.4 = shl nsw i8 %add, 4 688 %c.1 = icmp ult i8 %start.shl.4, %high 689 call void @llvm.assume(i1 %c.1) 690 691 %t.1 = icmp ult i8 %start, %high 692 ret i1 %t.1 693} 694 695define i1 @test_shl_add_const_nsw_unsigned_2(i8 %start, i8 %high) { 696; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_2( 697; CHECK-NEXT: entry: 698; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 699; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 700; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 701; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 702; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 703; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]] 704; CHECK-NEXT: ret i1 [[T_2]] 705; 706entry: 707 %add = add nsw i8 %start, 3 708 %start.shl.4 = shl nsw i8 %add, 4 709 %c.1 = icmp ult i8 %start.shl.4, %high 710 call void @llvm.assume(i1 %c.1) 711 712 %start.shl.2 = shl nsw i8 %start, 2 713 %t.2 = icmp ult i8 %start.shl.2, %high 714 ret i1 %t.2 715} 716 717define i1 @test_shl_add_const_nsw_unsigned_3(i8 %start, i8 %high) { 718; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_3( 719; CHECK-NEXT: entry: 720; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 721; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 722; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 723; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 724; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 725; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 726; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]] 727; CHECK-NEXT: ret i1 [[T_3]] 728; 729entry: 730 %add = add nsw i8 %start, 3 731 %start.shl.4 = shl nsw i8 %add, 4 732 %c.1 = icmp ult i8 %start.shl.4, %high 733 call void @llvm.assume(i1 %c.1) 734 735 %start.add.1 = add nsw i8 %start, %start 736 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 737 %t.3 = icmp ule i8 %start.add.2, %start.shl.4 738 ret i1 %t.3 739} 740 741define i1 @test_shl_add_const_nsw_unsigned_4(i8 %start, i8 %high) { 742; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_4( 743; CHECK-NEXT: entry: 744; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 745; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 746; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 747; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 748; CHECK-NEXT: [[START_SHL_2:%.*]] = shl nsw i8 [[START]], 2 749; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 750; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 751; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]] 752; CHECK-NEXT: ret i1 [[T_4]] 753; 754entry: 755 %add = add nsw i8 %start, 3 756 %start.shl.4 = shl nsw i8 %add, 4 757 %c.1 = icmp ult i8 %start.shl.4, %high 758 call void @llvm.assume(i1 %c.1) 759 760 %start.shl.2 = shl nsw i8 %start, 2 761 %start.add.1 = add nsw i8 %start, %start 762 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 763 %t.4 = icmp ult i8 %start.add.2, %start.shl.4 764 ret i1 %t.4 765} 766 767define i1 @test_shl_add_const_nsw_unsigned_5(i8 %start, i8 %high) { 768; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_5( 769; CHECK-NEXT: entry: 770; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 771; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 772; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 773; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 774; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 775; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 776; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nsw i8 [[START_ADD_2]], 12 777; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_SHL_4]] 778; CHECK-NEXT: ret i1 [[T_5]] 779; 780entry: 781 %add = add nsw i8 %start, 3 782 %start.shl.4 = shl nsw i8 %add, 4 783 %c.1 = icmp ult i8 %start.shl.4, %high 784 call void @llvm.assume(i1 %c.1) 785 786 %start.add.1 = add nsw i8 %start, %start 787 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 788 %start.add.2.12 = add nsw i8 %start.add.2, 12 789 %t.5 = icmp ule i8 %start.add.2.12, %start.shl.4 790 ret i1 %t.5 791} 792 793define i1 @test_shl_add_const_nsw_unsigned_6(i8 %start, i8 %high) { 794; CHECK-LABEL: @test_shl_add_const_nsw_unsigned_6( 795; CHECK-NEXT: entry: 796; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3 797; CHECK-NEXT: [[START_SHL_4:%.*]] = shl nsw i8 [[ADD]], 4 798; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 799; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 800; CHECK-NEXT: [[START_ADD_1:%.*]] = add nsw i8 [[START]], [[START]] 801; CHECK-NEXT: [[START_ADD_2:%.*]] = add nsw i8 [[START_ADD_1]], [[START_ADD_1]] 802; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nsw i8 [[START_ADD_2]], 13 803; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_SHL_4]] 804; CHECK-NEXT: ret i1 [[F_1]] 805; 806entry: 807 %add = add nsw i8 %start, 3 808 %start.shl.4 = shl nsw i8 %add, 4 809 %c.1 = icmp ult i8 %start.shl.4, %high 810 call void @llvm.assume(i1 %c.1) 811 812 %start.add.1 = add nsw i8 %start, %start 813 %start.add.2 = add nsw i8 %start.add.1, %start.add.1 814 %start.add.2.13 = add nsw i8 %start.add.2, 13 815 %f.1 = icmp ule i8 %start.add.2.13, %start.shl.4 816 ret i1 %f.1 817} 818 819define i1 @test_shl_const_no_nuw_unsigned_1(i8 %start, i8 %high) { 820; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_1( 821; CHECK-NEXT: entry: 822; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 823; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 824; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 825; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]] 826; CHECK-NEXT: ret i1 [[T_1]] 827; 828entry: 829 %start.shl.4 = shl i8 %start, 4 830 %c.1 = icmp ult i8 %start.shl.4, %high 831 call void @llvm.assume(i1 %c.1) 832 833 %t.1 = icmp ult i8 %start, %high 834 ret i1 %t.1 835} 836 837define i1 @test_shl_const_no_nuw_unsigned_2(i8 %start, i8 %high) { 838; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_2( 839; CHECK-NEXT: entry: 840; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 841; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 842; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 843; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 844; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]] 845; CHECK-NEXT: ret i1 [[T]] 846; 847entry: 848 %start.shl.4 = shl i8 %start, 4 849 %c.1 = icmp ult i8 %start.shl.4, %high 850 call void @llvm.assume(i1 %c.1) 851 852 %start.shl.2 = shl i8 %start, 2 853 %t = icmp ult i8 %start.shl.2, %high 854 ret i1 %t 855} 856 857define i1 @test_shl_const_no_nuw_unsigned_3(i8 %start, i8 %high) { 858; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_3( 859; CHECK-NEXT: entry: 860; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 861; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 862; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 863; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 864; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 865; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_2]] 866; CHECK-NEXT: ret i1 [[T]] 867; 868entry: 869 %start.shl.4 = shl i8 %start, 4 870 %c.1 = icmp ult i8 %start.shl.4, %high 871 call void @llvm.assume(i1 %c.1) 872 873 %start.shl.2 = shl i8 %start, 2 874 %start.add.1 = add i8 %start, %start 875 %t = icmp ule i8 %start.add.1, %start.shl.2 876 ret i1 %t 877} 878 879 880define i1 @test_shl_const_no_nuw_unsigned_4(i8 %start, i8 %high) { 881; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_4( 882; CHECK-NEXT: entry: 883; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 884; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 885; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 886; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 887; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 888; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_SHL_2]] 889; CHECK-NEXT: ret i1 [[F]] 890; 891entry: 892 %start.shl.4 = shl i8 %start, 4 893 %c.1 = icmp ult i8 %start.shl.4, %high 894 call void @llvm.assume(i1 %c.1) 895 896 %start.shl.2 = shl i8 %start, 2 897 %start.add.1 = add i8 %start, %start 898 %f = icmp ult i8 %start.add.1, %start.shl.2 899 ret i1 %f 900} 901 902 903define i1 @test_shl_const_no_nuw_unsigned_5(i8 %start, i8 %high) { 904; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_5( 905; CHECK-NEXT: entry: 906; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 907; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 908; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 909; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 910; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 911; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]] 912; CHECK-NEXT: ret i1 [[T_4]] 913; 914entry: 915 %start.shl.4 = shl i8 %start, 4 916 %c.1 = icmp ult i8 %start.shl.4, %high 917 call void @llvm.assume(i1 %c.1) 918 919 %start.add.1 = add i8 %start, %start 920 %start.add.2 = add i8 %start.add.1, %start.add.1 921 %t.4 = icmp ule i8 %start.add.2, %start.shl.4 922 ret i1 %t.4 923} 924 925define i1 @test_shl_const_no_nuw_unsigned_6(i8 %start, i8 %high) { 926; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_6( 927; CHECK-NEXT: entry: 928; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 929; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 930; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 931; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 932; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 933; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]] 934; CHECK-NEXT: ret i1 [[F_2]] 935; 936entry: 937 %start.shl.4 = shl i8 %start, 4 938 %c.1 = icmp ult i8 %start.shl.4, %high 939 call void @llvm.assume(i1 %c.1) 940 941 %start.add.1 = add i8 %start, %start 942 %start.add.2 = add i8 %start.add.1, %start.add.1 943 %f.2 = icmp ult i8 %start.add.2, %start.shl.4 944 ret i1 %f.2 945} 946 947define i1 @test_shl_const_no_nuw_unsigned_7(i8 %start, i8 %high) { 948; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_7( 949; CHECK-NEXT: entry: 950; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 951; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 952; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 953; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 954; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 955; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 956; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1 957; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_SHL_4]] 958; CHECK-NEXT: ret i1 [[F_3]] 959; 960entry: 961 %start.shl.4 = shl i8 %start, 4 962 %c.1 = icmp ult i8 %start.shl.4, %high 963 call void @llvm.assume(i1 %c.1) 964 965 %start.shl.2 = shl i8 %start, 2 966 %start.add.1 = add i8 %start, %start 967 %start.add.2 = add i8 %start.add.1, %start.add.1 968 %start.add.2.1 = add i8 %start.add.2, 1 969 %f.3 = icmp ule i8 %start.add.2.1, %start.shl.4 970 ret i1 %f.3 971} 972 973define i1 @test_shl_const_no_nuw_unsigned_8(i8 %start, i8 %high) { 974; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_8( 975; CHECK-NEXT: entry: 976; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 977; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 978; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 979; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 980; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 981; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 982; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1 983; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3 984; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_SHL_3]] 985; CHECK-NEXT: ret i1 [[T_5]] 986; 987entry: 988 %start.shl.4 = shl i8 %start, 4 989 %c.1 = icmp ult i8 %start.shl.4, %high 990 call void @llvm.assume(i1 %c.1) 991 992 %start.shl.2 = shl i8 %start, 2 993 %start.add.1 = add i8 %start, %start 994 %start.add.2 = add i8 %start.add.1, %start.add.1 995 %start.add.2.1 = add i8 %start.add.2, 1 996 %start.shl.3 = shl i8 %start, 3 997 %t.5 = icmp ule i8 %start.add.1, %start.shl.3 998 ret i1 %t.5 999} 1000 1001define i1 @test_shl_const_no_nuw_unsigned_9(i8 %start, i8 %high) { 1002; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_9( 1003; CHECK-NEXT: entry: 1004; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[START:%.*]], 4 1005; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1006; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1007; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 1008; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 1009; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 1010; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add i8 [[START_ADD_2]], 1 1011; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3 1012; CHECK-NEXT: [[F_5:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_3]] 1013; CHECK-NEXT: ret i1 [[F_5]] 1014; 1015entry: 1016 %start.shl.4 = shl i8 %start, 4 1017 %c.1 = icmp ult i8 %start.shl.4, %high 1018 call void @llvm.assume(i1 %c.1) 1019 1020 %start.shl.2 = shl i8 %start, 2 1021 %start.add.1 = add i8 %start, %start 1022 %start.add.2 = add i8 %start.add.1, %start.add.1 1023 %start.add.2.1 = add i8 %start.add.2, 1 1024 %start.shl.3 = shl i8 %start, 3 1025 %f.5 = icmp ult i8 %start.add.2, %start.shl.3 1026 ret i1 %f.5 1027} 1028 1029define i1 @test_shl_const_no_nuw_unsigned_10(i8 %start, i8 %high) { 1030; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_10( 1031; CHECK-NEXT: entry: 1032; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START:%.*]], 5 1033; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 1034; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 1035; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3 1036; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]] 1037; CHECK-NEXT: ret i1 [[T_1]] 1038; 1039entry: 1040 %start.shl.5 = shl i8 %start, 5 1041 %c.0 = icmp ult i8 %start, %start.shl.5 1042 call void @llvm.assume(i1 %c.0) 1043 1044 %start.shl.3 = shl i8 %start, 3 1045 %t.1 = icmp ule i8 %start.shl.3, %start.shl.5 1046 ret i1 %t.1 1047} 1048 1049define i1 @test_shl_const_no_nuw_unsigned_11(i8 %start, i8 %high) { 1050; CHECK-LABEL: @test_shl_const_no_nuw_unsigned_11( 1051; CHECK-NEXT: entry: 1052; CHECK-NEXT: [[START_SHL_5:%.*]] = shl i8 [[START:%.*]], 5 1053; CHECK-NEXT: [[C_0:%.*]] = icmp ult i8 [[START]], [[START_SHL_5]] 1054; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 1055; CHECK-NEXT: [[START_SHL_3:%.*]] = shl i8 [[START]], 3 1056; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]] 1057; CHECK-NEXT: ret i1 [[C_1]] 1058; 1059entry: 1060 %start.shl.5 = shl i8 %start, 5 1061 %c.0 = icmp ult i8 %start, %start.shl.5 1062 call void @llvm.assume(i1 %c.0) 1063 1064 %start.shl.3 = shl i8 %start, 3 1065 %c.1 = icmp ule i8 %start.shl.5, %start.shl.3 1066 ret i1 %c.1 1067} 1068 1069define i1 @test_shl_add_const_no_nuw_unsigned_1(i8 %start, i8 %high) { 1070; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_1( 1071; CHECK-NEXT: entry: 1072; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1073; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1074; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1075; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1076; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START]], [[HIGH]] 1077; CHECK-NEXT: ret i1 [[T_1]] 1078; 1079entry: 1080 %add = add i8 %start, 3 1081 %start.shl.4 = shl i8 %add, 4 1082 %c.1 = icmp ult i8 %start.shl.4, %high 1083 call void @llvm.assume(i1 %c.1) 1084 1085 %t.1 = icmp ult i8 %start, %high 1086 ret i1 %t.1 1087} 1088 1089define i1 @test_shl_add_const_no_nuw_unsigned_2(i8 %start, i8 %high) { 1090; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_2( 1091; CHECK-NEXT: entry: 1092; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1093; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1094; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1095; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1096; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 1097; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_SHL_2]], [[HIGH]] 1098; CHECK-NEXT: ret i1 [[T_2]] 1099; 1100entry: 1101 %add = add i8 %start, 3 1102 %start.shl.4 = shl i8 %add, 4 1103 %c.1 = icmp ult i8 %start.shl.4, %high 1104 call void @llvm.assume(i1 %c.1) 1105 1106 %start.shl.2 = shl i8 %start, 2 1107 %t.2 = icmp ult i8 %start.shl.2, %high 1108 ret i1 %t.2 1109} 1110 1111define i1 @test_shl_add_const_no_nuw_unsigned_3(i8 %start, i8 %high) { 1112; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_3( 1113; CHECK-NEXT: entry: 1114; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1115; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1116; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1117; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1118; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 1119; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 1120; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_SHL_4]] 1121; CHECK-NEXT: ret i1 [[T_3]] 1122; 1123entry: 1124 %add = add i8 %start, 3 1125 %start.shl.4 = shl i8 %add, 4 1126 %c.1 = icmp ult i8 %start.shl.4, %high 1127 call void @llvm.assume(i1 %c.1) 1128 1129 %start.add.1 = add i8 %start, %start 1130 %start.add.2 = add i8 %start.add.1, %start.add.1 1131 %t.3 = icmp ule i8 %start.add.2, %start.shl.4 1132 ret i1 %t.3 1133} 1134 1135define i1 @test_shl_add_const_no_nuw_unsigned_4(i8 %start, i8 %high) { 1136; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_4( 1137; CHECK-NEXT: entry: 1138; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1139; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1140; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1141; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1142; CHECK-NEXT: [[START_SHL_2:%.*]] = shl i8 [[START]], 2 1143; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 1144; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 1145; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_SHL_4]] 1146; CHECK-NEXT: ret i1 [[T_4]] 1147; 1148entry: 1149 %add = add i8 %start, 3 1150 %start.shl.4 = shl i8 %add, 4 1151 %c.1 = icmp ult i8 %start.shl.4, %high 1152 call void @llvm.assume(i1 %c.1) 1153 1154 %start.shl.2 = shl i8 %start, 2 1155 %start.add.1 = add i8 %start, %start 1156 %start.add.2 = add i8 %start.add.1, %start.add.1 1157 %t.4 = icmp ult i8 %start.add.2, %start.shl.4 1158 ret i1 %t.4 1159} 1160 1161define i1 @test_shl_add_const_no_nuw_unsigned_5(i8 %start, i8 %high) { 1162; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_5( 1163; CHECK-NEXT: entry: 1164; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1165; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1166; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1167; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1168; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 1169; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 1170; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add i8 [[START_ADD_2]], 12 1171; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_SHL_4]] 1172; CHECK-NEXT: ret i1 [[T_5]] 1173; 1174entry: 1175 %add = add i8 %start, 3 1176 %start.shl.4 = shl i8 %add, 4 1177 %c.1 = icmp ult i8 %start.shl.4, %high 1178 call void @llvm.assume(i1 %c.1) 1179 1180 %start.add.1 = add i8 %start, %start 1181 %start.add.2 = add i8 %start.add.1, %start.add.1 1182 %start.add.2.12 = add i8 %start.add.2, 12 1183 %t.5 = icmp ule i8 %start.add.2.12, %start.shl.4 1184 ret i1 %t.5 1185} 1186 1187define i1 @test_shl_add_const_no_nuw_unsigned_6(i8 %start, i8 %high) { 1188; CHECK-LABEL: @test_shl_add_const_no_nuw_unsigned_6( 1189; CHECK-NEXT: entry: 1190; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], 3 1191; CHECK-NEXT: [[START_SHL_4:%.*]] = shl i8 [[ADD]], 4 1192; CHECK-NEXT: [[C_1:%.*]] = icmp ult i8 [[START_SHL_4]], [[HIGH:%.*]] 1193; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1194; CHECK-NEXT: [[START_ADD_1:%.*]] = add i8 [[START]], [[START]] 1195; CHECK-NEXT: [[START_ADD_2:%.*]] = add i8 [[START_ADD_1]], [[START_ADD_1]] 1196; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add i8 [[START_ADD_2]], 13 1197; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_SHL_4]] 1198; CHECK-NEXT: ret i1 [[F_1]] 1199; 1200entry: 1201 %add = add i8 %start, 3 1202 %start.shl.4 = shl i8 %add, 4 1203 %c.1 = icmp ult i8 %start.shl.4, %high 1204 call void @llvm.assume(i1 %c.1) 1205 1206 %start.add.1 = add i8 %start, %start 1207 %start.add.2 = add i8 %start.add.1, %start.add.1 1208 %start.add.2.13 = add i8 %start.add.2, 13 1209 %f.1 = icmp ule i8 %start.add.2.13, %start.shl.4 1210 ret i1 %f.1 1211} 1212 1213define i1 @shl_overflow(i64 %start) { 1214; CHECK-LABEL: @shl_overflow( 1215; CHECK-NEXT: entry: 1216; CHECK-NEXT: [[PRE_COND:%.*]] = icmp ugt i64 [[START:%.*]], 0 1217; CHECK-NEXT: br i1 [[PRE_COND]], label [[MAIN:%.*]], label [[EXIT:%.*]] 1218; CHECK: main: 1219; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[START]], -1 1220; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[TMP0]], [[START]] 1221; CHECK-NEXT: ret i1 [[TMP1]] 1222; CHECK: exit: 1223; CHECK-NEXT: ret i1 false 1224; 1225entry: 1226 %pre.cond = icmp ugt i64 %start, 0 1227 br i1 %pre.cond, label %main, label %exit 1228 1229main: 1230 %0 = shl nuw nsw i64 %start, -1 1231 %1 = icmp uge i64 %0, %start 1232 ret i1 %1 1233 1234exit: 1235 ret i1 0 1236} 1237 1238 1239define i1 @shl_overflow_2() { 1240; CHECK-LABEL: @shl_overflow_2( 1241; CHECK-NEXT: entry: 1242; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 0, 64 1243; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 0 1244; CHECK-NEXT: ret i1 [[SHL_CMP]] 1245; 1246entry: 1247 %shl.ub = shl nuw nsw i256 0, 64 1248 %shl.cmp = icmp uge i256 %shl.ub, 0 1249 ret i1 %shl.cmp 1250} 1251 1252define i1 @shl_overflow_3() { 1253; CHECK-LABEL: @shl_overflow_3( 1254; CHECK-NEXT: entry: 1255; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 0, 65 1256; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 0 1257; CHECK-NEXT: ret i1 [[SHL_CMP]] 1258; 1259entry: 1260 %shl.ub = shl nuw nsw i256 0, 65 1261 %shl.cmp = icmp uge i256 %shl.ub, 0 1262 ret i1 %shl.cmp 1263} 1264 1265define i1 @shl_55() { 1266; CHECK-LABEL: @shl_55( 1267; CHECK-NEXT: entry: 1268; CHECK-NEXT: [[SHL_UB:%.*]] = shl nuw nsw i256 1, 55 1269; CHECK-NEXT: [[SHL_CMP:%.*]] = icmp uge i256 [[SHL_UB]], 1 1270; CHECK-NEXT: ret i1 [[SHL_CMP]] 1271; 1272entry: 1273 %shl.ub = shl nuw nsw i256 1, 55 1274 %shl.cmp = icmp uge i256 %shl.ub, 1 1275 ret i1 %shl.cmp 1276} 1277 1278define i1 @shl_nsw_x8_slt_x7(i8 %start, i8 %high) { 1279; CHECK-LABEL: @shl_nsw_x8_slt_x7( 1280; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0 1281; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 1282; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3 1283; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]] 1284; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1285; CHECK-NEXT: [[START_MUL_7:%.*]] = mul nsw i8 [[START]], 7 1286; CHECK-NEXT: ret i1 true 1287; 1288 %c.0 = icmp sge i8 %high, 0 1289 call void @llvm.assume(i1 %c.0) 1290 1291 %start.shl.3 = shl nsw i8 %start, 3 1292 %c.1 = icmp slt i8 %start.shl.3, %high 1293 call void @llvm.assume(i1 %c.1) 1294 1295 %start.mul.7 = mul nsw i8 %start, 7 1296 %t.1 = icmp slt i8 %start.mul.7, %high 1297 ret i1 %t.1 1298} 1299 1300define i1 @shl_nsw_x8_not_slt_x9(i8 %start, i8 %high) { 1301; CHECK-LABEL: @shl_nsw_x8_not_slt_x9( 1302; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[HIGH:%.*]], 0 1303; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]]) 1304; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nsw i8 [[START:%.*]], 3 1305; CHECK-NEXT: [[C_1:%.*]] = icmp slt i8 [[START_SHL_3]], [[HIGH]] 1306; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1307; CHECK-NEXT: [[START_MUL_9:%.*]] = mul nsw i8 [[START]], 9 1308; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_MUL_9]], [[HIGH]] 1309; CHECK-NEXT: ret i1 [[T_1]] 1310; 1311 %c.0 = icmp sge i8 %high, 0 1312 call void @llvm.assume(i1 %c.0) 1313 1314 %start.shl.3 = shl nsw i8 %start, 3 1315 %c.1 = icmp slt i8 %start.shl.3, %high 1316 call void @llvm.assume(i1 %c.1) 1317 1318 %start.mul.9 = mul nsw i8 %start, 9 1319 %t.1 = icmp slt i8 %start.mul.9, %high 1320 ret i1 %t.1 1321} 1322 1323define i1 @shl_nsw_sign_implication(i8 %x) { 1324; CHECK-LABEL: @shl_nsw_sign_implication( 1325; CHECK-NEXT: [[SHL:%.*]] = shl nsw i8 [[X:%.*]], 2 1326; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[X]], 0 1327; CHECK-NEXT: br i1 [[CMP1]], label [[IF:%.*]], label [[ELSE:%.*]] 1328; CHECK: if: 1329; CHECK-NEXT: ret i1 true 1330; CHECK: else: 1331; CHECK-NEXT: ret i1 true 1332; 1333 %shl = shl nsw i8 %x, 2 1334 %cmp1 = icmp slt i8 %x, 0 1335 br i1 %cmp1, label %if, label %else 1336 1337if: 1338 %cmp2 = icmp slt i8 %shl, 0 1339 ret i1 %cmp2 1340 1341else: 1342 %cmp3 = icmp sge i8 %shl, 0 1343 ret i1 %cmp3 1344} 1345 1346define i1 @shl_nsw_by_bw_minus_1(i64 %x) { 1347; CHECK-LABEL: @shl_nsw_by_bw_minus_1( 1348; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 63 1349; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0 1350; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1351; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0 1352; CHECK-NEXT: ret i1 [[T_1]] 1353; 1354 %x.shl = shl nsw i64 %x, 63 1355 %c.1 = icmp slt i64 %x.shl, 0 1356 call void @llvm.assume(i1 %c.1) 1357 1358 %t.1 = icmp slt i64 %x, 0 1359 ret i1 %t.1 1360} 1361 1362; Shift returns poison in this case, just make sure we don't crash. 1363define i1 @shl_nsw_by_bw(i64 %x) { 1364; CHECK-LABEL: @shl_nsw_by_bw( 1365; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 64 1366; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0 1367; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1368; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0 1369; CHECK-NEXT: ret i1 [[T_1]] 1370; 1371 %x.shl = shl nsw i64 %x, 64 1372 %c.1 = icmp slt i64 %x.shl, 0 1373 call void @llvm.assume(i1 %c.1) 1374 1375 %t.1 = icmp slt i64 %x, 0 1376 ret i1 %t.1 1377} 1378 1379; Shift returns poison in this case, just make sure we don't crash. 1380define i1 @shl_nsw_by_bw_plus_1(i64 %x) { 1381; CHECK-LABEL: @shl_nsw_by_bw_plus_1( 1382; CHECK-NEXT: [[X_SHL:%.*]] = shl nsw i64 [[X:%.*]], 65 1383; CHECK-NEXT: [[C_1:%.*]] = icmp slt i64 [[X_SHL]], 0 1384; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]]) 1385; CHECK-NEXT: [[T_1:%.*]] = icmp slt i64 [[X]], 0 1386; CHECK-NEXT: ret i1 [[T_1]] 1387; 1388 %x.shl = shl nsw i64 %x, 65 1389 %c.1 = icmp slt i64 %x.shl, 0 1390 call void @llvm.assume(i1 %c.1) 1391 1392 %t.1 = icmp slt i64 %x, 0 1393 ret i1 %t.1 1394} 1395