1; RUN: opt -mtriple=riscv32-unknown-elf -S -passes=consthoist < %s | FileCheck %s 2; RUN: opt -mtriple=riscv64-unknown-elf -S -passes=consthoist < %s | FileCheck %s 3 4; Check that we don't hoist immediates with small values. 5define i64 @test1(i64 %a) nounwind { 6; CHECK-LABEL: test1 7; CHECK-NOT: %const = bitcast i64 2 to i64 8 %1 = mul i64 %a, 2 9 %2 = add i64 %1, 2 10 ret i64 %2 11} 12 13; Check that we don't hoist immediates with small values. 14define i64 @test2(i64 %a) nounwind { 15; CHECK-LABEL: test2 16; CHECK-NOT: %const = bitcast i64 2047 to i64 17 %1 = mul i64 %a, 2047 18 %2 = add i64 %1, 2047 19 ret i64 %2 20} 21 22; Check that we hoist immediates with large values. 23define i64 @test3(i64 %a) nounwind { 24; CHECK-LABEL: test3 25; CHECK: %const = bitcast i64 32766 to i64 26 %1 = mul i64 %a, 32766 27 %2 = add i64 %1, 32766 28 ret i64 %2 29} 30 31; Check that we hoist immediates with very large values. 32define i128 @test4(i128 %a) nounwind { 33; CHECK-LABEL: test4 34; CHECK: %const = bitcast i128 12297829382473034410122878 to i128 35 %1 = add i128 %a, 12297829382473034410122878 36 %2 = add i128 %1, 12297829382473034410122878 37 ret i128 %2 38} 39 40; Check that we hoist zext.h without Zbb. 41define i32 @test5(i32 %a) nounwind { 42; CHECK-LABEL: test5 43; CHECK: %const = bitcast i32 65535 to i32 44 %1 = and i32 %a, 65535 45 %2 = and i32 %1, 65535 46 ret i32 %2 47} 48 49; Check that we don't hoist zext.h with 65535 with Zbb. 50define i32 @test6(i32 %a) nounwind "target-features"="+zbb" { 51; CHECK-LABEL: test6 52; CHECK: and i32 %a, 65535 53 %1 = and i32 %a, 65535 54 %2 = and i32 %1, 65535 55 ret i32 %2 56} 57 58; Check that we hoist zext.w without Zba. 59define i64 @test7(i64 %a) nounwind { 60; CHECK-LABEL: test7 61; CHECK: %const = bitcast i64 4294967295 to i64 62 %1 = and i64 %a, 4294967295 63 %2 = and i64 %1, 4294967295 64 ret i64 %2 65} 66 67; Check that we don't hoist zext.w with Zba. 68define i64 @test8(i64 %a) nounwind "target-features"="+zba" { 69; CHECK-LABEL: test8 70; CHECK: and i64 %a, 4294967295 71 %1 = and i64 %a, 4294967295 72 %2 = and i64 %1, 4294967295 73 ret i64 %2 74} 75 76; Check that we don't hoist mul with negated power of 2. 77define i64 @test9(i64 %a) nounwind { 78; CHECK-LABEL: test9 79; CHECK: mul i64 %a, -4294967296 80 %1 = mul i64 %a, -4294967296 81 %2 = mul i64 %1, -4294967296 82 ret i64 %2 83} 84 85define i32 @test10(i32 %a, i32 %b) nounwind { 86; CHECK-LABEL: @test10( 87; CHECK: shl i32 %a, 8 88; CHECK: and i32 %1, 65280 89; CHECK: shl i32 %b, 8 90; CHECK: and i32 %3, 65280 91 %1 = shl i32 %a, 8 92 %2 = and i32 %1, 65280 93 %3 = shl i32 %b, 8 94 %4 = and i32 %3, 65280 95 %5 = mul i32 %2, %4 96 ret i32 %5 97} 98 99; bseti 100define i64 @test11(i64 %a) nounwind "target-features"="+zbs" { 101; CHECK-LABEL: test11 102; CHECK: or i64 %a, 8589934592 103 %1 = or i64 %a, 8589934592 ; 1 << 33 104 %2 = or i64 %1, 8589934592 ; 1 << 33 105 ret i64 %2 106} 107 108; binvi 109define i64 @test12(i64 %a) nounwind "target-features"="+zbs" { 110; CHECK-LABEL: test12 111; CHECK: xor i64 %a, -9223372036854775808 112 %1 = xor i64 %a, -9223372036854775808 ; 1 << 63 113 %2 = xor i64 %1, -9223372036854775808 ; 1 << 63 114 ret i64 %2 115} 116 117; bclri 118define i64 @test13(i64 %a) nounwind "target-features"="+zbs" { 119; CHECK-LABEL: test13 120; CHECK: and i64 %a, -281474976710657 121 %1 = and i64 %a, -281474976710657 ; ~(1 << 48) 122 %2 = and i64 %1, -281474976710657 ; ~(1 << 48) 123 ret i64 %2 124} 125 126; Check that we don't hoist mul by a power of 2. 127define i64 @test14(i64 %a) nounwind { 128; CHECK-LABEL: test14 129; CHECK: mul i64 %a, 2048 130 %1 = mul i64 %a, 2048 131 %2 = mul i64 %1, 2048 132 ret i64 %2 133} 134 135; Check that we don't hoist mul by one less than a power of 2. 136define i64 @test15(i64 %a) nounwind { 137; CHECK-LABEL: test15 138; CHECK: mul i64 %a, 65535 139 %1 = mul i64 %a, 65535 140 %2 = mul i64 %1, 65535 141 ret i64 %2 142} 143 144; Check that we don't hoist mul by one more than a power of 2. 145define i64 @test16(i64 %a) nounwind { 146; CHECK-LABEL: test16 147; CHECK: mul i64 %a, 65537 148 %1 = mul i64 %a, 65537 149 %2 = mul i64 %1, 65537 150 ret i64 %2 151} 152 153; Check that we hoist the absolute address of the stores to the entry block. 154define void @test17(ptr %s, i32 %size) nounwind { 155; CHECK-LABEL: test17 156; CHECK: %const = bitcast i32 -1073741792 to i32 157; CHECK: %0 = inttoptr i32 %const to ptr 158; CHECK: store i32 20, ptr %0 159; CHECK: %1 = inttoptr i32 %const to ptr 160; CHECK: store i32 10, ptr %1 161entry: 162 %cond = icmp eq i32 %size, 0 163 br i1 %cond, label %if.true, label %exit 164if.true: 165 store i32 20, ptr inttoptr (i32 -1073741792 to ptr) 166 br label %exit 167exit: 168 store i32 10, ptr inttoptr (i32 -1073741792 to ptr) 169 ret void 170} 171 172; Check that we hoist the absolute address of the loads to the entry block. 173define i32 @test18(ptr %s, i32 %size) nounwind { 174; CHECK-LABEL: test18 175; CHECK: %const = bitcast i32 -1073741792 to i32 176; CHECK: %0 = inttoptr i32 %const to ptr 177; CHECK: %1 = load i32, ptr %0 178; CHECK: %2 = inttoptr i32 %const to ptr 179; CHECK: %3 = load i32, ptr %2 180entry: 181 %cond = icmp eq i32 %size, 0 182 br i1 %cond, label %if.true, label %if.false 183if.true: 184 %0 = load i32, ptr inttoptr (i32 -1073741792 to ptr) 185 br label %return 186if.false: 187 %1 = load i32, ptr inttoptr (i32 -1073741792 to ptr) 188 br label %return 189return: 190 %val = phi i32 [%0, %if.true], [%1, %if.false] 191 ret i32 %val 192} 193 194 195; For addresses between [0, 2048), we can use ld/sd xN, address(zero), so don't 196; hoist. 197define void @test19(ptr %s, i32 %size) nounwind { 198; CHECK-LABEL: test19 199; CHECK: store i32 20, ptr inttoptr (i32 2044 to ptr) 200; CHECK: store i32 10, ptr inttoptr (i32 2044 to ptr) 201entry: 202 %cond = icmp eq i32 %size, 0 203 br i1 %cond, label %if.true, label %exit 204if.true: 205 store i32 20, ptr inttoptr (i32 2044 to ptr) 206 br label %exit 207exit: 208 store i32 10, ptr inttoptr (i32 2044 to ptr) 209 ret void 210} 211 212; Check that we use a common base for immediates needed by a store if the 213; constants require more than 1 instruction. 214define void @test20(ptr %p1, ptr %p2) { 215; CHECK-LABEL: test20 216; CHECK: %const = bitcast i32 15111111 to i32 217; CHECK: store i32 %const, ptr %p1, align 4 218; CHECK: %const_mat = add i32 %const, 1 219; CHECK: store i32 %const_mat, ptr %p2, align 4 220 store i32 15111111, ptr %p1, align 4 221 store i32 15111112, ptr %p2, align 4 222 ret void 223} 224 225define void @test21(ptr %p1, ptr %p2) { 226; CHECK-LABEL: define void @test21( 227; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) { 228; CHECK-NEXT: store i32 15111111, ptr [[P1]], align 1 229; CHECK-NEXT: store i32 15111112, ptr [[P2]], align 1 230; CHECK-NEXT: ret void 231; 232 store i32 15111111, ptr %p1, align 1 233 store i32 15111112, ptr %p2, align 1 234 ret void 235} 236 237; 0 immediates shouldn't be hoisted. 238define void @test22(ptr %p1, ptr %p2) { 239; CHECK-LABEL: define void @test22( 240; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) { 241; CHECK-NEXT: store i64 0, ptr [[P1]], align 8 242; CHECK-NEXT: store i64 -1, ptr [[P2]], align 8 243; CHECK-NEXT: ret void 244; 245 store i64 0, ptr %p1, align 8 246 store i64 -1, ptr %p2, align 8 247 ret void 248} 249 250; 0 immediates shouldn't be hoisted. 251define void @test23(ptr %p1, ptr %p2) { 252; CHECK-LABEL: define void @test23( 253; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) { 254; CHECK-NEXT: store i127 0, ptr [[P1]], align 8 255; CHECK-NEXT: store i127 -1, ptr [[P2]], align 8 256; CHECK-NEXT: ret void 257; 258 store i127 0, ptr %p1, align 8 259 store i127 -1, ptr %p2, align 8 260 ret void 261} 262 263; Hoisting doesn't happen for types that aren't legal. 264define void @test24(ptr %p1, ptr %p2) { 265; CHECK-LABEL: define void @test24( 266; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) { 267; CHECK-NEXT: store i128 15111111, ptr [[P1]], align 4 268; CHECK-NEXT: store i128 15111112, ptr [[P2]], align 4 269; CHECK-NEXT: ret void 270; 271 store i128 15111111, ptr %p1, align 4 272 store i128 15111112, ptr %p2, align 4 273 ret void 274} 275