xref: /llvm-project/llvm/test/Transforms/CodeGenPrepare/X86/bitreverse-recognize.ll (revision 2bb41851a10c1473bda9a87b4bfabf99527b3929)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -loop-unroll -codegenprepare -S -mtriple=x86_64-- -mattr=+xop | FileCheck %s
3
4define i32 @bitreverse_i32(i32 %a) {
5; CHECK-LABEL: @bitreverse_i32(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[REV:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A:%.*]])
8; CHECK-NEXT:    ret i32 [[REV]]
9;
10entry:
11  br label %for.body
12
13for.cond.cleanup:                                 ; preds = %for.body
14  ret i32 %or
15
16for.body:                                         ; preds = %for.body, %entry
17  %i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
18  %b.07 = phi i32 [ 0, %entry ], [ %or, %for.body ]
19  %shr = lshr i32 %a, %i.08
20  %and = and i32 %shr, 1
21  %sub = sub nuw nsw i32 31, %i.08
22  %shl = shl i32 %and, %sub
23  %or = or i32 %shl, %b.07
24  %inc = add nuw nsw i32 %i.08, 1
25  %exitcond = icmp eq i32 %inc, 32
26  br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !3
27}
28
29; PR40058
30define i64 @bitreverse_i64(i64 %0) {
31; CHECK-LABEL: @bitreverse_i64(
32; CHECK-NEXT:    [[REV:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[TMP0:%.*]])
33; CHECK-NEXT:    ret i64 [[REV]]
34;
35  %2 = lshr i64 %0, 1
36  %3 = and i64 %2, 6148914691236517205
37  %4 = shl i64 %0, 1
38  %5 = and i64 %4, -6148914691236517206
39  %6 = or i64 %3, %5
40  %7 = lshr i64 %6, 2
41  %8 = and i64 %7, 3689348814741910323
42  %9 = shl i64 %6, 2
43  %10 = and i64 %9, -3689348814741910324
44  %11 = or i64 %8, %10
45  %12 = lshr i64 %11, 4
46  %13 = and i64 %12, 1085102592571150095
47  %14 = shl i64 %11, 4
48  %15 = and i64 %14, -1085102592571150096
49  %16 = or i64 %13, %15
50  %17 = lshr i64 %16, 8
51  %18 = and i64 %17, 71777214294589695
52  %19 = shl i64 %16, 8
53  %20 = and i64 %19, -71777214294589696
54  %21 = or i64 %18, %20
55  %22 = lshr i64 %21, 16
56  %23 = and i64 %22, 281470681808895
57  %24 = shl i64 %21, 16
58  %25 = and i64 %24, -281470681808896
59  %26 = or i64 %23, %25
60  %27 = tail call i64 @llvm.fshl.i64(i64 %26, i64 %26, i64 32)
61  ret i64 %27
62}
63declare i64 @llvm.fshl.i64(i64, i64, i64)
64
65!llvm.module.flags = !{!0, !1}
66!llvm.ident = !{!2}
67
68!0 = !{i32 1, !"wchar_size", i32 4}
69!1 = !{i32 1, !"min_enum_size", i32 4}
70!2 = !{!"clang version 3.8.0"}
71!3 = distinct !{!3, !4}
72!4 = !{!"llvm.loop.unroll.full"}
73