xref: /llvm-project/llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll (revision f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=powerpc64-unknown-linux-gnu -data-layout="E-m:e-i64:64-n32:64" -force-split-store < %s  | FileCheck --check-prefix=BE %s
3; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=powerpc64le-unknown-linux-gnu -data-layout="e-m:e-i64:64-n32:64" -force-split-store < %s  | FileCheck --check-prefix=LE %s
4
5define void @split_store_align1(float %x, ptr %p) {
6; BE-LABEL: @split_store_align1(
7; BE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
8; BE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
9; BE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
10; BE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
11; BE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
12; BE-NEXT:    [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
13; BE-NEXT:    store i32 [[B]], ptr [[TMP2]], align 1
14; BE-NEXT:    store i32 0, ptr [[P]], align 1
15; BE-NEXT:    ret void
16;
17; LE-LABEL: @split_store_align1(
18; LE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
19; LE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
20; LE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
21; LE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
22; LE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
23; LE-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 1
24; LE-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
25; LE-NEXT:    store i32 0, ptr [[TMP3]], align 1
26; LE-NEXT:    ret void
27;
28  %b = bitcast float %x to i32
29  %z = zext i32 0 to i64
30  %s = shl nuw nsw i64 %z, 32
31  %z2 = zext i32 %b to i64
32  %o = or i64 %s, %z2
33  store i64 %o, ptr %p, align 1
34  ret void
35}
36
37define void @split_store_align2(float %x, ptr %p) {
38; BE-LABEL: @split_store_align2(
39; BE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
40; BE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
41; BE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
42; BE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
43; BE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
44; BE-NEXT:    [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
45; BE-NEXT:    store i32 [[B]], ptr [[TMP2]], align 2
46; BE-NEXT:    store i32 0, ptr [[P]], align 2
47; BE-NEXT:    ret void
48;
49; LE-LABEL: @split_store_align2(
50; LE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
51; LE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
52; LE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
53; LE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
54; LE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
55; LE-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 2
56; LE-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
57; LE-NEXT:    store i32 0, ptr [[TMP3]], align 2
58; LE-NEXT:    ret void
59;
60  %b = bitcast float %x to i32
61  %z = zext i32 0 to i64
62  %s = shl nuw nsw i64 %z, 32
63  %z2 = zext i32 %b to i64
64  %o = or i64 %s, %z2
65  store i64 %o, ptr %p, align 2
66  ret void
67}
68
69define void @split_store_align8(float %x, ptr %p) {
70; BE-LABEL: @split_store_align8(
71; BE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
72; BE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
73; BE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
74; BE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
75; BE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
76; BE-NEXT:    [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
77; BE-NEXT:    store i32 [[B]], ptr [[TMP2]], align 4
78; BE-NEXT:    store i32 0, ptr [[P]], align 8
79; BE-NEXT:    ret void
80;
81; LE-LABEL: @split_store_align8(
82; LE-NEXT:    [[B:%.*]] = bitcast float [[X:%.*]] to i32
83; LE-NEXT:    [[Z:%.*]] = zext i32 0 to i64
84; LE-NEXT:    [[S:%.*]] = shl nuw nsw i64 [[Z]], 32
85; LE-NEXT:    [[Z2:%.*]] = zext i32 [[B]] to i64
86; LE-NEXT:    [[O:%.*]] = or i64 [[S]], [[Z2]]
87; LE-NEXT:    store i32 [[B]], ptr [[P:%.*]], align 8
88; LE-NEXT:    [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 1
89; LE-NEXT:    store i32 0, ptr [[TMP3]], align 4
90; LE-NEXT:    ret void
91;
92  %b = bitcast float %x to i32
93  %z = zext i32 0 to i64
94  %s = shl nuw nsw i64 %z, 32
95  %z2 = zext i32 %b to i64
96  %o = or i64 %s, %z2
97  store i64 %o, ptr %p, align 8
98  ret void
99}
100