1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' < %s | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 5target triple = "thumbv8.1m.main-none-eabi" 6 7define i32 @lshr3_then(i32 %a) { 8; CHECK-LABEL: @lshr3_then( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[L:%.*]] = lshr i32 [[A:%.*]], 3 11; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 12; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 13; CHECK: then: 14; CHECK-NEXT: ret i32 0 15; CHECK: else: 16; CHECK-NEXT: ret i32 [[L]] 17; 18entry: 19 %c = icmp ult i32 %a, 8 20 br i1 %c, label %then, label %else 21 22then: 23 ret i32 0 24 25else: 26 %l = lshr i32 %a, 3 27 ret i32 %l 28} 29 30define i32 @lshr5_else(i32 %a) { 31; CHECK-LABEL: @lshr5_else( 32; CHECK-NEXT: entry: 33; CHECK-NEXT: [[L:%.*]] = lshr i32 [[A:%.*]], 5 34; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 35; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 36; CHECK: then: 37; CHECK-NEXT: ret i32 [[L]] 38; CHECK: else: 39; CHECK-NEXT: ret i32 0 40; 41entry: 42 %c = icmp ult i32 %a, 32 43 br i1 %c, label %then, label %else 44 45then: 46 %l = lshr i32 %a, 5 47 ret i32 %l 48 49else: 50 ret i32 0 51} 52 53define i32 @lshr2_entry(i32 %a) { 54; CHECK-LABEL: @lshr2_entry( 55; CHECK-NEXT: entry: 56; CHECK-NEXT: [[L:%.*]] = lshr i32 [[A:%.*]], 1 57; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 58; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 59; CHECK: then: 60; CHECK-NEXT: ret i32 [[L]] 61; CHECK: else: 62; CHECK-NEXT: ret i32 0 63; 64entry: 65 %l = lshr i32 %a, 1 66 %c = icmp ult i32 %a, 2 67 br i1 %c, label %then, label %else 68 69then: 70 ret i32 %l 71 72else: 73 ret i32 0 74} 75 76define i32 @lshr5mismatch(i32 %a) { 77; CHECK-LABEL: @lshr5mismatch( 78; CHECK-NEXT: entry: 79; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A:%.*]], 17 80; CHECK-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[ELSE:%.*]] 81; CHECK: then: 82; CHECK-NEXT: [[L:%.*]] = lshr i32 [[A]], 5 83; CHECK-NEXT: ret i32 [[L]] 84; CHECK: else: 85; CHECK-NEXT: ret i32 0 86; 87entry: 88 %c = icmp ult i32 %a, 17 89 br i1 %c, label %then, label %else 90 91then: 92 %l = lshr i32 %a, 5 93 ret i32 %l 94 95else: 96 ret i32 0 97} 98 99define i32 @ashr5_else(i32 %a) { 100; CHECK-LABEL: @ashr5_else( 101; CHECK-NEXT: entry: 102; CHECK-NEXT: [[L:%.*]] = ashr i32 [[A:%.*]], 5 103; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 104; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 105; CHECK: then: 106; CHECK-NEXT: ret i32 [[L]] 107; CHECK: else: 108; CHECK-NEXT: ret i32 0 109; 110entry: 111 %c = icmp ult i32 %a, 32 112 br i1 %c, label %then, label %else 113 114then: 115 %l = ashr i32 %a, 5 116 ret i32 %l 117 118else: 119 ret i32 0 120} 121 122define i32 @add10_else(i32 %a) { 123; CHECK-LABEL: @add10_else( 124; CHECK-NEXT: entry: 125; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[A:%.*]], 10 126; CHECK-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[ELSE:%.*]] 127; CHECK: then: 128; CHECK-NEXT: ret i32 0 129; CHECK: else: 130; CHECK-NEXT: [[L:%.*]] = add i32 [[A]], 10 131; CHECK-NEXT: ret i32 [[L]] 132; 133entry: 134 %c = icmp eq i32 %a, 10 135 br i1 %c, label %then, label %else 136 137then: 138 ret i32 0 139 140else: 141 %l = add i32 %a, 10 142 ret i32 %l 143} 144 145define i32 @addm10_then(i32 %a) { 146; CHECK-LABEL: @addm10_then( 147; CHECK-NEXT: entry: 148; CHECK-NEXT: [[L:%.*]] = add i32 [[A:%.*]], -10 149; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 150; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 151; CHECK: then: 152; CHECK-NEXT: ret i32 [[L]] 153; CHECK: else: 154; CHECK-NEXT: ret i32 0 155; 156entry: 157 %c = icmp eq i32 %a, 10 158 br i1 %c, label %then, label %else 159 160then: 161 %l = add i32 %a, -10 162 ret i32 %l 163 164else: 165 ret i32 0 166} 167 168define i32 @add_missmatch(i32 %a) { 169; CHECK-LABEL: @add_missmatch( 170; CHECK-NEXT: entry: 171; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[A:%.*]], 10 172; CHECK-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[ELSE:%.*]] 173; CHECK: then: 174; CHECK-NEXT: [[L:%.*]] = add i32 [[A]], 10 175; CHECK-NEXT: ret i32 [[L]] 176; CHECK: else: 177; CHECK-NEXT: ret i32 0 178; 179entry: 180 %c = icmp eq i32 %a, 10 181 br i1 %c, label %then, label %else 182 183then: 184 %l = add i32 %a, 10 185 ret i32 %l 186 187else: 188 ret i32 0 189} 190 191define i32 @sub10_else(i32 %a) { 192; CHECK-LABEL: @sub10_else( 193; CHECK-NEXT: entry: 194; CHECK-NEXT: [[L:%.*]] = sub i32 [[A:%.*]], 10 195; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 196; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 197; CHECK: then: 198; CHECK-NEXT: ret i32 0 199; CHECK: else: 200; CHECK-NEXT: ret i32 [[L]] 201; 202entry: 203 %c = icmp eq i32 %a, 10 204 br i1 %c, label %then, label %else 205 206then: 207 ret i32 0 208 209else: 210 %l = sub i32 %a, 10 211 ret i32 %l 212} 213 214define i32 @sub10_else_drop_nuw(i32 %a) { 215; CHECK-LABEL: @sub10_else_drop_nuw( 216; CHECK-NEXT: entry: 217; CHECK-NEXT: [[L:%.*]] = sub i32 [[A:%.*]], 10 218; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 219; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 220; CHECK: then: 221; CHECK-NEXT: ret i32 0 222; CHECK: else: 223; CHECK-NEXT: ret i32 [[L]] 224; 225entry: 226 %c = icmp eq i32 %a, 10 227 br i1 %c, label %then, label %else 228 229then: 230 ret i32 0 231 232else: 233 %l = sub nuw i32 %a, 10 234 ret i32 %l 235} 236 237define i32 @subm10_then(i32 %a) { 238; CHECK-LABEL: @subm10_then( 239; CHECK-NEXT: entry: 240; CHECK-NEXT: [[L:%.*]] = sub i32 [[A:%.*]], -10 241; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[L]], 0 242; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 243; CHECK: then: 244; CHECK-NEXT: ret i32 [[L]] 245; CHECK: else: 246; CHECK-NEXT: ret i32 0 247; 248entry: 249 %c = icmp eq i32 %a, -10 250 br i1 %c, label %then, label %else 251 252then: 253 %l = sub i32 %a, -10 254 ret i32 %l 255 256else: 257 ret i32 0 258} 259 260define i64 @lshr64(i64 %a) { 261; CHECK-LABEL: @lshr64( 262; CHECK-NEXT: entry: 263; CHECK-NEXT: [[L:%.*]] = lshr i64 [[A:%.*]], 40 264; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[L]], 0 265; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 266; CHECK: then: 267; CHECK-NEXT: ret i64 0 268; CHECK: else: 269; CHECK-NEXT: ret i64 [[L]] 270; 271entry: 272 %c = icmp ult i64 %a, 1099511627776 273 br i1 %c, label %then, label %else 274 275then: 276 ret i64 0 277 278else: 279 %l = lshr i64 %a, 40 280 ret i64 %l 281} 282 283define i128 @lshr128(i128 %a) { 284; CHECK-LABEL: @lshr128( 285; CHECK-NEXT: entry: 286; CHECK-NEXT: [[L:%.*]] = lshr i128 [[A:%.*]], 65 287; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i128 [[L]], 0 288; CHECK-NEXT: br i1 [[TMP0]], label [[THEN:%.*]], label [[ELSE:%.*]] 289; CHECK: then: 290; CHECK-NEXT: ret i128 0 291; CHECK: else: 292; CHECK-NEXT: ret i128 [[L]] 293; 294entry: 295 %c = icmp ult i128 %a, 36893488147419103232 296 br i1 %c, label %then, label %else 297 298then: 299 ret i128 0 300 301else: 302 %l = lshr i128 %a, 65 303 ret i128 %l 304} 305 306define i32 @addm1_dom(i32 %a) { 307; CHECK-LABEL: @addm1_dom( 308; CHECK-NEXT: entry: 309; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[A:%.*]], 100 310; CHECK-NEXT: br i1 [[C1]], label [[IF:%.*]], label [[ELSE:%.*]] 311; CHECK: if: 312; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[A]], -1 313; CHECK-NEXT: br i1 [[C]], label [[THEN:%.*]], label [[ELSE]] 314; CHECK: then: 315; CHECK-NEXT: ret i32 0 316; CHECK: else: 317; CHECK-NEXT: [[L:%.*]] = add i32 [[A]], 1 318; CHECK-NEXT: ret i32 [[L]] 319; 320entry: 321 %c1 = icmp eq i32 %a, 100 322 br i1 %c1, label %if, label %else 323 324if: 325 %c = icmp eq i32 %a, -1 326 br i1 %c, label %then, label %else 327 328then: 329 ret i32 0 330 331else: 332 %l = add i32 %a, 1 333 ret i32 %l 334} 335 336declare void @other() 337