xref: /llvm-project/llvm/test/Transforms/Attributor/value-simplify-pointer-info-vec.ll (revision 38fffa630ee80163dc65e759392ad29798905679)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
2; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal  -attributor-annotate-decl-cs  -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
3; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal  -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
4;
5target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6
7define i32 @vec_write_0() {
8; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
9; CHECK-LABEL: define {{[^@]+}}@vec_write_0
10; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
11; CHECK-NEXT:    ret i32 0
12;
13  %a = alloca <2 x i32>
14  store <2 x i32> <i32 0, i32 0>, ptr %a
15  %l1 = load i32, ptr %a
16  %g = getelementptr i32, ptr %a, i64 1
17  %l2 = load i32, ptr %g
18  %add = add i32 %l1, %l2
19  ret i32 %add
20}
21
22define i32 @vec_write_1() {
23; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
24; CHECK-LABEL: define {{[^@]+}}@vec_write_1
25; CHECK-SAME: () #[[ATTR0]] {
26; CHECK-NEXT:    ret i32 10
27;
28  %a = alloca <2 x i32>
29  store <2 x i32> <i32 5, i32 5>, ptr %a
30  %l1B = load i32, ptr %a
31  %g = getelementptr i32, ptr %a, i64 1
32  %l2B = load i32, ptr %g
33  %add = add i32 %l1B, %l2B
34  ret i32 %add
35}
36
37; TODO: We should support this.
38define i32 @vec_write_2() {
39; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
40; CHECK-LABEL: define {{[^@]+}}@vec_write_2
41; CHECK-SAME: () #[[ATTR0]] {
42; CHECK-NEXT:    [[A:%.*]] = alloca <2 x i32>, align 8
43; CHECK-NEXT:    store <2 x i32> <i32 3, i32 5>, ptr [[A]], align 8
44; CHECK-NEXT:    [[L1:%.*]] = load i32, ptr [[A]], align 8
45; CHECK-NEXT:    [[G:%.*]] = getelementptr i32, ptr [[A]], i64 1
46; CHECK-NEXT:    [[L2:%.*]] = load i32, ptr [[G]], align 4
47; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[L1]], [[L2]]
48; CHECK-NEXT:    ret i32 [[ADD]]
49;
50  %a = alloca <2 x i32>
51  store <2 x i32> <i32 3, i32 5>, ptr %a
52  %l1 = load i32, ptr %a
53  %g = getelementptr i32, ptr %a, i64 1
54  %l2 = load i32, ptr %g
55  %add = add i32 %l1, %l2
56  ret i32 %add
57}
58define i32 @vec_write_3() {
59; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
60; CHECK-LABEL: define {{[^@]+}}@vec_write_3
61; CHECK-SAME: () #[[ATTR0]] {
62; CHECK-NEXT:    [[A:%.*]] = alloca <4 x i32>, align 16
63; CHECK-NEXT:    store <2 x i32> splat (i32 3), ptr [[A]], align 16
64; CHECK-NEXT:    [[G:%.*]] = getelementptr i32, ptr [[A]], i64 1
65; CHECK-NEXT:    store <2 x i32> splat (i32 5), ptr [[G]], align 8
66; CHECK-NEXT:    [[J:%.*]] = getelementptr i32, ptr [[G]], i64 1
67; CHECK-NEXT:    [[L2B:%.*]] = load i32, ptr [[G]], align 8
68; CHECK-NEXT:    [[ADD:%.*]] = add i32 3, [[L2B]]
69; CHECK-NEXT:    ret i32 [[ADD]]
70;
71  %a = alloca <4 x i32>
72  store <2 x i32> <i32 3, i32 3>, ptr %a
73  %g = getelementptr i32, ptr %a, i64 1
74  store <2 x i32> <i32 5, i32 5>, ptr %g
75  %j = getelementptr i32, ptr %g, i64 1
76  store <2 x i32> <i32 7, i32 7>, ptr %j
77  %l1B = load i32, ptr %a
78  %l2B = load i32, ptr %g
79  %add = add i32 %l1B, %l2B
80  ret i32 %add
81}
82define i32 @vec_write_4() {
83; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
84; CHECK-LABEL: define {{[^@]+}}@vec_write_4
85; CHECK-SAME: () #[[ATTR0]] {
86; CHECK-NEXT:    ret i32 13
87;
88  %a = alloca <4 x i32>
89  store i32 3, ptr %a
90  %g = getelementptr i32, ptr %a, i64 1
91  store <2 x i32> <i32 5, i32 5>, ptr %g
92  %j = getelementptr i32, ptr %g, i64 1
93  %l1B = load i32, ptr %a
94  %l2B = load i32, ptr %g
95  %l3B = load i32, ptr %j
96  %add1 = add i32 %l1B, %l2B
97  %add2 = add i32 %l3B, %add1
98  ret i32 %add2
99}
100define i32 @vec_write_5(i32 %arg) {
101; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
102; CHECK-LABEL: define {{[^@]+}}@vec_write_5
103; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
104; CHECK-NEXT:    [[A:%.*]] = alloca <4 x i32>, align 16
105; CHECK-NEXT:    store i32 [[ARG]], ptr [[A]], align 16
106; CHECK-NEXT:    [[ADD1:%.*]] = add i32 [[ARG]], 5
107; CHECK-NEXT:    [[ADD2:%.*]] = add i32 5, [[ADD1]]
108; CHECK-NEXT:    ret i32 [[ADD2]]
109;
110  %a = alloca <4 x i32>
111  store i32 %arg, ptr %a
112  %g = getelementptr i32, ptr %a, i64 1
113  store <2 x i32> <i32 5, i32 5>, ptr %g
114  %j = getelementptr i32, ptr %g, i64 1
115  %l1B5 = load i32, ptr %a
116  %l2B5 = load i32, ptr %g
117  %l3B5 = load i32, ptr %j
118  %add1 = add i32 %l1B5, %l2B5
119  %add2 = add i32 %l3B5, %add1
120  ret i32 %add2
121}
122;.
123; CHECK: attributes #[[ATTR0]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) }
124;.
125;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
126; CGSCC: {{.*}}
127; TUNIT: {{.*}}
128