1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 2target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128" 3; RUN: opt < %s -passes=alignment-from-assumptions -S | FileCheck %s 4 5define i32 @foo(ptr nocapture %a) { 6; CHECK-LABEL: define i32 @foo 7; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 8; CHECK-NEXT: entry: 9; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32) ] 10; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 32 11; CHECK-NEXT: ret i32 [[TMP0]] 12; 13entry: 14 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32)] 15 %0 = load i32, ptr %a, align 4 16 ret i32 %0 17} 18 19define i32 @foo2(ptr nocapture %a) { 20; CHECK-LABEL: define i32 @foo2 21; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 22; CHECK-NEXT: entry: 23; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32, i32 24) ] 24; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 -2 25; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 16 26; CHECK-NEXT: ret i32 [[TMP0]] 27; 28entry: 29 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32, i32 24)] 30 %arrayidx = getelementptr inbounds i32, ptr %a, i64 -2 31 %0 = load i32, ptr %arrayidx, align 4 32 ret i32 %0 33} 34 35define i32 @foo2a(ptr nocapture %a) { 36; CHECK-LABEL: define i32 @foo2a 37; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 38; CHECK-NEXT: entry: 39; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32, i32 28) ] 40; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 1 41; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 32 42; CHECK-NEXT: ret i32 [[TMP0]] 43; 44entry: 45 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32, i32 28)] 46 %arrayidx = getelementptr inbounds i32, ptr %a, i64 1 47 %0 = load i32, ptr %arrayidx, align 4 48 ret i32 %0 49} 50 51; TODO: this can be 8-bytes aligned 52define i32 @foo2b(ptr nocapture %a) { 53; CHECK-LABEL: define i32 @foo2b 54; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 55; CHECK-NEXT: entry: 56; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32, i32 28) ] 57; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 -1 58; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 59; CHECK-NEXT: ret i32 [[TMP0]] 60; 61entry: 62 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32, i32 28)] 63 %arrayidx = getelementptr inbounds i32, ptr %a, i64 -1 64 %0 = load i32, ptr %arrayidx, align 4 65 ret i32 %0 66} 67 68define i32 @goo(ptr nocapture %a) { 69; CHECK-LABEL: define i32 @goo 70; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 71; CHECK-NEXT: entry: 72; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 32, i32 0) ] 73; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 32 74; CHECK-NEXT: ret i32 [[TMP0]] 75; 76entry: 77 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 32, i32 0)] 78 %0 = load i32, ptr %a, align 4 79 ret i32 %0 80} 81 82define i32 @hoo(ptr nocapture %a) { 83; CHECK-LABEL: define i32 @hoo 84; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 85; CHECK-NEXT: entry: 86; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 32, i32 0) ] 87; CHECK-NEXT: br label [[FOR_BODY:%.*]] 88; CHECK: for.body: 89; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 90; CHECK-NEXT: [[R_06:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 91; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]] 92; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 32 93; CHECK-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[R_06]] 94; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 8 95; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 96; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2048 97; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] 98; CHECK: for.end: 99; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ] 100; CHECK-NEXT: ret i32 [[ADD_LCSSA]] 101; 102entry: 103 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i64 32, i32 0)] 104 br label %for.body 105 106for.body: ; preds = %entry, %for.body 107 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 108 %r.06 = phi i32 [ 0, %entry ], [ %add, %for.body ] 109 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv 110 %0 = load i32, ptr %arrayidx, align 4 111 %add = add nsw i32 %0, %r.06 112 %indvars.iv.next = add i64 %indvars.iv, 8 113 %1 = trunc i64 %indvars.iv.next to i32 114 %cmp = icmp slt i32 %1, 2048 115 br i1 %cmp, label %for.body, label %for.end 116 117for.end: ; preds = %for.body 118 %add.lcssa = phi i32 [ %add, %for.body ] 119 ret i32 %add.lcssa 120} 121 122; test D66575 123; def hoo2(a, id, num): 124; for i0 in range(id*64, 4096, num*64): 125; for i1 in range(0, 4096, 32): 126; for i2 in range(0, 4096, 32): 127; load(a, i0+i1+i2+32) 128define void @hoo2(ptr nocapture %a, i64 %id, i64 %num) { 129; CHECK-LABEL: define void @hoo2 130; CHECK-SAME: (ptr captures(none) [[A:%.*]], i64 [[ID:%.*]], i64 [[NUM:%.*]]) { 131; CHECK-NEXT: entry: 132; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i8 32, i64 0) ] 133; CHECK-NEXT: [[ID_MUL:%.*]] = shl nsw i64 [[ID]], 6 134; CHECK-NEXT: [[NUM_MUL:%.*]] = shl nsw i64 [[NUM]], 6 135; CHECK-NEXT: br label [[FOR0_BODY:%.*]] 136; CHECK: for0.body: 137; CHECK-NEXT: [[I0:%.*]] = phi i64 [ [[ID_MUL]], [[ENTRY:%.*]] ], [ [[I0_NEXT:%.*]], [[FOR0_END:%.*]] ] 138; CHECK-NEXT: br label [[FOR1_BODY:%.*]] 139; CHECK: for1.body: 140; CHECK-NEXT: [[I1:%.*]] = phi i64 [ 0, [[FOR0_BODY]] ], [ [[I1_NEXT:%.*]], [[FOR1_END:%.*]] ] 141; CHECK-NEXT: br label [[FOR2_BODY:%.*]] 142; CHECK: for2.body: 143; CHECK-NEXT: [[I2:%.*]] = phi i64 [ 0, [[FOR1_BODY]] ], [ [[I2_NEXT:%.*]], [[FOR2_BODY]] ] 144; CHECK-NEXT: [[T1:%.*]] = add nuw nsw i64 [[I0]], [[I1]] 145; CHECK-NEXT: [[T2:%.*]] = add nuw nsw i64 [[T1]], [[I2]] 146; CHECK-NEXT: [[T3:%.*]] = add nuw nsw i64 [[T2]], 32 147; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[T3]] 148; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[ARRAYIDX]], align 32 149; CHECK-NEXT: [[I2_NEXT]] = add nuw nsw i64 [[I2]], 32 150; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i64 [[I2_NEXT]], 4096 151; CHECK-NEXT: br i1 [[CMP2]], label [[FOR2_BODY]], label [[FOR1_END]] 152; CHECK: for1.end: 153; CHECK-NEXT: [[I1_NEXT]] = add nuw nsw i64 [[I1]], 32 154; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i64 [[I1_NEXT]], 4096 155; CHECK-NEXT: br i1 [[CMP1]], label [[FOR1_BODY]], label [[FOR0_END]] 156; CHECK: for0.end: 157; CHECK-NEXT: [[I0_NEXT]] = add nuw nsw i64 [[I0]], [[NUM_MUL]] 158; CHECK-NEXT: [[CMP0:%.*]] = icmp ult i64 [[I0_NEXT]], 4096 159; CHECK-NEXT: br i1 [[CMP0]], label [[FOR0_BODY]], label [[RETURN:%.*]] 160; CHECK: return: 161; CHECK-NEXT: ret void 162; 163entry: 164 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i8 32, i64 0)] 165 %id.mul = shl nsw i64 %id, 6 166 %num.mul = shl nsw i64 %num, 6 167 br label %for0.body 168 169for0.body: 170 %i0 = phi i64 [ %id.mul, %entry ], [ %i0.next, %for0.end ] 171 br label %for1.body 172 173for1.body: 174 %i1 = phi i64 [ 0, %for0.body ], [ %i1.next, %for1.end ] 175 br label %for2.body 176 177for2.body: 178 %i2 = phi i64 [ 0, %for1.body ], [ %i2.next, %for2.body ] 179 180 %t1 = add nuw nsw i64 %i0, %i1 181 %t2 = add nuw nsw i64 %t1, %i2 182 %t3 = add nuw nsw i64 %t2, 32 183 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %t3 184 %x = load i32, ptr %arrayidx, align 4 185 186 %i2.next = add nuw nsw i64 %i2, 32 187 %cmp2 = icmp ult i64 %i2.next, 4096 188 br i1 %cmp2, label %for2.body, label %for1.end 189 190for1.end: 191 %i1.next = add nuw nsw i64 %i1, 32 192 %cmp1 = icmp ult i64 %i1.next, 4096 193 br i1 %cmp1, label %for1.body, label %for0.end 194 195for0.end: 196 %i0.next = add nuw nsw i64 %i0, %num.mul 197 %cmp0 = icmp ult i64 %i0.next, 4096 198 br i1 %cmp0, label %for0.body, label %return 199 200return: 201 ret void 202} 203 204define i32 @joo(ptr nocapture %a) { 205; CHECK-LABEL: define i32 @joo 206; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 207; CHECK-NEXT: entry: 208; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i8 32, i8 0) ] 209; CHECK-NEXT: br label [[FOR_BODY:%.*]] 210; CHECK: for.body: 211; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 4, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 212; CHECK-NEXT: [[R_06:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 213; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]] 214; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 16 215; CHECK-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[R_06]] 216; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 8 217; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 218; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2048 219; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] 220; CHECK: for.end: 221; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ] 222; CHECK-NEXT: ret i32 [[ADD_LCSSA]] 223; 224entry: 225 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i8 32, i8 0)] 226 br label %for.body 227 228for.body: ; preds = %entry, %for.body 229 %indvars.iv = phi i64 [ 4, %entry ], [ %indvars.iv.next, %for.body ] 230 %r.06 = phi i32 [ 0, %entry ], [ %add, %for.body ] 231 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv 232 %0 = load i32, ptr %arrayidx, align 4 233 %add = add nsw i32 %0, %r.06 234 %indvars.iv.next = add i64 %indvars.iv, 8 235 %1 = trunc i64 %indvars.iv.next to i32 236 %cmp = icmp slt i32 %1, 2048 237 br i1 %cmp, label %for.body, label %for.end 238 239for.end: ; preds = %for.body 240 %add.lcssa = phi i32 [ %add, %for.body ] 241 ret i32 %add.lcssa 242} 243 244define i32 @koo(ptr nocapture %a) { 245; CHECK-LABEL: define i32 @koo 246; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 247; CHECK-NEXT: entry: 248; CHECK-NEXT: br label [[FOR_BODY:%.*]] 249; CHECK: for.body: 250; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 251; CHECK-NEXT: [[R_06:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 252; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]] 253; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i8 32, i8 0) ] 254; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 16 255; CHECK-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[R_06]] 256; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 4 257; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 258; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2048 259; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] 260; CHECK: for.end: 261; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ] 262; CHECK-NEXT: ret i32 [[ADD_LCSSA]] 263; 264entry: 265 br label %for.body 266 267for.body: ; preds = %entry, %for.body 268 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] 269 %r.06 = phi i32 [ 0, %entry ], [ %add, %for.body ] 270 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv 271 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i8 32, i8 0)] 272 %0 = load i32, ptr %arrayidx, align 4 273 %add = add nsw i32 %0, %r.06 274 %indvars.iv.next = add i64 %indvars.iv, 4 275 %1 = trunc i64 %indvars.iv.next to i32 276 %cmp = icmp slt i32 %1, 2048 277 br i1 %cmp, label %for.body, label %for.end 278 279for.end: ; preds = %for.body 280 %add.lcssa = phi i32 [ %add, %for.body ] 281 ret i32 %add.lcssa 282} 283 284define i32 @koo2(ptr nocapture %a) { 285; CHECK-LABEL: define i32 @koo2 286; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 287; CHECK-NEXT: entry: 288; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i128 32, i128 0) ] 289; CHECK-NEXT: br label [[FOR_BODY:%.*]] 290; CHECK: for.body: 291; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ -4, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] 292; CHECK-NEXT: [[R_06:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD:%.*]], [[FOR_BODY]] ] 293; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]] 294; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 16 295; CHECK-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[R_06]] 296; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 4 297; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 298; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2048 299; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] 300; CHECK: for.end: 301; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], [[FOR_BODY]] ] 302; CHECK-NEXT: ret i32 [[ADD_LCSSA]] 303; 304entry: 305 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i128 32, i128 0)] 306 br label %for.body 307 308for.body: ; preds = %entry, %for.body 309 %indvars.iv = phi i64 [ -4, %entry ], [ %indvars.iv.next, %for.body ] 310 %r.06 = phi i32 [ 0, %entry ], [ %add, %for.body ] 311 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %indvars.iv 312 %0 = load i32, ptr %arrayidx, align 4 313 %add = add nsw i32 %0, %r.06 314 %indvars.iv.next = add i64 %indvars.iv, 4 315 %1 = trunc i64 %indvars.iv.next to i32 316 %cmp = icmp slt i32 %1, 2048 317 br i1 %cmp, label %for.body, label %for.end 318 319for.end: ; preds = %for.body 320 %add.lcssa = phi i32 [ %add, %for.body ] 321 ret i32 %add.lcssa 322} 323 324define i32 @moo(ptr nocapture %a) { 325; CHECK-LABEL: define i32 @moo 326; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 327; CHECK-NEXT: entry: 328; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i16 32) ] 329; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr align 32 [[A]], i8 0, i64 64, i1 false) 330; CHECK-NEXT: ret i32 0 331; 332entry: 333 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i16 32)] 334 tail call void @llvm.memset.p0.i64(ptr align 4 %a, i8 0, i64 64, i1 false) 335 ret i32 0 336} 337 338define i32 @moo2(ptr nocapture %a, ptr nocapture %b) { 339; CHECK-LABEL: define i32 @moo2 340; CHECK-SAME: (ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]]) { 341; CHECK-NEXT: entry: 342; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[B]], i32 128) ] 343; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i16 32) ] 344; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 32 [[A]], ptr align 128 [[B]], i64 64, i1 false) 345; CHECK-NEXT: ret i32 0 346; 347entry: 348 tail call void @llvm.assume(i1 true) ["align"(ptr %b, i32 128)] 349 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i16 32)] 350 tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %a, ptr align 4 %b, i64 64, i1 false) 351 ret i32 0 352} 353 354define i32 @moo3(ptr nocapture %a, ptr nocapture %b) { 355; CHECK-LABEL: define i32 @moo3 356; CHECK-SAME: (ptr captures(none) [[A:%.*]], ptr captures(none) [[B:%.*]]) { 357; CHECK-NEXT: entry: 358; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i16 32), "align"(ptr [[B]], i32 128) ] 359; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr align 32 [[A]], ptr align 128 [[B]], i64 64, i1 false) 360; CHECK-NEXT: ret i32 0 361; 362entry: 363 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i16 32), "align"(ptr %b, i32 128)] 364 tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 %a, ptr align 4 %b, i64 64, i1 false) 365 ret i32 0 366} 367 368 369; Variable alignments appear to be legal, don't crash 370define i32 @pr51680(ptr nocapture %a, i32 %align) { 371; CHECK-LABEL: define i32 @pr51680 372; CHECK-SAME: (ptr captures(none) [[A:%.*]], i32 [[ALIGN:%.*]]) { 373; CHECK-NEXT: entry: 374; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 [[ALIGN]]) ] 375; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 376; CHECK-NEXT: ret i32 [[TMP0]] 377; 378entry: 379 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 %align)] 380 %0 = load i32, ptr %a, align 4 381 ret i32 %0 382} 383 384define i32 @pr64687(ptr nocapture %a) { 385; CHECK-LABEL: define i32 @pr64687 386; CHECK-SAME: (ptr captures(none) [[A:%.*]]) { 387; CHECK-NEXT: entry: 388; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i32 123) ] 389; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 390; CHECK-NEXT: ret i32 [[TMP0]] 391; 392entry: 393 tail call void @llvm.assume(i1 true) ["align"(ptr %a, i32 123)] 394 %0 = load i32, ptr %a, align 4 395 ret i32 %0 396} 397 398declare void @llvm.assume(i1) nounwind 399 400declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind 401declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind 402 403