xref: /llvm-project/llvm/test/Transforms/AggressiveInstCombine/trunc_select_cmp.ll (revision 3f8027fb67bc4efae9959a4d75f8f37ecf0c3985)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
3
4define dso_local i16 @cmp_select_sext_const(i8 %a) {
5; CHECK-LABEL: @cmp_select_sext_const(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
8; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], 109
9; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 109, i32 [[CONV]]
10; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
11; CHECK-NEXT:    ret i16 [[CONV4]]
12;
13entry:
14  %conv = sext i8 %a to i32
15  %cmp = icmp slt i32 %conv, 109
16  %cond = select i1 %cmp, i32 109, i32 %conv
17  %conv4 = trunc i32 %cond to i16
18  ret i16 %conv4
19}
20
21define dso_local i16 @cmp_select_sext(i8 %a, i8 %b) {
22; CHECK-LABEL: @cmp_select_sext(
23; CHECK-NEXT:  entry:
24; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
25; CHECK-NEXT:    [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
26; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
27; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
28; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
29; CHECK-NEXT:    ret i16 [[CONV4]]
30;
31entry:
32  %conv = sext i8 %a to i32
33  %conv2 = sext i8 %b to i32
34  %cmp = icmp slt i32 %conv, %conv2
35  %cond = select i1 %cmp, i32 %conv2, i32 %conv
36  %conv4 = trunc i32 %cond to i16
37  ret i16 %conv4
38}
39
40define dso_local i16 @cmp_select_zext(i8 %a, i8 %b) {
41; CHECK-LABEL: @cmp_select_zext(
42; CHECK-NEXT:  entry:
43; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
44; CHECK-NEXT:    [[CONV2:%.*]] = zext i8 [[B:%.*]] to i32
45; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
46; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
47; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
48; CHECK-NEXT:    ret i16 [[CONV4]]
49;
50entry:
51  %conv = zext i8 %a to i32
52  %conv2 = zext i8 %b to i32
53  %cmp = icmp slt i32 %conv, %conv2
54  %cond = select i1 %cmp, i32 %conv2, i32 %conv
55  %conv4 = trunc i32 %cond to i16
56  ret i16 %conv4
57}
58
59define dso_local i16 @cmp_select_zext_sext(i8 %a, i8 %b) {
60; CHECK-LABEL: @cmp_select_zext_sext(
61; CHECK-NEXT:  entry:
62; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
63; CHECK-NEXT:    [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
64; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
65; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
66; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
67; CHECK-NEXT:    ret i16 [[CONV4]]
68;
69entry:
70  %conv = zext i8 %a to i32
71  %conv2 = sext i8 %b to i32
72  %cmp = icmp slt i32 %conv, %conv2
73  %cond = select i1 %cmp, i32 %conv2, i32 %conv
74  %conv4 = trunc i32 %cond to i16
75  ret i16 %conv4
76}
77
78define dso_local i16 @cmp_select_zext_sext_diffOrigTy(i8 %a, i16 %b) {
79; CHECK-LABEL: @cmp_select_zext_sext_diffOrigTy(
80; CHECK-NEXT:  entry:
81; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
82; CHECK-NEXT:    [[CONV2:%.*]] = sext i16 [[B:%.*]] to i32
83; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
84; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
85; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
86; CHECK-NEXT:    ret i16 [[CONV4]]
87;
88entry:
89  %conv = zext i8 %a to i32
90  %conv2 = sext i16 %b to i32
91  %cmp = icmp slt i32 %conv, %conv2
92  %cond = select i1 %cmp, i32 %conv2, i32 %conv
93  %conv4 = trunc i32 %cond to i16
94  ret i16 %conv4
95}
96
97define dso_local i16 @my_abs_sext(i8 %a) {
98; CHECK-LABEL: @my_abs_sext(
99; CHECK-NEXT:  entry:
100; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
101; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
102; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
103; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
104; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
105; CHECK-NEXT:    ret i16 [[CONV4]]
106;
107entry:
108  %conv = sext i8 %a to i32
109  %cmp = icmp slt i32 %conv, 0
110  %sub = sub nsw i32 0, %conv
111  %cond = select i1 %cmp, i32 %sub, i32 %conv
112  %conv4 = trunc i32 %cond to i16
113  ret i16 %conv4
114}
115
116define dso_local i16 @my_abs_zext(i8 %a) {
117; CHECK-LABEL: @my_abs_zext(
118; CHECK-NEXT:  entry:
119; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
120; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
121; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
122; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
123; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
124; CHECK-NEXT:    ret i16 [[CONV4]]
125;
126entry:
127  %conv = zext i8 %a to i32
128  %cmp = icmp slt i32 %conv, 0
129  %sub = sub nsw i32 0, %conv
130  %cond = select i1 %cmp, i32 %sub, i32 %conv
131  %conv4 = trunc i32 %cond to i16
132  ret i16 %conv4
133}
134
135define dso_local i16 @select_sext(i8 %a, i1 %cond) {
136; CHECK-LABEL: @select_sext(
137; CHECK-NEXT:  entry:
138; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i16
139; CHECK-NEXT:    [[SUB:%.*]] = sub i16 0, [[CONV]]
140; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
141; CHECK-NEXT:    ret i16 [[SEL]]
142;
143entry:
144  %conv = sext i8 %a to i32
145  %sub = sub nsw i32 0, %conv
146  %sel = select i1 %cond, i32 %sub, i32 %conv
147  %conv4 = trunc i32 %sel to i16
148  ret i16 %conv4
149}
150
151define dso_local i16 @select_zext(i8 %a, i1 %cond) {
152; CHECK-LABEL: @select_zext(
153; CHECK-NEXT:  entry:
154; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i16
155; CHECK-NEXT:    [[SUB:%.*]] = sub i16 0, [[CONV]]
156; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
157; CHECK-NEXT:    ret i16 [[SEL]]
158;
159entry:
160  %conv = zext i8 %a to i32
161  %sub = sub nsw i32 0, %conv
162  %sel = select i1 %cond, i32 %sub, i32 %conv
163  %conv4 = trunc i32 %sel to i16
164  ret i16 %conv4
165}
166
167define i16 @cmp_select_signed_const_i16Const_noTransformation(i8 %a) {
168; CHECK-LABEL: @cmp_select_signed_const_i16Const_noTransformation(
169; CHECK-NEXT:    [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
170; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV]], 32768
171; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
172; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
173; CHECK-NEXT:    ret i16 [[CONV4]]
174;
175  %conv = sext i8 %a to i32
176  %cmp = icmp slt i32 %conv, 32768
177  %cond = select i1 %cmp, i32 32768, i32 %conv
178  %conv4 = trunc i32 %cond to i16
179  ret i16 %conv4
180}
181
182define i16 @cmp_select_unsigned_const_i16Const(i8 %a) {
183; CHECK-LABEL: @cmp_select_unsigned_const_i16Const(
184; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
185; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[CONV]], 32768
186; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
187; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
188; CHECK-NEXT:    ret i16 [[CONV4]]
189;
190  %conv = zext i8 %a to i32
191  %cmp = icmp ult i32 %conv, 32768
192  %cond = select i1 %cmp, i32 32768, i32 %conv
193  %conv4 = trunc i32 %cond to i16
194  ret i16 %conv4
195}
196
197define i16 @cmp_select_unsigned_const_i16Const_noTransformation(i8 %a) {
198; CHECK-LABEL: @cmp_select_unsigned_const_i16Const_noTransformation(
199; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
200; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[CONV]], 65536
201; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 65536, i32 [[CONV]]
202; CHECK-NEXT:    [[CONV4:%.*]] = trunc i32 [[COND]] to i16
203; CHECK-NEXT:    ret i16 [[CONV4]]
204;
205  %conv = zext i8 %a to i32
206  %cmp = icmp ult i32 %conv, 65536
207  %cond = select i1 %cmp, i32 65536, i32 %conv
208  %conv4 = trunc i32 %cond to i16
209  ret i16 %conv4
210}
211
212