xref: /llvm-project/llvm/test/TableGen/RegisterInfoEmitter-regcost-tuple.td (revision 32a5482e3c83ef7302cd9c5a1c3afb8c2c4c2d28) 
1// RUN: llvm-tblgen -gen-register-info -I %p/../../include -I %p/Common %s | FileCheck %s
2
3// Checks the cost values for the register tuple.
4include "llvm/Target/Target.td"
5
6class MyClass<int size, list<ValueType> types, dag registers>
7  : RegisterClass<"MyTarget", types, size, registers> {
8  let Size = size;
9}
10
11class Indexes<int N> {
12  list<int> all = [0,  1,  2,  3];
13  list<int> slice =
14    !foldl([]<int>, all, acc, cur,
15           !listconcat(acc, !if(!lt(cur, N), [cur], [])));
16}
17
18foreach Index = 0-3 in {
19  def sub#Index : SubRegIndex<32, !shl(Index, 5)>;
20}
21
22foreach Size = {2,4} in {
23  foreach Index = Indexes<!add(5, !mul(Size, -1))>.slice in {
24    def !foldl("", Indexes<Size>.slice, acc, cur,
25               !strconcat(acc#!if(!eq(acc,""),"","_"), "sub"#!add(cur, Index))) :
26      SubRegIndex<!mul(Size, 32), !shl(Index, 5)> {
27      let CoveringSubRegIndices =
28        !foldl([]<SubRegIndex>, Indexes<Size>.slice, acc, cur,
29               !listconcat(acc, [!cast<SubRegIndex>(sub#!add(cur, Index))]));
30    }
31  }
32}
33
34let Namespace = "MyTarget" in {
35  foreach Index = 0-15 in {
36    // Adding two cost values per register.
37    let CostPerUse = [Index, !shl(Index, 1)] in {
38      def S#Index : Register <"s"#Index>;
39    }
40  }
41} // Namespace = "MyTarget"
42
43def GPR32 : MyClass<32,  [i32], (sequence "S%u", 0, 15)>;
44
45def GPR64 : RegisterTuples<[sub0, sub1],
46                           [(decimate (shl GPR32, 0), 1),
47                            (decimate (shl GPR32, 1), 1)
48                           ]>;
49
50def GPR128 : RegisterTuples<[sub0, sub1, sub2, sub3],
51                            [
52                             (decimate (shl GPR32, 0), 1),
53                             (decimate (shl GPR32, 1), 1),
54                             (decimate (shl GPR32, 2), 1),
55                             (decimate (shl GPR32, 3), 1)
56                            ]>;
57
58
59def GPR_64 : MyClass<64, [v2i32], (add GPR64)>;
60def GPR_128 : MyClass<128, [v4i32], (add GPR128)>;
61
62
63def MyTarget : Target;
64
65// CHECK: static const uint8_t CostPerUseTable[] = {
66// CHECK-NEXT:  0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 0, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, };
67
68// CHECK:  static const TargetRegisterInfoDesc MyTargetRegInfoDesc = { // Extra Descriptors
69// CHECK-NEXT:  CostPerUseTable, 2, InAllocatableClassTable};
70
71// CHECK:  TargetRegisterInfo(&MyTargetRegInfoDesc, RegisterClasses, RegisterClasses+3,
72