xref: /llvm-project/llvm/test/MC/RISCV/fp-default-rounding-mode.s (revision 4b3d439e7e7b4e794e523caea9863d67ff8cf85f)
1# RUN: llvm-mc %s -triple=riscv64 -mattr=+d,+zfh,+zfbfmin -M no-aliases \
2# RUN:     | FileCheck -check-prefixes=CHECK-INST %s
3# RUN: llvm-mc %s -triple=riscv64 -mattr=+d,+zfh,+zfbfmin \
4# RUN:     | FileCheck -check-prefixes=CHECK-ALIAS %s
5# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d,+zfh,+zfbfmin < %s \
6# RUN:     | llvm-objdump -M no-aliases --mattr=+d,+zfh,+zfbfmin -d -r - \
7# RUN:     | FileCheck -check-prefixes=CHECK-INST %s
8# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+d,+zfh,+zfbfmin < %s \
9# RUN:     | llvm-objdump --mattr=+d,+zfh,+zfbfmin -d -r - \
10# RUN:     | FileCheck -check-prefixes=CHECK-ALIAS %s
11
12# This test aims to check what the default rounding mode is for a given
13# instruction if it's not specified, and ensures that it isn't printed when
14# aliases are enabled but is printed otherwise. Instructions aren't listed
15# exhaustively, but special attention is given to the fcvt instructions given
16# that those that never round often default to frm=0b000 for historical
17# reasons.
18
19# F instructions
20
21# CHECK-INST: fmadd.s fa0, fa1, fa2, fa3, dyn{{$}}
22# CHECK-ALIAS: fmadd.s fa0, fa1, fa2, fa3{{$}}
23fmadd.s fa0, fa1, fa2, fa3
24
25# CHECK-INST: fadd.s fa0, fa1, fa2, dyn{{$}}
26# CHECK-ALIAS: fadd.s fa0, fa1, fa2{{$}}
27fadd.s fa0, fa1, fa2
28
29# CHECK-INST: fcvt.w.s a0, fa0, dyn{{$}}
30# CHECK-ALIAS: fcvt.w.s a0, fa0{{$}}
31fcvt.w.s a0, fa0
32
33# CHECK-INST: fcvt.wu.s a0, fa0, dyn{{$}}
34# CHECK-ALIAS: fcvt.wu.s a0, fa0{{$}}
35fcvt.wu.s a0, fa0
36
37# CHECK-INST: fcvt.s.w fa0, a0, dyn{{$}}
38# CHECK-ALIAS: fcvt.s.w fa0, a0{{$}}
39fcvt.s.w fa0, a0
40
41# CHECK-INST: fcvt.s.wu fa0, a0, dyn{{$}}
42# CHECK-ALIAS: fcvt.s.wu fa0, a0{{$}}
43fcvt.s.wu fa0, a0
44
45# CHECK-INST: fcvt.l.s a0, fa0, dyn{{$}}
46# CHECK-ALIAS: fcvt.l.s a0, fa0{{$}}
47fcvt.l.s a0, fa0
48
49# CHECK-INST: fcvt.lu.s a0, fa0, dyn{{$}}
50# CHECK-ALIAS: fcvt.lu.s a0, fa0{{$}}
51fcvt.lu.s a0, fa0
52
53# CHECK-INST: fcvt.s.l fa0, a0, dyn{{$}}
54# CHECK-ALIAS: fcvt.s.l fa0, a0{{$}}
55fcvt.s.l fa0, a0
56
57# CHECK-INST: fcvt.s.lu fa0, a0, dyn{{$}}
58# CHECK-ALIAS: fcvt.s.lu fa0, a0{{$}}
59fcvt.s.lu fa0, a0
60
61# D instructions
62
63# CHECK-INST: fmadd.d fa0, fa1, fa2, fa3, dyn{{$}}
64# CHECK-ALIAS: fmadd.d fa0, fa1, fa2, fa3{{$}}
65fmadd.d fa0, fa1, fa2, fa3
66
67# CHECK-INST: fadd.d fa0, fa1, fa2, dyn{{$}}
68# CHECK-ALIAS: fadd.d fa0, fa1, fa2{{$}}
69fadd.d fa0, fa1, fa2
70
71# CHECK-INST: fcvt.s.d fa0, fa0, dyn{{$}}
72# CHECK-ALIAS: fcvt.s.d fa0, fa0{{$}}
73fcvt.s.d fa0, fa0
74
75# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
76# default rounding mode.
77# CHECK-INST: fcvt.d.s fa0, fa0{{$}}
78# CHECK-ALIAS: fcvt.d.s fa0, fa0{{$}}
79fcvt.d.s fa0, fa0
80# CHECK-INST: fcvt.d.s fa0, fa0{{$}}
81# CHECK-ALIAS: fcvt.d.s fa0, fa0{{$}}
82fcvt.d.s fa0, fa0, rne
83
84# CHECK-INST: fcvt.w.d a0, fa0, dyn{{$}}
85# CHECK-ALIAS: fcvt.w.d a0, fa0{{$}}
86fcvt.w.d a0, fa0
87
88# CHECK-INST: fcvt.wu.d a0, fa0, dyn{{$}}
89# CHECK-ALIAS: fcvt.wu.d a0, fa0{{$}}
90fcvt.wu.d a0, fa0
91
92# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
93# default rounding mode.
94# CHECK-INST: fcvt.d.w fa0, a0{{$}}
95# CHECK-ALIAS: fcvt.d.w fa0, a0{{$}}
96fcvt.d.w fa0, a0
97# CHECK-INST: fcvt.d.w fa0, a0{{$}}
98# CHECK-ALIAS: fcvt.d.w fa0, a0{{$}}
99fcvt.d.w fa0, a0, rne
100
101# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
102# default rounding mode.
103# CHECK-INST: fcvt.d.wu fa0, a0{{$}}
104# CHECK-ALIAS: fcvt.d.wu fa0, a0{{$}}
105fcvt.d.wu fa0, a0
106# CHECK-INST: fcvt.d.wu fa0, a0{{$}}
107# CHECK-ALIAS: fcvt.d.wu fa0, a0{{$}}
108fcvt.d.wu fa0, a0, rne
109
110# CHECK-INST: fcvt.l.d a0, fa0, dyn{{$}}
111# CHECK-ALIAS: fcvt.l.d a0, fa0{{$}}
112fcvt.l.d a0, fa0
113
114# CHECK-INST: fcvt.lu.d a0, fa0, dyn{{$}}
115# CHECK-ALIAS: fcvt.lu.d a0, fa0{{$}}
116fcvt.lu.d a0, fa0
117
118# CHECK-INST: fcvt.d.l fa0, a0, dyn{{$}}
119# CHECK-ALIAS: fcvt.d.l fa0, a0{{$}}
120fcvt.d.l fa0, a0
121
122# CHECK-INST: fcvt.d.lu fa0, a0, dyn{{$}}
123# CHECK-ALIAS: fcvt.d.lu fa0, a0{{$}}
124fcvt.d.lu fa0, a0
125
126# Zfh instructions
127
128# CHECK-INST: fmadd.h fa0, fa1, fa2, fa3, dyn{{$}}
129# CHECK-ALIAS: fmadd.h fa0, fa1, fa2, fa3{{$}}
130fmadd.h fa0, fa1, fa2, fa3
131
132# CHECK-INST: fadd.h fa0, fa1, fa2, dyn{{$}}
133# CHECK-ALIAS: fadd.h fa0, fa1, fa2{{$}}
134fadd.h fa0, fa1, fa2
135
136# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
137# default rounding mode.
138# CHECK-INST: fcvt.s.h fa0, fa0{{$}}
139# CHECK-ALIAS: fcvt.s.h fa0, fa0{{$}}
140fcvt.s.h fa0, fa0
141# CHECK-INST: fcvt.s.h fa0, fa0{{$}}
142# CHECK-ALIAS: fcvt.s.h fa0, fa0{{$}}
143fcvt.s.h fa0, fa0, rne
144
145# CHECK-INST: fcvt.h.s fa0, fa0, dyn{{$}}
146# CHECK-ALIAS: fcvt.h.s fa0, fa0{{$}}
147fcvt.h.s fa0, fa0
148
149# For historical reasons defaults to frm==0b000 (rne) but doesn't print this
150# default rounding mode.
151# CHECK-INST: fcvt.d.h fa0, fa0{{$}}
152# CHECK-ALIAS: fcvt.d.h fa0, fa0{{$}}
153fcvt.d.h fa0, fa0
154# CHECK-INST: fcvt.d.h fa0, fa0{{$}}
155# CHECK-ALIAS: fcvt.d.h fa0, fa0{{$}}
156fcvt.d.h fa0, fa0, rne
157
158# CHECK-INST: fcvt.h.d fa0, fa0, dyn{{$}}
159# CHECK-ALIAS: fcvt.h.d fa0, fa0{{$}}
160fcvt.h.d fa0, fa0
161
162# CHECK-INST: fcvt.w.h a0, fa0, dyn{{$}}
163# CHECK-ALIAS: fcvt.w.h a0, fa0{{$}}
164fcvt.w.h a0, fa0
165
166# CHECK-INST: fcvt.wu.h a0, fa0, dyn{{$}}
167# CHECK-ALIAS: fcvt.wu.h a0, fa0{{$}}
168fcvt.wu.h a0, fa0
169
170# CHECK-INST: fcvt.h.w fa0, a0, dyn{{$}}
171# CHECK-ALIAS: fcvt.h.w fa0, a0{{$}}
172fcvt.h.w fa0, a0
173
174# CHECK-INST: fcvt.h.wu fa0, a0, dyn{{$}}
175# CHECK-ALIAS: fcvt.h.wu fa0, a0{{$}}
176fcvt.h.wu fa0, a0
177
178# CHECK-INST: fcvt.l.h a0, fa0, dyn{{$}}
179# CHECK-ALIAS: fcvt.l.h a0, fa0{{$}}
180fcvt.l.h a0, fa0
181
182# CHECK-INST: fcvt.lu.h a0, fa0, dyn{{$}}
183# CHECK-ALIAS: fcvt.lu.h a0, fa0{{$}}
184fcvt.lu.h a0, fa0
185
186# CHECK-INST: fcvt.h.l fa0, a0, dyn{{$}}
187# CHECK-ALIAS: fcvt.h.l fa0, a0{{$}}
188fcvt.h.l fa0, a0
189
190# CHECK-INST: fcvt.h.lu fa0, a0, dyn{{$}}
191# CHECK-ALIAS: fcvt.h.lu fa0, a0{{$}}
192fcvt.h.lu fa0, a0
193
194# Zfbfmin instructions
195
196# CHECK-INST: fcvt.s.bf16 fa0, fa0{{$}}
197# CHECK-ALIAS: fcvt.s.bf16 fa0, fa0{{$}}
198fcvt.s.bf16 fa0, fa0
199# CHECK-INST: fcvt.s.bf16 fa0, fa0{{$}}
200# CHECK-ALIAS: fcvt.s.bf16 fa0, fa0{{$}}
201fcvt.s.bf16 fa0, fa0, rne
202
203# CHECK-INST: fcvt.bf16.s fa0, fa0, dyn{{$}}
204# CHECK-ALIAS: fcvt.bf16.s fa0, fa0{{$}}
205fcvt.bf16.s fa0, fa0
206