xref: /llvm-project/llvm/test/MC/Mips/mips32r6/nal.s (revision 65f07b804c2c05cf49bd043f2a6e9a0020198165)
1# RUN: llvm-mc %s -triple=mipsisa32r6el-linux-gnu -filetype=obj -o - | \
2# RUN:		 llvm-objdump --no-print-imm-hex -d - | FileCheck %s --check-prefix=MIPS32R6-EL
3# RUN: llvm-mc %s -triple=mipsisa32r6-linux-gnu -filetype=obj -o - | \
4# RUN: 		 llvm-objdump --no-print-imm-hex -d - | FileCheck %s --check-prefix=MIPS32R6-EB
5
6# Whether it is a macro or an actual instruction, it always has a delay slot.
7# Ensure the delay slot is filled correctly.
8# Also ensure that NAL does not reside in a forbidden slot.
9# MIPS32R6-EL:		00 00 80 f8   bnezc	$4, 0x4
10# MIPS32R6-EL-NEXT:	00 00 00 00   nop
11# MIPS32R6-EL:		00 00 10 04   nal
12# MIPS32R6-EL-NEXT:	00 00 00 00   nop
13# MIPS32R6-EB:		f8 80 00 00   bnezc	$4, 0x4
14# MIPS32R6-EB-NEXT:	00 00 00 00   nop
15# MIPS32R6-EB:		04 10 00 00   nal
16# MIPS32R6-EB-NEXT:	00 00 00 00   nop
17
18nal_test:
19	# We generate a fobidden solt just for testing.
20	bnezc $a0, 0
21	nal
22