1e8a3b722SEvgenii Stepanov; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2e8a3b722SEvgenii Stepanov; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s 3e8a3b722SEvgenii Stepanov 4e8a3b722SEvgenii Stepanovtarget datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5e8a3b722SEvgenii Stepanovtarget triple = "x86_64-unknown-linux-gnu" 6e8a3b722SEvgenii Stepanov 7e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_sadd_with_overflow(i64 %a, i64 %b) #0 { 8e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_sadd_with_overflow( 9e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0:[0-9]+]] { 10e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 11e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 12e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 13*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 14*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 15*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 16*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 17e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 [[A]], i64 [[B]]) 18*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 19e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 20e8a3b722SEvgenii Stepanov; 21e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b) 22e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 23e8a3b722SEvgenii Stepanov} 24e8a3b722SEvgenii Stepanov 25e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_uadd_with_overflow(i64 %a, i64 %b) #0 { 26e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_uadd_with_overflow( 27e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 28e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 29e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 30e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 31*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 32*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 33*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 34*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 35e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A]], i64 [[B]]) 36*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 37e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 38e8a3b722SEvgenii Stepanov; 39e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) 40e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 41e8a3b722SEvgenii Stepanov} 42e8a3b722SEvgenii Stepanov 43e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_smul_with_overflow(i64 %a, i64 %b) #0 { 44e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_smul_with_overflow( 45e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 46e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 47e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 48e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 49*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 50*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 51*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 52*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 53e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 [[A]], i64 [[B]]) 54*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 55e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 56e8a3b722SEvgenii Stepanov; 57e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %a, i64 %b) 58e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 59e8a3b722SEvgenii Stepanov} 60e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_umul_with_overflow(i64 %a, i64 %b) #0 { 61e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_umul_with_overflow( 62e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 63e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 64e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 65e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 66*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 67*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 68*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 69*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 70e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A]], i64 [[B]]) 71*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 72e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 73e8a3b722SEvgenii Stepanov; 74e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b) 75e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 76e8a3b722SEvgenii Stepanov} 77e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_ssub_with_overflow(i64 %a, i64 %b) #0 { 78e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_ssub_with_overflow( 79e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 80e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 81e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 82e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 83*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 84*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 85*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 86*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 87e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 [[A]], i64 [[B]]) 88*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 89e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 90e8a3b722SEvgenii Stepanov; 91e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) 92e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 93e8a3b722SEvgenii Stepanov} 94e8a3b722SEvgenii Stepanovdefine {i64, i1} @test_usub_with_overflow(i64 %a, i64 %b) #0 { 95e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { i64, i1 } @test_usub_with_overflow( 96e8a3b722SEvgenii Stepanov; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 97e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 98e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 99e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 100*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 101*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 102*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 103*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 104e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[A]], i64 [[B]]) 105*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 106e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { i64, i1 } [[RES]] 107e8a3b722SEvgenii Stepanov; 108e8a3b722SEvgenii Stepanov %res = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 109e8a3b722SEvgenii Stepanov ret { i64, i1 } %res 110e8a3b722SEvgenii Stepanov} 111e8a3b722SEvgenii Stepanov 112e8a3b722SEvgenii Stepanovdefine {<4 x i32>, <4 x i1>} @test_sadd_with_overflow_vec(<4 x i32> %a, <4 x i32> %b) #0 { 113e8a3b722SEvgenii Stepanov; CHECK-LABEL: define { <4 x i32>, <4 x i1> } @test_sadd_with_overflow_vec( 114e8a3b722SEvgenii Stepanov; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR0]] { 115e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8 116e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 117e8a3b722SEvgenii Stepanov; CHECK-NEXT: call void @llvm.donothing() 118*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] 119*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <4 x i32> [[TMP3]], zeroinitializer 120*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { <4 x i32>, <4 x i1> } poison, <4 x i32> [[TMP3]], 0 121*e72c949cSEvgenii Stepanov; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { <4 x i32>, <4 x i1> } [[TMP5]], <4 x i1> [[TMP4]], 1 122e8a3b722SEvgenii Stepanov; CHECK-NEXT: [[RES:%.*]] = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> [[A]], <4 x i32> [[B]]) 123*e72c949cSEvgenii Stepanov; CHECK-NEXT: store { <4 x i32>, <4 x i1> } [[TMP6]], ptr @__msan_retval_tls, align 8 124e8a3b722SEvgenii Stepanov; CHECK-NEXT: ret { <4 x i32>, <4 x i1> } [[RES]] 125e8a3b722SEvgenii Stepanov; 126e8a3b722SEvgenii Stepanov %res = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b) 127e8a3b722SEvgenii Stepanov ret { <4 x i32>, <4 x i1> } %res 128e8a3b722SEvgenii Stepanov} 129e8a3b722SEvgenii Stepanov 130e8a3b722SEvgenii Stepanovattributes #0 = { sanitize_memory } 131