1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 2; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s 3 4target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5target triple = "x86_64-unknown-linux-gnu" 6 7define {i64, i1} @test_sadd_with_overflow(i64 %a, i64 %b) #0 { 8; CHECK-LABEL: define { i64, i1 } @test_sadd_with_overflow( 9; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0:[0-9]+]] { 10; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 11; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 12; CHECK-NEXT: call void @llvm.donothing() 13; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 14; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 15; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 16; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 17; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 [[A]], i64 [[B]]) 18; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 19; CHECK-NEXT: ret { i64, i1 } [[RES]] 20; 21 %res = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %a, i64 %b) 22 ret { i64, i1 } %res 23} 24 25define {i64, i1} @test_uadd_with_overflow(i64 %a, i64 %b) #0 { 26; CHECK-LABEL: define { i64, i1 } @test_uadd_with_overflow( 27; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 28; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 29; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 30; CHECK-NEXT: call void @llvm.donothing() 31; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 32; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 33; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 34; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 35; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[A]], i64 [[B]]) 36; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 37; CHECK-NEXT: ret { i64, i1 } [[RES]] 38; 39 %res = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) 40 ret { i64, i1 } %res 41} 42 43define {i64, i1} @test_smul_with_overflow(i64 %a, i64 %b) #0 { 44; CHECK-LABEL: define { i64, i1 } @test_smul_with_overflow( 45; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 46; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 47; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 48; CHECK-NEXT: call void @llvm.donothing() 49; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 50; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 51; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 52; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 53; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 [[A]], i64 [[B]]) 54; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 55; CHECK-NEXT: ret { i64, i1 } [[RES]] 56; 57 %res = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %a, i64 %b) 58 ret { i64, i1 } %res 59} 60define {i64, i1} @test_umul_with_overflow(i64 %a, i64 %b) #0 { 61; CHECK-LABEL: define { i64, i1 } @test_umul_with_overflow( 62; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 63; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 64; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 65; CHECK-NEXT: call void @llvm.donothing() 66; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 67; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 68; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 69; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 70; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A]], i64 [[B]]) 71; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 72; CHECK-NEXT: ret { i64, i1 } [[RES]] 73; 74 %res = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b) 75 ret { i64, i1 } %res 76} 77define {i64, i1} @test_ssub_with_overflow(i64 %a, i64 %b) #0 { 78; CHECK-LABEL: define { i64, i1 } @test_ssub_with_overflow( 79; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 80; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 81; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 82; CHECK-NEXT: call void @llvm.donothing() 83; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 84; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 85; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 86; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 87; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 [[A]], i64 [[B]]) 88; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 89; CHECK-NEXT: ret { i64, i1 } [[RES]] 90; 91 %res = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) 92 ret { i64, i1 } %res 93} 94define {i64, i1} @test_usub_with_overflow(i64 %a, i64 %b) #0 { 95; CHECK-LABEL: define { i64, i1 } @test_usub_with_overflow( 96; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { 97; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 98; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8 99; CHECK-NEXT: call void @llvm.donothing() 100; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], [[TMP2]] 101; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 0 102; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP3]], 0 103; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i64, i1 } [[TMP5]], i1 [[TMP4]], 1 104; CHECK-NEXT: [[RES:%.*]] = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 [[A]], i64 [[B]]) 105; CHECK-NEXT: store { i64, i1 } [[TMP6]], ptr @__msan_retval_tls, align 8 106; CHECK-NEXT: ret { i64, i1 } [[RES]] 107; 108 %res = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 109 ret { i64, i1 } %res 110} 111 112define {<4 x i32>, <4 x i1>} @test_sadd_with_overflow_vec(<4 x i32> %a, <4 x i32> %b) #0 { 113; CHECK-LABEL: define { <4 x i32>, <4 x i1> } @test_sadd_with_overflow_vec( 114; CHECK-SAME: <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) #[[ATTR0]] { 115; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr @__msan_param_tls, align 8 116; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 16) to ptr), align 8 117; CHECK-NEXT: call void @llvm.donothing() 118; CHECK-NEXT: [[TMP3:%.*]] = or <4 x i32> [[TMP1]], [[TMP2]] 119; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <4 x i32> [[TMP3]], zeroinitializer 120; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { <4 x i32>, <4 x i1> } poison, <4 x i32> [[TMP3]], 0 121; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { <4 x i32>, <4 x i1> } [[TMP5]], <4 x i1> [[TMP4]], 1 122; CHECK-NEXT: [[RES:%.*]] = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> [[A]], <4 x i32> [[B]]) 123; CHECK-NEXT: store { <4 x i32>, <4 x i1> } [[TMP6]], ptr @__msan_retval_tls, align 8 124; CHECK-NEXT: ret { <4 x i32>, <4 x i1> } [[RES]] 125; 126 %res = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %a, <4 x i32> %b) 127 ret { <4 x i32>, <4 x i1> } %res 128} 129 130attributes #0 = { sanitize_memory } 131