xref: /llvm-project/llvm/test/CodeGen/Xtensa/inline-asm-mem-constraint.ll (revision dc2d0d5e1a4e7a7524f68aa9739acf22bee13b9e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=xtensa < %s | FileCheck %s --check-prefix=XTENSA
3
4define i32 @m_offset_0(ptr %p) nounwind {
5; XTENSA-LABEL: m_offset_0:
6; XTENSA:         #APP
7; XTENSA-NEXT:    l32i a2, a2, 0
8; XTENSA-NEXT:    #NO_APP
9; XTENSA-NEXT:    ret
10  %1 = call i32 asm "l32i $0, $1", "=r,*m"(ptr elementtype(i32) %p)
11  ret i32 %1
12}
13
14define i32 @m_offset_1020(ptr %p) nounwind {
15; XTENSA-LABEL: m_offset_1020:
16; XTENSA:         #APP
17; XTENSA-NEXT:    l32i a2, a2, 1020
18; XTENSA-NEXT:    #NO_APP
19; XTENSA-NEXT:    ret
20  %1 = getelementptr inbounds i8, ptr %p, i32 1020
21  %2 = call i32 asm "l32i $0, $1", "=r,*m"(ptr elementtype(i32) %1)
22  ret i32 %2
23}
24
25define i8 @m_i8_offset_7(ptr %p) nounwind {
26; XTENSA-LABEL: m_i8_offset_7:
27; XTENSA:         addi a8, a2, 7
28; XTENSA-NEXT:    #APP
29; XTENSA-NEXT:    l8ui a2, a8, 0
30; XTENSA-NEXT:    #NO_APP
31; XTENSA-NEXT:    ret
32  %1 = getelementptr inbounds i8, ptr %p, i32 7
33  %2 = call i8 asm "l8ui $0, $1", "=r,*m"(ptr elementtype(i8) %1)
34  ret i8 %2
35}
36
37define i16 @m_i16_offset_10(ptr %p) nounwind {
38; XTENSA-LABEL: m_i16_offset_10:
39; XTENSA:         #APP
40; XTENSA-NEXT:    l16si a2, a2, 20
41; XTENSA-NEXT:    #NO_APP
42; XTENSA-NEXT:    ret
43  %1 = getelementptr inbounds i16, ptr %p, i32 10
44  %2 = call i16 asm "l16si $0, $1", "=r,*m"(ptr elementtype(i16) %1)
45  ret i16 %2
46}
47