xref: /llvm-project/llvm/test/CodeGen/Xtensa/bswap.ll (revision fab515ca7f3c64b47dd94a92156a4696771ee22a) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=xtensa -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=XTENSA %s
4
5declare i16 @llvm.bswap.i16(i16)
6declare i32 @llvm.bswap.i32(i32)
7declare i64 @llvm.bswap.i64(i64)
8declare i8 @llvm.bitreverse.i8(i8)
9declare i16 @llvm.bitreverse.i16(i16)
10declare i32 @llvm.bitreverse.i32(i32)
11declare i64 @llvm.bitreverse.i64(i64)
12
13define i16 @test_bswap_i16(i16 %a) nounwind {
14; XTENSA-LABEL: test_bswap_i16:
15; XTENSA:         l32r a8, .LCPI0_0
16; XTENSA-NEXT:    and a8, a2, a8
17; XTENSA-NEXT:    srli a8, a8, 8
18; XTENSA-NEXT:    slli a9, a2, 8
19; XTENSA-NEXT:    or a2, a9, a8
20; XTENSA-NEXT:    ret
21  %tmp = call i16 @llvm.bswap.i16(i16 %a)
22  ret i16 %tmp
23}
24
25define i32 @test_bswap_i32(i32 %a) nounwind {
26; XTENSA-LABEL: test_bswap_i32:
27; XTENSA:         srli a8, a2, 8
28; XTENSA-NEXT:    l32r a9, .LCPI1_0
29; XTENSA-NEXT:    and a8, a8, a9
30; XTENSA-NEXT:    extui a10, a2, 24, 8
31; XTENSA-NEXT:    or a8, a8, a10
32; XTENSA-NEXT:    and a9, a2, a9
33; XTENSA-NEXT:    slli a9, a9, 8
34; XTENSA-NEXT:    slli a10, a2, 24
35; XTENSA-NEXT:    or a9, a10, a9
36; XTENSA-NEXT:    or a2, a9, a8
37; XTENSA-NEXT:    ret
38  %tmp = call i32 @llvm.bswap.i32(i32 %a)
39  ret i32 %tmp
40}
41
42define i64 @test_bswap_i64(i64 %a) nounwind {
43; XTENSA-LABEL: test_bswap_i64:
44; XTENSA:         srli a8, a3, 8
45; XTENSA-NEXT:    l32r a9, .LCPI2_0
46; XTENSA-NEXT:    and a8, a8, a9
47; XTENSA-NEXT:    extui a10, a3, 24, 8
48; XTENSA-NEXT:    or a8, a8, a10
49; XTENSA-NEXT:    and a10, a3, a9
50; XTENSA-NEXT:    slli a10, a10, 8
51; XTENSA-NEXT:    slli a11, a3, 24
52; XTENSA-NEXT:    or a10, a11, a10
53; XTENSA-NEXT:    or a8, a10, a8
54; XTENSA-NEXT:    srli a10, a2, 8
55; XTENSA-NEXT:    and a10, a10, a9
56; XTENSA-NEXT:    extui a11, a2, 24, 8
57; XTENSA-NEXT:    or a10, a10, a11
58; XTENSA-NEXT:    and a9, a2, a9
59; XTENSA-NEXT:    slli a9, a9, 8
60; XTENSA-NEXT:    slli a11, a2, 24
61; XTENSA-NEXT:    or a9, a11, a9
62; XTENSA-NEXT:    or a3, a9, a10
63; XTENSA-NEXT:    or a2, a8, a8
64; XTENSA-NEXT:    ret
65  %tmp = call i64 @llvm.bswap.i64(i64 %a)
66  ret i64 %tmp
67}
68
69define i8 @test_bitreverse_i8(i8 %a) nounwind {
70; XTENSA-LABEL: test_bitreverse_i8:
71; XTENSA:         movi a8, 15
72; XTENSA-NEXT:    and a8, a2, a8
73; XTENSA-NEXT:    slli a8, a8, 4
74; XTENSA-NEXT:    movi a9, 240
75; XTENSA-NEXT:    and a9, a2, a9
76; XTENSA-NEXT:    srli a9, a9, 4
77; XTENSA-NEXT:    or a8, a9, a8
78; XTENSA-NEXT:    srli a9, a8, 2
79; XTENSA-NEXT:    movi a10, 51
80; XTENSA-NEXT:    and a9, a9, a10
81; XTENSA-NEXT:    and a8, a8, a10
82; XTENSA-NEXT:    slli a8, a8, 2
83; XTENSA-NEXT:    or a8, a9, a8
84; XTENSA-NEXT:    srli a9, a8, 1
85; XTENSA-NEXT:    movi a10, 85
86; XTENSA-NEXT:    and a9, a9, a10
87; XTENSA-NEXT:    and a8, a8, a10
88; XTENSA-NEXT:    slli a8, a8, 1
89; XTENSA-NEXT:    or a2, a9, a8
90; XTENSA-NEXT:    ret
91  %tmp = call i8 @llvm.bitreverse.i8(i8 %a)
92  ret i8 %tmp
93}
94
95define i16 @test_bitreverse_i16(i16 %a) nounwind {
96; XTENSA-LABEL: test_bitreverse_i16:
97; XTENSA:         l32r a8, .LCPI4_0
98; XTENSA-NEXT:    and a8, a2, a8
99; XTENSA-NEXT:    srli a8, a8, 8
100; XTENSA-NEXT:    slli a9, a2, 8
101; XTENSA-NEXT:    or a8, a9, a8
102; XTENSA-NEXT:    srli a9, a8, 4
103; XTENSA-NEXT:    l32r a10, .LCPI4_1
104; XTENSA-NEXT:    and a9, a9, a10
105; XTENSA-NEXT:    and a8, a8, a10
106; XTENSA-NEXT:    slli a8, a8, 4
107; XTENSA-NEXT:    or a8, a9, a8
108; XTENSA-NEXT:    srli a9, a8, 2
109; XTENSA-NEXT:    l32r a10, .LCPI4_2
110; XTENSA-NEXT:    and a9, a9, a10
111; XTENSA-NEXT:    and a8, a8, a10
112; XTENSA-NEXT:    slli a8, a8, 2
113; XTENSA-NEXT:    or a8, a9, a8
114; XTENSA-NEXT:    srli a9, a8, 1
115; XTENSA-NEXT:    l32r a10, .LCPI4_3
116; XTENSA-NEXT:    and a9, a9, a10
117; XTENSA-NEXT:    and a8, a8, a10
118; XTENSA-NEXT:    slli a8, a8, 1
119; XTENSA-NEXT:    or a2, a9, a8
120; XTENSA-NEXT:    ret
121  %tmp = call i16 @llvm.bitreverse.i16(i16 %a)
122  ret i16 %tmp
123}
124
125define i32 @test_bitreverse_i32(i32 %a) nounwind {
126; XTENSA-LABEL: test_bitreverse_i32:
127; XTENSA:         srli a8, a2, 8
128; XTENSA-NEXT:    l32r a9, .LCPI5_0
129; XTENSA-NEXT:    and a8, a8, a9
130; XTENSA-NEXT:    extui a10, a2, 24, 8
131; XTENSA-NEXT:    or a8, a8, a10
132; XTENSA-NEXT:    and a9, a2, a9
133; XTENSA-NEXT:    slli a9, a9, 8
134; XTENSA-NEXT:    slli a10, a2, 24
135; XTENSA-NEXT:    or a9, a10, a9
136; XTENSA-NEXT:    or a8, a9, a8
137; XTENSA-NEXT:    srli a9, a8, 4
138; XTENSA-NEXT:    l32r a10, .LCPI5_1
139; XTENSA-NEXT:    and a9, a9, a10
140; XTENSA-NEXT:    and a8, a8, a10
141; XTENSA-NEXT:    slli a8, a8, 4
142; XTENSA-NEXT:    or a8, a9, a8
143; XTENSA-NEXT:    srli a9, a8, 2
144; XTENSA-NEXT:    l32r a10, .LCPI5_2
145; XTENSA-NEXT:    and a9, a9, a10
146; XTENSA-NEXT:    and a8, a8, a10
147; XTENSA-NEXT:    slli a8, a8, 2
148; XTENSA-NEXT:    or a8, a9, a8
149; XTENSA-NEXT:    srli a9, a8, 1
150; XTENSA-NEXT:    l32r a10, .LCPI5_3
151; XTENSA-NEXT:    and a9, a9, a10
152; XTENSA-NEXT:    and a8, a8, a10
153; XTENSA-NEXT:    slli a8, a8, 1
154; XTENSA-NEXT:    or a2, a9, a8
155; XTENSA-NEXT:    ret
156  %tmp = call i32 @llvm.bitreverse.i32(i32 %a)
157  ret i32 %tmp
158}
159
160define i64 @test_bitreverse_i64(i64 %a) nounwind {
161; XTENSA-LABEL: test_bitreverse_i64:
162; XTENSA:         srli a8, a3, 8
163; XTENSA-NEXT:    l32r a9, .LCPI6_0
164; XTENSA-NEXT:    and a8, a8, a9
165; XTENSA-NEXT:    extui a10, a3, 24, 8
166; XTENSA-NEXT:    or a8, a8, a10
167; XTENSA-NEXT:    and a10, a3, a9
168; XTENSA-NEXT:    slli a10, a10, 8
169; XTENSA-NEXT:    slli a11, a3, 24
170; XTENSA-NEXT:    or a10, a11, a10
171; XTENSA-NEXT:    or a8, a10, a8
172; XTENSA-NEXT:    srli a10, a8, 4
173; XTENSA-NEXT:    l32r a11, .LCPI6_1
174; XTENSA-NEXT:    and a10, a10, a11
175; XTENSA-NEXT:    and a8, a8, a11
176; XTENSA-NEXT:    slli a8, a8, 4
177; XTENSA-NEXT:    or a8, a10, a8
178; XTENSA-NEXT:    srli a10, a8, 2
179; XTENSA-NEXT:    l32r a7, .LCPI6_2
180; XTENSA-NEXT:    and a10, a10, a7
181; XTENSA-NEXT:    and a8, a8, a7
182; XTENSA-NEXT:    slli a8, a8, 2
183; XTENSA-NEXT:    or a8, a10, a8
184; XTENSA-NEXT:    srli a10, a8, 1
185; XTENSA-NEXT:    l32r a6, .LCPI6_3
186; XTENSA-NEXT:    and a10, a10, a6
187; XTENSA-NEXT:    and a8, a8, a6
188; XTENSA-NEXT:    slli a8, a8, 1
189; XTENSA-NEXT:    or a8, a10, a8
190; XTENSA-NEXT:    srli a10, a2, 8
191; XTENSA-NEXT:    and a10, a10, a9
192; XTENSA-NEXT:    extui a5, a2, 24, 8
193; XTENSA-NEXT:    or a10, a10, a5
194; XTENSA-NEXT:    and a9, a2, a9
195; XTENSA-NEXT:    slli a9, a9, 8
196; XTENSA-NEXT:    slli a5, a2, 24
197; XTENSA-NEXT:    or a9, a5, a9
198; XTENSA-NEXT:    or a9, a9, a10
199; XTENSA-NEXT:    srli a10, a9, 4
200; XTENSA-NEXT:    and a10, a10, a11
201; XTENSA-NEXT:    and a9, a9, a11
202; XTENSA-NEXT:    slli a9, a9, 4
203; XTENSA-NEXT:    or a9, a10, a9
204; XTENSA-NEXT:    srli a10, a9, 2
205; XTENSA-NEXT:    and a10, a10, a7
206; XTENSA-NEXT:    and a9, a9, a7
207; XTENSA-NEXT:    slli a9, a9, 2
208; XTENSA-NEXT:    or a9, a10, a9
209; XTENSA-NEXT:    srli a10, a9, 1
210; XTENSA-NEXT:    and a10, a10, a6
211; XTENSA-NEXT:    and a9, a9, a6
212; XTENSA-NEXT:    slli a9, a9, 1
213; XTENSA-NEXT:    or a3, a10, a9
214; XTENSA-NEXT:    or a2, a8, a8
215; XTENSA-NEXT:    ret
216  %tmp = call i64 @llvm.bitreverse.i64(i64 %a)
217  ret i64 %tmp
218}
219
220define i16 @test_bswap_bitreverse_i16(i16 %a) nounwind {
221; XTENSA-LABEL: test_bswap_bitreverse_i16:
222; XTENSA:         srli a8, a2, 4
223; XTENSA-NEXT:    l32r a9, .LCPI7_0
224; XTENSA-NEXT:    and a8, a8, a9
225; XTENSA-NEXT:    and a9, a2, a9
226; XTENSA-NEXT:    slli a9, a9, 4
227; XTENSA-NEXT:    or a8, a8, a9
228; XTENSA-NEXT:    srli a9, a8, 2
229; XTENSA-NEXT:    l32r a10, .LCPI7_1
230; XTENSA-NEXT:    and a9, a9, a10
231; XTENSA-NEXT:    and a8, a8, a10
232; XTENSA-NEXT:    slli a8, a8, 2
233; XTENSA-NEXT:    or a8, a9, a8
234; XTENSA-NEXT:    srli a9, a8, 1
235; XTENSA-NEXT:    l32r a10, .LCPI7_2
236; XTENSA-NEXT:    and a9, a9, a10
237; XTENSA-NEXT:    and a8, a8, a10
238; XTENSA-NEXT:    slli a8, a8, 1
239; XTENSA-NEXT:    or a2, a9, a8
240; XTENSA-NEXT:    ret
241  %tmp = call i16 @llvm.bswap.i16(i16 %a)
242  %tmp2 = call i16 @llvm.bitreverse.i16(i16 %tmp)
243  ret i16 %tmp2
244}
245
246define i32 @test_bswap_bitreverse_i32(i32 %a) nounwind {
247; XTENSA-LABEL: test_bswap_bitreverse_i32:
248; XTENSA:         srli a8, a2, 4
249; XTENSA-NEXT:    l32r a9, .LCPI8_0
250; XTENSA-NEXT:    and a8, a8, a9
251; XTENSA-NEXT:    and a9, a2, a9
252; XTENSA-NEXT:    slli a9, a9, 4
253; XTENSA-NEXT:    or a8, a8, a9
254; XTENSA-NEXT:    srli a9, a8, 2
255; XTENSA-NEXT:    l32r a10, .LCPI8_1
256; XTENSA-NEXT:    and a9, a9, a10
257; XTENSA-NEXT:    and a8, a8, a10
258; XTENSA-NEXT:    slli a8, a8, 2
259; XTENSA-NEXT:    or a8, a9, a8
260; XTENSA-NEXT:    srli a9, a8, 1
261; XTENSA-NEXT:    l32r a10, .LCPI8_2
262; XTENSA-NEXT:    and a9, a9, a10
263; XTENSA-NEXT:    and a8, a8, a10
264; XTENSA-NEXT:    slli a8, a8, 1
265; XTENSA-NEXT:    or a2, a9, a8
266; XTENSA-NEXT:    ret
267  %tmp = call i32 @llvm.bswap.i32(i32 %a)
268  %tmp2 = call i32 @llvm.bitreverse.i32(i32 %tmp)
269  ret i32 %tmp2
270}
271
272define i64 @test_bswap_bitreverse_i64(i64 %a) nounwind {
273; XTENSA-LABEL: test_bswap_bitreverse_i64:
274; XTENSA:         srli a8, a2, 4
275; XTENSA-NEXT:    l32r a9, .LCPI9_0
276; XTENSA-NEXT:    and a8, a8, a9
277; XTENSA-NEXT:    and a10, a2, a9
278; XTENSA-NEXT:    slli a10, a10, 4
279; XTENSA-NEXT:    or a8, a8, a10
280; XTENSA-NEXT:    srli a10, a8, 2
281; XTENSA-NEXT:    l32r a11, .LCPI9_1
282; XTENSA-NEXT:    and a10, a10, a11
283; XTENSA-NEXT:    and a8, a8, a11
284; XTENSA-NEXT:    slli a8, a8, 2
285; XTENSA-NEXT:    or a8, a10, a8
286; XTENSA-NEXT:    srli a10, a8, 1
287; XTENSA-NEXT:    l32r a7, .LCPI9_2
288; XTENSA-NEXT:    and a10, a10, a7
289; XTENSA-NEXT:    and a8, a8, a7
290; XTENSA-NEXT:    slli a8, a8, 1
291; XTENSA-NEXT:    or a2, a10, a8
292; XTENSA-NEXT:    srli a8, a3, 4
293; XTENSA-NEXT:    and a8, a8, a9
294; XTENSA-NEXT:    and a9, a3, a9
295; XTENSA-NEXT:    slli a9, a9, 4
296; XTENSA-NEXT:    or a8, a8, a9
297; XTENSA-NEXT:    srli a9, a8, 2
298; XTENSA-NEXT:    and a9, a9, a11
299; XTENSA-NEXT:    and a8, a8, a11
300; XTENSA-NEXT:    slli a8, a8, 2
301; XTENSA-NEXT:    or a8, a9, a8
302; XTENSA-NEXT:    srli a9, a8, 1
303; XTENSA-NEXT:    and a9, a9, a7
304; XTENSA-NEXT:    and a8, a8, a7
305; XTENSA-NEXT:    slli a8, a8, 1
306; XTENSA-NEXT:    or a3, a9, a8
307; XTENSA-NEXT:    ret
308  %tmp = call i64 @llvm.bswap.i64(i64 %a)
309  %tmp2 = call i64 @llvm.bitreverse.i64(i64 %tmp)
310  ret i64 %tmp2
311}
312
313define i16 @test_bitreverse_bswap_i16(i16 %a) nounwind {
314; XTENSA-LABEL: test_bitreverse_bswap_i16:
315; XTENSA:         srli a8, a2, 4
316; XTENSA-NEXT:    l32r a9, .LCPI10_0
317; XTENSA-NEXT:    and a8, a8, a9
318; XTENSA-NEXT:    and a9, a2, a9
319; XTENSA-NEXT:    slli a9, a9, 4
320; XTENSA-NEXT:    or a8, a8, a9
321; XTENSA-NEXT:    srli a9, a8, 2
322; XTENSA-NEXT:    l32r a10, .LCPI10_1
323; XTENSA-NEXT:    and a9, a9, a10
324; XTENSA-NEXT:    and a8, a8, a10
325; XTENSA-NEXT:    slli a8, a8, 2
326; XTENSA-NEXT:    or a8, a9, a8
327; XTENSA-NEXT:    srli a9, a8, 1
328; XTENSA-NEXT:    l32r a10, .LCPI10_2
329; XTENSA-NEXT:    and a9, a9, a10
330; XTENSA-NEXT:    and a8, a8, a10
331; XTENSA-NEXT:    slli a8, a8, 1
332; XTENSA-NEXT:    or a2, a9, a8
333; XTENSA-NEXT:    ret
334  %tmp = call i16 @llvm.bitreverse.i16(i16 %a)
335  %tmp2 = call i16 @llvm.bswap.i16(i16 %tmp)
336  ret i16 %tmp2
337}
338
339define i32 @test_bitreverse_bswap_i32(i32 %a) nounwind {
340; XTENSA-LABEL: test_bitreverse_bswap_i32:
341; XTENSA:         srli a8, a2, 4
342; XTENSA-NEXT:    l32r a9, .LCPI11_0
343; XTENSA-NEXT:    and a8, a8, a9
344; XTENSA-NEXT:    and a9, a2, a9
345; XTENSA-NEXT:    slli a9, a9, 4
346; XTENSA-NEXT:    or a8, a8, a9
347; XTENSA-NEXT:    srli a9, a8, 2
348; XTENSA-NEXT:    l32r a10, .LCPI11_1
349; XTENSA-NEXT:    and a9, a9, a10
350; XTENSA-NEXT:    and a8, a8, a10
351; XTENSA-NEXT:    slli a8, a8, 2
352; XTENSA-NEXT:    or a8, a9, a8
353; XTENSA-NEXT:    srli a9, a8, 1
354; XTENSA-NEXT:    l32r a10, .LCPI11_2
355; XTENSA-NEXT:    and a9, a9, a10
356; XTENSA-NEXT:    and a8, a8, a10
357; XTENSA-NEXT:    slli a8, a8, 1
358; XTENSA-NEXT:    or a2, a9, a8
359; XTENSA-NEXT:    ret
360  %tmp = call i32 @llvm.bitreverse.i32(i32 %a)
361  %tmp2 = call i32 @llvm.bswap.i32(i32 %tmp)
362  ret i32 %tmp2
363}
364
365define i64 @test_bitreverse_bswap_i64(i64 %a) nounwind {
366; XTENSA-LABEL: test_bitreverse_bswap_i64:
367; XTENSA:         srli a8, a2, 4
368; XTENSA-NEXT:    l32r a9, .LCPI12_0
369; XTENSA-NEXT:    and a8, a8, a9
370; XTENSA-NEXT:    and a10, a2, a9
371; XTENSA-NEXT:    slli a10, a10, 4
372; XTENSA-NEXT:    or a8, a8, a10
373; XTENSA-NEXT:    srli a10, a8, 2
374; XTENSA-NEXT:    l32r a11, .LCPI12_1
375; XTENSA-NEXT:    and a10, a10, a11
376; XTENSA-NEXT:    and a8, a8, a11
377; XTENSA-NEXT:    slli a8, a8, 2
378; XTENSA-NEXT:    or a8, a10, a8
379; XTENSA-NEXT:    srli a10, a8, 1
380; XTENSA-NEXT:    l32r a7, .LCPI12_2
381; XTENSA-NEXT:    and a10, a10, a7
382; XTENSA-NEXT:    and a8, a8, a7
383; XTENSA-NEXT:    slli a8, a8, 1
384; XTENSA-NEXT:    or a2, a10, a8
385; XTENSA-NEXT:    srli a8, a3, 4
386; XTENSA-NEXT:    and a8, a8, a9
387; XTENSA-NEXT:    and a9, a3, a9
388; XTENSA-NEXT:    slli a9, a9, 4
389; XTENSA-NEXT:    or a8, a8, a9
390; XTENSA-NEXT:    srli a9, a8, 2
391; XTENSA-NEXT:    and a9, a9, a11
392; XTENSA-NEXT:    and a8, a8, a11
393; XTENSA-NEXT:    slli a8, a8, 2
394; XTENSA-NEXT:    or a8, a9, a8
395; XTENSA-NEXT:    srli a9, a8, 1
396; XTENSA-NEXT:    and a9, a9, a7
397; XTENSA-NEXT:    and a8, a8, a7
398; XTENSA-NEXT:    slli a8, a8, 1
399; XTENSA-NEXT:    or a3, a9, a8
400; XTENSA-NEXT:    ret
401  %tmp = call i64 @llvm.bitreverse.i64(i64 %a)
402  %tmp2 = call i64 @llvm.bswap.i64(i64 %tmp)
403  ret i64 %tmp2
404}
405