1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake| FileCheck %s --check-prefixes=CHECK,PREFER256 3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=sandybridge| FileCheck %s --check-prefixes=CHECK,LIGHT256 4; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1| FileCheck %s --check-prefixes=CHECK,PREFER256 5 6; This tests whether or not we generate vectors large than preferred vector width when 7; lowering memmove. 8 9; Function Attrs: nounwind uwtable 10define weak_odr dso_local void @A(ptr %src, ptr %dst) local_unnamed_addr #0 { 11; PREFER256-LABEL: A: 12; PREFER256: # %bb.0: # %entry 13; PREFER256-NEXT: vmovups (%rdi), %ymm0 14; PREFER256-NEXT: vmovups %ymm0, (%rsi) 15; PREFER256-NEXT: vzeroupper 16; PREFER256-NEXT: retq 17; 18; LIGHT256-LABEL: A: 19; LIGHT256: # %bb.0: # %entry 20; LIGHT256-NEXT: vmovups (%rdi), %xmm0 21; LIGHT256-NEXT: vmovups 16(%rdi), %xmm1 22; LIGHT256-NEXT: vmovups %xmm1, 16(%rsi) 23; LIGHT256-NEXT: vmovups %xmm0, (%rsi) 24; LIGHT256-NEXT: retq 25entry: 26 call void @llvm.memmove.p0.p0.i64(ptr align 1 %dst, ptr align 1 %src, i64 32, i1 false) 27 ret void 28} 29 30; Function Attrs: nounwind uwtable 31define weak_odr dso_local void @B(ptr %src, ptr %dst) local_unnamed_addr #0 { 32; PREFER256-LABEL: B: 33; PREFER256: # %bb.0: # %entry 34; PREFER256-NEXT: vmovups (%rdi), %ymm0 35; PREFER256-NEXT: vmovups 32(%rdi), %ymm1 36; PREFER256-NEXT: vmovups %ymm1, 32(%rsi) 37; PREFER256-NEXT: vmovups %ymm0, (%rsi) 38; PREFER256-NEXT: vzeroupper 39; PREFER256-NEXT: retq 40; 41; LIGHT256-LABEL: B: 42; LIGHT256: # %bb.0: # %entry 43; LIGHT256-NEXT: vmovups (%rdi), %xmm0 44; LIGHT256-NEXT: vmovups 16(%rdi), %xmm1 45; LIGHT256-NEXT: vmovups 32(%rdi), %xmm2 46; LIGHT256-NEXT: vmovups 48(%rdi), %xmm3 47; LIGHT256-NEXT: vmovups %xmm3, 48(%rsi) 48; LIGHT256-NEXT: vmovups %xmm2, 32(%rsi) 49; LIGHT256-NEXT: vmovups %xmm1, 16(%rsi) 50; LIGHT256-NEXT: vmovups %xmm0, (%rsi) 51; LIGHT256-NEXT: retq 52entry: 53 call void @llvm.memmove.p0.p0.i64(ptr align 1 %dst, ptr align 1 %src, i64 64, i1 false) 54 ret void 55} 56 57; Function Attrs: nounwind uwtable 58define weak_odr dso_local void @C(ptr %src, ptr %dst) local_unnamed_addr #2 { 59; CHECK-LABEL: C: 60; CHECK: # %bb.0: # %entry 61; CHECK-NEXT: vmovups (%rdi), %ymm0 62; CHECK-NEXT: vmovups %ymm0, (%rsi) 63; CHECK-NEXT: vzeroupper 64; CHECK-NEXT: retq 65entry: 66 call void @llvm.memmove.p0.p0.i64(ptr align 1 %dst, ptr align 1 %src, i64 32, i1 false) 67 ret void 68} 69 70; Function Attrs: nounwind uwtable 71define weak_odr dso_local void @D(ptr %src, ptr %dst) local_unnamed_addr #2 { 72; CHECK-LABEL: D: 73; CHECK: # %bb.0: # %entry 74; CHECK-NEXT: vmovups (%rdi), %ymm0 75; CHECK-NEXT: vmovups 32(%rdi), %ymm1 76; CHECK-NEXT: vmovups %ymm1, 32(%rsi) 77; CHECK-NEXT: vmovups %ymm0, (%rsi) 78; CHECK-NEXT: vzeroupper 79; CHECK-NEXT: retq 80entry: 81 call void @llvm.memmove.p0.p0.i64(ptr align 1 %dst, ptr align 1 %src, i64 64, i1 false) 82 ret void 83} 84 85; Function Attrs: argmemonly nounwind 86declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1 immarg) #1 87 88attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "prefer-vector-width"="128" "stack-protector-buffer-size"="8" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" } 89attributes #1 = { argmemonly nounwind } 90attributes #2 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "prefer-vector-width"="256" "stack-protector-buffer-size"="8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" } 91 92!0 = !{i32 1, !"wchar_size", i32 4} 93