1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X86 %s 3; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X64 %s 4 5; If there is no explicit MMX type usage, always promote to XMM. 6 7define void @test0(ptr %x) nounwind { 8; X86-LABEL: test0: 9; X86: ## %bb.0: ## %entry 10; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 11; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 12; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1] 13; X86-NEXT: movlps %xmm0, (%eax) 14; X86-NEXT: retl 15; 16; X64-LABEL: test0: 17; X64: ## %bb.0: ## %entry 18; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 19; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1] 20; X64-NEXT: movq %xmm0, (%rdi) 21; X64-NEXT: retq 22entry: 23 %tmp2 = load <1 x i64>, ptr %x 24 %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> 25 %tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 > 26 %tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64> 27 store <1 x i64> %tmp10, ptr %x 28 ret void 29} 30 31define void @test1() nounwind { 32; X86-LABEL: test1: 33; X86: ## %bb.0: ## %entry 34; X86-NEXT: pushl %edi 35; X86-NEXT: pxor %mm0, %mm0 36; X86-NEXT: movq {{\.?LCPI[0-9]+_[0-9]+}}, %mm1 ## mm1 = 0x7070606040400000 37; X86-NEXT: xorl %edi, %edi 38; X86-NEXT: maskmovq %mm1, %mm0 39; X86-NEXT: popl %edi 40; X86-NEXT: retl 41; 42; X64-LABEL: test1: 43; X64: ## %bb.0: ## %entry 44; X64-NEXT: pxor %mm0, %mm0 45; X64-NEXT: movq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %mm1 ## mm1 = 0x7070606040400000 46; X64-NEXT: xorl %edi, %edi 47; X64-NEXT: maskmovq %mm1, %mm0 48; X64-NEXT: retq 49entry: 50 %tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32> 51 %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>) 52 %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16> 53 %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 > 54 %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8> 55 %tmp556 = bitcast <8 x i8> %tmp555 to <1 x i64> 56 %tmp557 = bitcast <8 x i8> zeroinitializer to <1 x i64> 57 tail call void @llvm.x86.mmx.maskmovq( <1 x i64> %tmp557, <1 x i64> %tmp556, ptr null) 58 ret void 59} 60 61@tmp_V2i = common global <2 x i32> zeroinitializer 62 63define void @test2() nounwind { 64; X86-LABEL: test2: 65; X86: ## %bb.0: ## %entry 66; X86-NEXT: movl L_tmp_V2i$non_lazy_ptr, %eax 67; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 68; X86-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1] 69; X86-NEXT: movlps %xmm0, (%eax) 70; X86-NEXT: retl 71; 72; X64-LABEL: test2: 73; X64: ## %bb.0: ## %entry 74; X64-NEXT: movq _tmp_V2i@GOTPCREL(%rip), %rax 75; X64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 76; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] 77; X64-NEXT: movq %xmm0, (%rax) 78; X64-NEXT: retq 79entry: 80 %0 = load <2 x i32>, ptr @tmp_V2i, align 8 81 %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer 82 store <2 x i32> %1, ptr @tmp_V2i, align 8 83 ret void 84} 85 86define <4 x float> @pr35869() nounwind { 87; X86-LABEL: pr35869: 88; X86: ## %bb.0: 89; X86-NEXT: movl $64, %eax 90; X86-NEXT: movd %eax, %mm0 91; X86-NEXT: pxor %mm1, %mm1 92; X86-NEXT: punpcklbw %mm1, %mm0 ## mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] 93; X86-NEXT: pcmpgtw %mm0, %mm1 94; X86-NEXT: movq %mm0, %mm2 95; X86-NEXT: punpckhwd %mm1, %mm2 ## mm2 = mm2[2],mm1[2],mm2[3],mm1[3] 96; X86-NEXT: xorps %xmm0, %xmm0 97; X86-NEXT: cvtpi2ps %mm2, %xmm0 98; X86-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0] 99; X86-NEXT: punpcklwd %mm1, %mm0 ## mm0 = mm0[0],mm1[0],mm0[1],mm1[1] 100; X86-NEXT: cvtpi2ps %mm0, %xmm0 101; X86-NEXT: retl 102; 103; X64-LABEL: pr35869: 104; X64: ## %bb.0: 105; X64-NEXT: movl $64, %eax 106; X64-NEXT: movd %eax, %mm0 107; X64-NEXT: pxor %mm1, %mm1 108; X64-NEXT: punpcklbw %mm1, %mm0 ## mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] 109; X64-NEXT: pcmpgtw %mm0, %mm1 110; X64-NEXT: movq %mm0, %mm2 111; X64-NEXT: punpckhwd %mm1, %mm2 ## mm2 = mm2[2],mm1[2],mm2[3],mm1[3] 112; X64-NEXT: xorps %xmm0, %xmm0 113; X64-NEXT: cvtpi2ps %mm2, %xmm0 114; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0] 115; X64-NEXT: punpcklwd %mm1, %mm0 ## mm0 = mm0[0],mm1[0],mm0[1],mm1[1] 116; X64-NEXT: cvtpi2ps %mm0, %xmm0 117; X64-NEXT: retq 118 %1 = tail call <1 x i64> @llvm.x86.mmx.punpcklbw(<1 x i64> bitcast (<8 x i8> <i8 64, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> to <1 x i64>), <1 x i64> bitcast (<8 x i8> zeroinitializer to <1 x i64>)) 119 %2 = tail call <1 x i64> @llvm.x86.mmx.pcmpgt.w(<1 x i64> bitcast (<4 x i16> zeroinitializer to <1 x i64>), <1 x i64> %1) 120 %3 = tail call <1 x i64> @llvm.x86.mmx.punpckhwd(<1 x i64> %1, <1 x i64> %2) 121 %4 = tail call <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float> zeroinitializer, <1 x i64> %3) 122 %5 = shufflevector <4 x float> %4, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1> 123 %6 = tail call <1 x i64> @llvm.x86.mmx.punpcklwd(<1 x i64> %1, <1 x i64> %2) 124 %7 = tail call <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float> %5, <1 x i64> %6) 125 ret <4 x float> %7 126} 127 128declare void @llvm.x86.mmx.maskmovq(<1 x i64>, <1 x i64>, ptr) 129declare <1 x i64> @llvm.x86.mmx.pcmpgt.w(<1 x i64>, <1 x i64>) 130declare <1 x i64> @llvm.x86.mmx.punpcklbw(<1 x i64>, <1 x i64>) 131declare <1 x i64> @llvm.x86.mmx.punpcklwd(<1 x i64>, <1 x i64>) 132declare <1 x i64> @llvm.x86.mmx.punpckhwd(<1 x i64>, <1 x i64>) 133declare <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float>, <1 x i64>) 134