xref: /llvm-project/llvm/test/CodeGen/X86/vector-merge-store-fp-constants.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEFAULTCPU
3; RUN: llc < %s -mcpu=x86-64 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64CPU
4
5define void @merge_8_float_zero_stores(ptr %ptr) {
6; DEFAULTCPU-LABEL: merge_8_float_zero_stores:
7; DEFAULTCPU:       # %bb.0:
8; DEFAULTCPU-NEXT:    movq $0, (%rdi)
9; DEFAULTCPU-NEXT:    movq $0, 8(%rdi)
10; DEFAULTCPU-NEXT:    movq $0, 16(%rdi)
11; DEFAULTCPU-NEXT:    movq $0, 24(%rdi)
12; DEFAULTCPU-NEXT:    retq
13;
14; X64CPU-LABEL: merge_8_float_zero_stores:
15; X64CPU:       # %bb.0:
16; X64CPU-NEXT:    xorps %xmm0, %xmm0
17; X64CPU-NEXT:    movups %xmm0, (%rdi)
18; X64CPU-NEXT:    movups %xmm0, 16(%rdi)
19; X64CPU-NEXT:    retq
20  %idx1 = getelementptr float, ptr %ptr, i64 1
21  %idx2 = getelementptr float, ptr %ptr, i64 2
22  %idx3 = getelementptr float, ptr %ptr, i64 3
23  %idx4 = getelementptr float, ptr %ptr, i64 4
24  %idx5 = getelementptr float, ptr %ptr, i64 5
25  %idx6 = getelementptr float, ptr %ptr, i64 6
26  %idx7 = getelementptr float, ptr %ptr, i64 7
27  store float 0.0, ptr %ptr, align 4
28  store float 0.0, ptr %idx1, align 4
29  store float 0.0, ptr %idx2, align 4
30  store float 0.0, ptr %idx3, align 4
31  store float 0.0, ptr %idx4, align 4
32  store float 0.0, ptr %idx5, align 4
33  store float 0.0, ptr %idx6, align 4
34  store float 0.0, ptr %idx7, align 4
35  ret void
36}
37