xref: /llvm-project/llvm/test/CodeGen/X86/vec_shift4.ll (revision 4a36e96c3fc2a9128097bfc4f907ccebc5dc66af) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
4
5define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
6; X86-LABEL: shl1:
7; X86:       # %bb.0: # %entry
8; X86-NEXT:    pslld $23, %xmm1
9; X86-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
10; X86-NEXT:    cvttps2dq %xmm1, %xmm1
11; X86-NEXT:    pmulld %xmm1, %xmm0
12; X86-NEXT:    retl
13;
14; X64-LABEL: shl1:
15; X64:       # %bb.0: # %entry
16; X64-NEXT:    pslld $23, %xmm1
17; X64-NEXT:    paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
18; X64-NEXT:    cvttps2dq %xmm1, %xmm1
19; X64-NEXT:    pmulld %xmm1, %xmm0
20; X64-NEXT:    retq
21entry:
22  %shl = shl <4 x i32> %r, %a                     ; <<4 x i32>> [#uses=1]
23  %tmp2 = bitcast <4 x i32> %shl to <2 x i64>     ; <<2 x i64>> [#uses=1]
24  ret <2 x i64> %tmp2
25}
26
27define <2 x i64> @shl2(<16 x i8> %r, <16 x i8> %a) nounwind readnone ssp {
28; X86-LABEL: shl2:
29; X86:       # %bb.0: # %entry
30; X86-NEXT:    movdqa %xmm1, %xmm2
31; X86-NEXT:    movdqa %xmm0, %xmm1
32; X86-NEXT:    psllw $5, %xmm2
33; X86-NEXT:    movdqa %xmm0, %xmm3
34; X86-NEXT:    psllw $4, %xmm3
35; X86-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm3
36; X86-NEXT:    movdqa %xmm2, %xmm0
37; X86-NEXT:    pblendvb %xmm0, %xmm3, %xmm1
38; X86-NEXT:    movdqa %xmm1, %xmm3
39; X86-NEXT:    psllw $2, %xmm3
40; X86-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm3
41; X86-NEXT:    paddb %xmm2, %xmm2
42; X86-NEXT:    movdqa %xmm2, %xmm0
43; X86-NEXT:    pblendvb %xmm0, %xmm3, %xmm1
44; X86-NEXT:    movdqa %xmm1, %xmm3
45; X86-NEXT:    paddb %xmm1, %xmm3
46; X86-NEXT:    paddb %xmm2, %xmm2
47; X86-NEXT:    movdqa %xmm2, %xmm0
48; X86-NEXT:    pblendvb %xmm0, %xmm3, %xmm1
49; X86-NEXT:    movdqa %xmm1, %xmm0
50; X86-NEXT:    retl
51;
52; X64-LABEL: shl2:
53; X64:       # %bb.0: # %entry
54; X64-NEXT:    movdqa %xmm0, %xmm2
55; X64-NEXT:    psllw $5, %xmm1
56; X64-NEXT:    movdqa %xmm0, %xmm3
57; X64-NEXT:    psllw $4, %xmm3
58; X64-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
59; X64-NEXT:    movdqa %xmm1, %xmm0
60; X64-NEXT:    pblendvb %xmm0, %xmm3, %xmm2
61; X64-NEXT:    movdqa %xmm2, %xmm3
62; X64-NEXT:    psllw $2, %xmm3
63; X64-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
64; X64-NEXT:    paddb %xmm1, %xmm1
65; X64-NEXT:    movdqa %xmm1, %xmm0
66; X64-NEXT:    pblendvb %xmm0, %xmm3, %xmm2
67; X64-NEXT:    movdqa %xmm2, %xmm3
68; X64-NEXT:    paddb %xmm2, %xmm3
69; X64-NEXT:    paddb %xmm1, %xmm1
70; X64-NEXT:    movdqa %xmm1, %xmm0
71; X64-NEXT:    pblendvb %xmm0, %xmm3, %xmm2
72; X64-NEXT:    movdqa %xmm2, %xmm0
73; X64-NEXT:    retq
74entry:
75  %shl = shl <16 x i8> %r, %a                     ; <<16 x i8>> [#uses=1]
76  %tmp2 = bitcast <16 x i8> %shl to <2 x i64>     ; <<2 x i64>> [#uses=1]
77  ret <2 x i64> %tmp2
78}
79