xref: /llvm-project/llvm/test/CodeGen/X86/vec_set-2.ll (revision 25528d6de70e98683722e28655d8568d5f09b5c7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
4
5define <4 x float> @test1(float %a) nounwind {
6; X86-LABEL: test1:
7; X86:       # %bb.0:
8; X86-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
9; X86-NEXT:    retl
10;
11; X64-LABEL: test1:
12; X64:       # %bb.0:
13; X64-NEXT:    xorps %xmm1, %xmm1
14; X64-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
15; X64-NEXT:    movaps %xmm1, %xmm0
16; X64-NEXT:    retq
17  %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0
18  %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1
19  %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 2
20  %tmp7 = insertelement <4 x float> %tmp6, float 0.000000e+00, i32 3
21  ret <4 x float> %tmp7
22}
23
24define <2 x i64> @test(i32 %a) nounwind {
25; X86-LABEL: test:
26; X86:       # %bb.0:
27; X86-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
28; X86-NEXT:    retl
29;
30; X64-LABEL: test:
31; X64:       # %bb.0:
32; X64-NEXT:    movd %edi, %xmm0
33; X64-NEXT:    retq
34  %tmp = insertelement <4 x i32> zeroinitializer, i32 %a, i32 0
35  %tmp6 = insertelement <4 x i32> %tmp, i32 0, i32 1
36  %tmp8 = insertelement <4 x i32> %tmp6, i32 0, i32 2
37  %tmp10 = insertelement <4 x i32> %tmp8, i32 0, i32 3
38  %tmp19 = bitcast <4 x i32> %tmp10 to <2 x i64>
39  ret <2 x i64> %tmp19
40}
41