1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s --check-prefix=X64 4 5; This is not an MMX operation; promoted to xmm. 6define <1 x i64> @t0(i32 %A) nounwind { 7; X86-LABEL: t0: 8; X86: ## %bb.0: 9; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 10; X86-NEXT: xorl %eax, %eax 11; X86-NEXT: retl 12; 13; X64-LABEL: t0: 14; X64: ## %bb.0: 15; X64-NEXT: movd %edi, %xmm0 16; X64-NEXT: psllq $32, %xmm0 17; X64-NEXT: movq %xmm0, %rax 18; X64-NEXT: retq 19 %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 20 %tmp4 = bitcast <2 x i32> %tmp3 to <1 x i64> 21 ret <1 x i64> %tmp4 22} 23 24define <8 x i8> @t1(i8 zeroext %x) nounwind { 25; X86-LABEL: t1: 26; X86: ## %bb.0: 27; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 28; X86-NEXT: retl 29; 30; X64-LABEL: t1: 31; X64: ## %bb.0: 32; X64-NEXT: movd %edi, %xmm0 33; X64-NEXT: retq 34 %r = insertelement <8 x i8> undef, i8 %x, i32 0 35 ret <8 x i8> %r 36} 37 38; PR2574 39define <2 x float> @t2(<2 x float> %a0) { 40; X86-LABEL: t2: 41; X86: ## %bb.0: 42; X86-NEXT: xorps %xmm0, %xmm0 43; X86-NEXT: retl 44; 45; X64-LABEL: t2: 46; X64: ## %bb.0: 47; X64-NEXT: xorps %xmm0, %xmm0 48; X64-NEXT: retq 49 %v1 = insertelement <2 x float> %a0, float 0.000000e+00, i32 0 50 %v2 = insertelement <2 x float> %v1, float 0.000000e+00, i32 1 51 ret <2 x float> %v2 52} 53 54@g0 = external global i16 55@g1 = external global <4 x i16> 56 57; PR2562 58define void @t3() { 59; X86-LABEL: t3: 60; X86: ## %bb.0: 61; X86-NEXT: movl L_g0$non_lazy_ptr, %eax 62; X86-NEXT: movzwl (%eax), %eax 63; X86-NEXT: movl L_g1$non_lazy_ptr, %ecx 64; X86-NEXT: movw %ax, (%ecx) 65; X86-NEXT: retl 66; 67; X64-LABEL: t3: 68; X64: ## %bb.0: 69; X64-NEXT: movq _g0@GOTPCREL(%rip), %rax 70; X64-NEXT: movzwl (%rax), %eax 71; X64-NEXT: movq _g1@GOTPCREL(%rip), %rcx 72; X64-NEXT: movw %ax, (%rcx) 73; X64-NEXT: retq 74 load i16, ptr @g0 75 load <4 x i16>, ptr @g1 76 insertelement <4 x i16> %2, i16 %1, i32 0 77 store <4 x i16> %3, ptr @g1 78 ret void 79} 80