xref: /llvm-project/llvm/test/CodeGen/X86/vec_insert-7.ll (revision b7e4fba6e5dcae5ff51f8eced21470a1b3ccd895)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X64
4
5; MMX insertelement is not available; these are promoted to xmm.
6; (Without SSE they are split to two ints, and the code is much better.)
7
8define <1 x i64> @mmx_movzl(<1 x i64> %x) nounwind {
9; X86-LABEL: mmx_movzl:
10; X86:       ## %bb.0:
11; X86-NEXT:    movl $32, %eax
12; X86-NEXT:    xorl %edx, %edx
13; X86-NEXT:    retl
14;
15; X64-LABEL: mmx_movzl:
16; X64:       ## %bb.0:
17; X64-NEXT:    movl $32, %eax
18; X64-NEXT:    retq
19  %tmp = bitcast <1 x i64> %x to <2 x i32>
20  %tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0
21  %tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1
22  %tmp9 = bitcast <2 x i32> %tmp8 to <1 x i64>
23  ret <1 x i64> %tmp9
24}
25